Analog Devices Inc. ADV7123JST240

Overview

ADV7123JST240 from Analog Devices is a triple 10-bit, 330 MSPS CMOS video DAC with complementary current outputs, TTL-compatible digital interface, and internal 1.235 V reference-designed for RGB video signal reconstruction in high-resolution digital display systems requiring precise analog output timing, low glitch impulse (10 pV·sec), and RS-343A/RS-170 compliance.

For engineers reviewing the ADV7123JST240 datasheet, ADV7123JST240 pinout, ADV7123JST240 application, or ADV7123JST240 equivalent, this page delivers verified specifications including 330 MHz clock support, 48-lead LQFP package mapping, DAC-to-DAC matching ≤5%, SFDR of −53 dBc at 140 MHz clock / 40 MHz output, and industrial temperature range (−40°C to +85°C).

Technical Context

The ADV7123JST240 integrates three independent 10-bit DACs with synchronous latching on a single rising clock edge, supporting pixel rates up to 330 MSPS in 3.3 V operation. Its architecture includes dedicated BLANK and SYNC control inputs, differential current outputs (IOR/IOG/IOB and complementary IOR/IOG/IOB), and programmable full-scale current via RSET (560 Ω nominal).

It employs a monolithic CMOS process with internal voltage reference buffering and compensation (via COMP pin), enabling direct drive of doubly terminated 75 Ω coaxial video lines without external op-amps. Power-down mode reduces supply current to 2.1–5.0 mA while maintaining TTL input compatibility and guaranteed monotonicity across all 10 bits.

Key Specifications

Pinout & Package

ADV7123JST240 is housed in a 48-lead LQFP package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are validated per Analog Devices Rev. D datasheet Figure 3 and Table 8.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple 10-bit video DAC applications.

Compared with ADV7123JST240, ADV7125KSTZ trades clock speed and internal reference for lower cost and proven field reliability in fixed-rate systems, while THS8135PFP replaces discrete output buffering with integrated amplifiers at the expense of power efficiency and pin compatibility.

Availability

ADV7123JST240 is available at Aetrix Electronics and suitable for high-resolution digital displays, medical imaging systems, digital video test equipment, and industrial machine vision cameras requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for ADV7123JST240 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and ISO 9001-certified manufacturing.

The ADV7123 product line was developed specifically for high-speed digital video interface applications-including broadcast, medical, and industrial imaging-where precise analog reconstruction, low glitch energy, and RS-standard compliance are mandatory.

FAQ

What is the maximum supported clock frequency for ADV7123JST240?

The ADV7123JST240 supports up to 330 MHz clock frequency when operated at 3.3 V supply, as specified in the 3.3 V Timing Specifications table (Rev. D, Page 8). At 5 V, the maximum production-tested clock rate is 240 MHz, though characterization guarantees operation up to that speed. The 330 MHz rating enables pixel rates required for UXGA (1600 × 1200) at 100 Hz refresh without interpolation. ADV7123JST240 must be operated within its specified temperature range (0°C to +70°C) at 330 MHz.

Does ADV7123JST240 include an internal voltage reference?

Yes, ADV7123JST240 integrates a precision 1.235 V internal voltage reference, accessible at the VREF pin. This reference is used by all three DACs and can also serve as an external reference source for other system components. A 0.1 µF ceramic capacitor must be placed between the COMP pin and VAA for stability. When using the internal reference, no external reference IC is required-reducing BOM count and board area.

How does the BLANK input function in ADV7123JST240?

The BLANK input (Pin 11) is a TTL-compatible control signal that, when driven Logic 0, forces all analog outputs (IOR, IOG, IOB and their complements) to the blanking level-effectively disabling video output during horizontal or vertical retrace intervals. Pixel data inputs (R0–R9, etc.) are ignored while BLANK is active. The signal is latched on the rising edge of CLOCK, ensuring deterministic timing alignment with pixel sampling. ADV7123JST240 maintains this behavior across both 3.3 V and 5 V supply modes.

What is the purpose of the RSET pin on ADV7123JST240?

The RSET pin (Pin 37) sets the full-scale output current of ADV7123JST240's DACs via an external resistor to GND. With RSET = 560 Ω, the green DAC delivers 17.62 mA FSR-matching RS-343A video levels into a doubly terminated 75 Ω load. The relationship is defined as IOR/IOB = 7989.6 × VREF / RSET and IOG = 11,445 × VREF / RSET (when SYNC is asserted). ADV7123JST240 retains IRE scaling proportionality regardless of RSET value, enabling flexible output amplitude tuning.

Is ADV7123JST240 compatible with RS-170 and RS-343A video standards?

Yes, ADV7123JST240 is explicitly designed for RS-343A and RS-170 compatibility. Its output compliance range (0–1.4 V), programmable current (2.0–26.5 mA), differential output structure, and timing parameters (e.g., t6 = 7.5 ns @ 3.3 V) meet both standards' requirements for analog video signal reconstruction. The device drives doubly terminated 75 Ω coaxial cables directly, and its SYNC/BLANK control logic aligns with composite video blanking interval conventions. ADV7123JST240 achieves this without external amplification or level-shifting circuitry.