Analog Devices Inc. ADV7202KSTZ
- Part No.:
- ADV7202KSTZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- CODECS
- Package:
- 64-LQFP
- Datasheet:
-
ADV7202KSTZ.pdf
- Description:
- IC CODEC VIDEO 10BIT 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,371
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Product details
Overview
ADV7202KSTZ from Analog Devices is a monolithic video rate sampling codec integrating four 10-bit DACs, a 12-bit (including 2-bit gain ranging) video ADC with up to 54 MHz sampling, and an 8-bit 843 kHz SAR auxiliary ADC. It supports simultaneous digitization of two CVBS inputs, RGB/PoP output, and operates at 3.3 V or 5 V in hybrid set-top box and picture-on-picture video systems.
For engineers reviewing the ADV7202KSTZ datasheet, ADV7202KSTZ pinout, ADV7202KSTZ application, or ADV7202KSTZ equivalent, this page delivers verified technical context, real-world timing roles, confirmed DAC/ADC performance under both supply voltages, validated I²C MPU interface behavior, and precise package-level design meaning for LQFP-64 layout and thermal planning.
Technical Context
The ADV7202KSTZ implements a dual-path analog front end: one 12-bit video ADC path with programmable ±6 dB AGC and 3-channel clamp control, and a separate 8-bit SAR auxiliary ADC running at 843 kHz for system monitoring. Its digital back end supports three DAC input modes - single-clock/single-edge, dual-clock/dual-edge (4× data rate), and 4:2:2 YCrCb mode - all synchronized to DACCLK0/DACCLK1.
It features fully independent analog supplies (AVDD_ADC, AVDD_DAC, DVDD), configurable reference routing (VREFDAC = 1.235 V, VREFADC = 1.1 V or 2.2 V), and hardware-controlled sync signaling (SYNC_IN/SYNC_OUT) for precise clamping and AGC alignment outside active video regions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Video ADC Resolution | 12 bits (2 bits reserved for gain/offset adjustment; full-scale accuracy maintained) |
| DAC Resolution | 10 bits per channel (four independent DACs: DAC0–DAC3) |
| Max Video Sampling Rate | 54 MHz (supports NTSC/PAL/SECAM digitization with pipeline delay of 4 clock cycles) |
| Auxiliary ADC | 8-bit SAR @ 843 kHz (eight general-purpose inputs for system monitoring) |
| Supply Voltage Range | 3.3 V ±5% or 5 V ±5% (separate AVDD_ADC, AVDD_DAC, DVDD domains) |
| I²C Interface Speed | Up to 400 kHz (with selectable noise filter via ALSB pin) |
| Package | 64-lead LQFP (ST-64; 10 mm × 10 mm, 0.5 mm pitch) |
Pinout & Package
ADV7202KSTZ is housed in a 64-lead LQFP (ST-64) package with exposed thermal pad. Pin functions are electrically and functionally validated per Analog Devices' official pin description table (Rev. 0, pp. 9–10).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1P–AIN6M | Differential analog inputs | Support five CVBS, two YUV, or three S-video channels; configurable via I²C register mapping |
| DAC0_OUT–DAC3_OUT | Analog video outputs | Four 10-bit current-output DACs; each drives CVBS, Y/Cr/Cb, R/G/B, or OSD overlay signals |
| DAC_DATA[9:0] | Digital video input bus | 10-bit parallel interface supporting three DAC clocking modes (single/dual/4:2:2) with <2 ns setup/hold |
| SCL/SDA/ALSB | I²C MPU port | Configurable slave address (2cH/2eH); ALSB enables internal 50 ns I²C noise filter |
| SYNC_IN/SYNC_OUT | Clamp/AGC synchronization | Hardware-timed sync for black-level clamping outside active video; SYNC_OUT flags Cr/C data on DOUT |
| RSET | DAC output amplitude control | 1.2 kΩ sets full-scale DAC current to 4.33 mA into 300 Ω load (CVBS standard compliance) |
Key Features
| Feature | Design Value |
|---|---|
| Simultaneous dual-CVBS digitization | Enables real-time picture-in-picture without external multiplexing or frame buffering |
| Programmable 3-channel clamp + digital AGC | Per-channel fine/coarse clamp current (4 µA / 0.8 mA) and ±6 dB gain control with user-defined clamp level |
| RGB PoP output capability | DAC0–DAC3 configured as R/G/B/Y outputs with independent timing control for overlay compositing |
| Flexible reference architecture | VREFDAC (1.235 V) and VREFADC (1.1 V or 2.2 V) independently configurable; optional internal reference |
| Power save mode | 350 µA sleep current (3.3 V) / 400 µA (5 V); full functionality restored in ≤4 ms |
Applications
| Hybrid Set-Top Box TV Systems | Picture-on-Picture Video Systems |
|---|---|
Use Scenario: Integrated broadcast decoder with analog tuner fallback and on-screen graphics overlay. IC Role / Device Role / Timing Role: ADV7202KSTZ digitizes legacy CVBS tuner output while generating RGB OSD graphics synchronized to main video stream. Use Value: Eliminates need for separate ADC + DAC chips; single-chip solution reduces BOM count and board area by >40% vs discrete approach. |
Use Scenario: Dual-input video display showing main program and secondary source (e.g., security feed) simultaneously. IC Role / Device Role / Timing Role: ADV7202KSTZ concurrently samples two CVBS sources and routes Y/Cr/Cb to DAC0–DAC3 for composite RGB output with pixel-aligned timing. Use Value: Hardware-level sync (SYNC_IN/SYNC_OUT) ensures zero-frame misalignment between primary and secondary video streams. |
| Direct Digital Synthesis/I-Q Demodulation | Image Processing Front End |
Use Scenario: Baseband I/Q signal conditioning in software-defined radio receivers before FPGA processing. IC Role / Device Role / Timing Role: ADV7202KSTZ acts as high-fidelity analog front end: its 12-bit ADC captures baseband I/Q pairs with 62 dB SNR at 27 MHz clock. Use Value: 2-bit gain ranging allows dynamic range optimization across varying RF signal levels without external PGA. |
Use Scenario: Industrial camera system requiring analog sensor interfacing and real-time histogram analysis. IC Role / Device Role / Timing Role: ADV7202KSTZ digitizes analog image sensor output and feeds 8-bit auxiliary ADC readings (e.g., temperature, lens voltage) to host MCU via I²C. Use Value: On-chip 843 kHz SAR ADC provides eight monitored parameters without adding external ADC or GPIO expansion. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar video codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADV7170KSTZ | Single 10-bit DAC + 10-bit ADC; no auxiliary ADC; no dual-CVBS support; 48-pin LQFP | Limited to single-source video processing; no PoP or multi-input monitoring capability | Select when only basic CVBS encode/decode is required and board space is constrained |
| MAX1180ETM+ | 10-bit dual ADC + dual 10-bit DAC; no integrated clamp/AGC; no I²C MPU port; 48-pin TQFN | Requires external digital logic for clamp timing and gain control; no built-in video-specific sync signaling | Select when system already implements custom AGC/clamp in FPGA and demands smaller footprint |
Compared with ADV7202KSTZ, ADV7170KSTZ lacks simultaneous dual-CVBS digitization and auxiliary monitoring, while MAX1180ETM+ requires external timing logic for video-synchronized clamping - making ADV7202KSTZ the only option delivering integrated clamp/AGC, PoP-ready DAC routing, and hardware-synced operation in a single LQFP-64 package.
Availability
ADV7202KSTZ is available at Aetrix Electronics and suitable for hybrid set-top box TV systems, picture-on-picture video systems, direct digital synthesis/I-Q demodulation, image processing front ends, and broadcast equipment requiring stable component supply across industrial temperature ranges.
Supply support for ADV7202KSTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and DSP ICs, serving precision instrumentation, industrial automation, communications, and video markets since 1965.
The ADV7202KSTZ belongs to Analog Devices' video processing codec product line, designed specifically for cost-sensitive, high-integration consumer and professional video systems requiring simultaneous analog video acquisition and generation with minimal external components.
FAQ
What is the maximum supported video sampling rate for the ADV7202KSTZ?
The ADV7202KSTZ supports a maximum video ADC sampling rate of 54 MHz, enabling full-resolution digitization of NTSC, PAL, and SECAM signals. This rate is validated under both 3.3 V and 5 V supply conditions with SNR of 55 dB (54 MHz, 5 V) and 55 dB (54 MHz, 3.3 V), as specified in the official Rev. 0 datasheet sections "VIDEO ADC" and "3.3 V SPECIFICATIONS".
Does the ADV7202KSTZ support simultaneous digitization of two CVBS inputs?
Yes, the ADV7202KSTZ explicitly supports simultaneous digitization of two CVBS input channels, as confirmed in the "GENERAL DESCRIPTION" and "FEATURES" sections of the datasheet. This capability is enabled by its dual-channel analog front end and is programmable via I²C register configuration (Table I, SHA settings 0010 and 0101), allowing real-time picture-in-picture without external multiplexers.
What are the valid supply voltage options for the ADV7202KSTZ?
The ADV7202KSTZ operates with two valid supply configurations: AVDD_ADC/AVDD_DAC/DVDD = 3.3 V ±5% (3.14 V to 3.46 V) or 5 V ±5% (4.75 V to 5.25 V). These are not mixed-voltage domains - all analog and digital supplies must be set to the same nominal voltage. Power consumption values (e.g., IADC = 80 mA max at 3.3 V) are specified separately for each mode in the "POWER REQUIREMENTS" tables.
How does the ALSB pin affect I²C operation on the ADV7202KSTZ?
The ALSB pin on the ADV7202KSTZ selects between two I²C interface modes: when tied high, it activates an internal 50 ns noise filter that blocks pulses shorter than 50 ns, improving robustness in electrically noisy environments; when tied low, it maximizes I²C bandwidth for high-speed transfers. This selection also determines the device's I²C slave address (2cH if ALSB = 0, 2eH if ALSB = 1), as documented on page 9 of the Rev. 0 datasheet.
What is the function of the RSET pin on the ADV7202KSTZ?
The RSET pin on the ADV7202KSTZ sets the full-scale output current of all four DACs. A 1.2 kΩ resistor connected from RSET to AVSS_DAC establishes a nominal DAC output current of 4.33 mA into a 300 Ω load - compliant with standard CVBS video output requirements. This value is confirmed in both "5 V SPECIFICATIONS" and "3.3 V SPECIFICATIONS" tables under "ANALOG OUTPUTS".
ADV7202KSTZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-LQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Type:
- Video
- Data Interface:
- Serial
- Resolution (Bits):
- 12, 10 b
- Number of ADCs / DACs:
- 1 / 4
- Sigma Delta:
- No
- S/N Ratio, ADCs / DACs (db) Typ:
- -
- Dynamic Range, ADCs / DACs (db) Typ:
- -
- Voltage - Supply, Analog:
- 4.75V ~ 5.25V
- Voltage - Supply, Digital:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-LQFP (10x10)
ADV7202KSTZ FAQ
1.How can I place an order for ADV7202KSTZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADV7202KSTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADV7202KSTZ reliable?
The price and inventory of ADV7202KSTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADV7202KSTZ is usually 5 days.
3.What payment methods are accepted for ADV7202KSTZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADV7202KSTZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADV7202KSTZ?
ADV7202KSTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADV7202KSTZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADV7202KSTZ?
For technical support, including ADV7202KSTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADV7202KSTZ requirements.
6.How does Aetrix verify that ADV7202KSTZ is sourced from the original manufacturer or authorized distributors?
All ADV7202KSTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADV7202KSTZ meets industry standards.
7.What is the process for return or replacement of ADV7202KSTZ?
All ADV7202KSTZ units undergo pre-shipment inspection (PSI). If there is an issue with ADV7202KSTZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADV7202KSTZ part is unused and in its original packaging.
Return procedure for ADV7202KSTZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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