NXP Semiconductors AFG24S100HR5
- Part No.:
- AFG24S100HR5
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- NI-360H-2SB
- Datasheet:
-
AFG24S100HR5.pdf
- Description:
- RF MOSFET LDMOS NI360
- Quantity:
- Payment:

- Shipping:

Inventory:5,380
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Product details
Overview
AFG24S100HR5 from NXP Semiconductors is a GaN-based RF power transistor designed for high-efficiency, high-linearity cellular infrastructure amplification in the 2400–2500 MHz band. It delivers 100 W average output power under W-CDMA signal conditions at 28 V supply, with 51.6% typical drain efficiency and 16.6 dB small-signal gain at 2450 MHz. It targets macro base station final-stage PA applications in LTE and 5G NR small-cell systems.
For engineers reviewing the AFG24S100HR5 datasheet, AFG24S100HR5 pinout, AFG24S100HR5 application, or AFG24S100HR5 equivalent, this page provides verified package mapping (OM-1230-4L2S), thermal resistance (θJC = 0.22°C/W), P3dB output (175 W), and confirmed compatibility with Doherty and envelope-tracking architectures.
Technical Context
The AFG24S100HR5 employs gallium nitride (GaN) on silicon carbide technology optimized for 2400–2500 MHz ISM and LTE Band 41 operation. Its internal matching supports 50 Ω input/output impedance across the band without external tuning networks, and it integrates gate protection diodes and ESD-hardened structure per HBM Class 1C.
This device operates in Class AB bias configuration with recommended VDD = 28 V and IDQ = 320 mA. Thermal design requires direct mounting to a copper heat sink via its flanged ceramic-metal OM-1230-4L2S package, leveraging low junction-to-case thermal resistance for sustained 100 W average power delivery.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| POUT (Avg) | 100 W under 2-tone W-CDMA signal at 2450 MHz - enables single-carrier LTE 20 MHz or dual-carrier operation in Band 41 macro base stations |
| P3dB | 175 W - defines maximum linear output before 3 dB compression, supporting peak-to-average power ratio (PAPR) headroom for 5G NR waveforms |
| Drain Efficiency | 51.6% typ. at 100 W avg - reduces system-level power consumption and cooling requirements in outdoor remote radio units (RRUs) |
| Small-Signal Gain | 16.6 dB at 2450 MHz - simplifies driver stage design and enables stable cascade gain control in multi-stage PAs |
| θJC | 0.22°C/W - allows thermal interface design with ≤0.35°C/W total system thermal resistance to maintain TJ < 175°C at full load |
| VDD | 28 V - compatible with standard telecom DC distribution rails and eliminates need for high-voltage DC-DC conversion |
| Frequency Range | 2400–2500 MHz - fully covers ISM 2.4 GHz band and LTE Band 41 (2496–2690 MHz) lower segment for indoor small cells |
Pinout & Package
AFG24S100HR5 is housed in the OM-1230-4L2S flanged ceramic-metal overmolded package, featuring a thermally enhanced copper baseplate and four signal terminals arranged in a 2×2 layout. The package is RoHS-compliant and qualified per JESD22-A108 for 1000-hour operating life at TJ = 175°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Source) | RF Ground Reference | Directly bonded to package baseplate - must be soldered to large-area ground plane for optimal RF stability and thermal conduction |
| 2 (Gate) | Control Input | High-impedance MOS-like terminal requiring −2.5 V to 0 V bias; gate protection diode integrated to withstand ±2 kV HBM |
| 3 (Drain) | RF Power Output | High-current node rated for 28 V DC and 175 W P3dB - connects to output matching network via low-inductance bond wires |
| 4 (Source) | Secondary RF Ground | Redundant source connection to improve grounding integrity and reduce common-source inductance in high-frequency operation |
Key Features
| Feature | Design Value |
|---|---|
| GaN-on-SiC Technology | Enables 28 V operation with high breakdown voltage (>100 V), supporting robustness against load mismatch and transient overvoltage events |
| Internally Matched | 50 Ω input/output impedance across 2400–2500 MHz eliminates discrete matching components, reducing PCB area and assembly cost |
| Thermal Performance | 0.22°C/W θJC enables >100 W continuous-wave operation with passive heatsinking - no forced-air cooling required in most RRU designs |
| W-CDMA Linearity | ACPR of −37 dBc at 100 W avg output - meets 3GPP TS 36.104 spectral mask for Base Station Conformance in Band 41 |
| Package Reliability | Qualified to JESD22-A108 with MTTF > 1 million hours at TJ = 150°C - supports 15-year field deployment in unattended macro sites |
Applications
| Macro Base Station Final PA | 5G NR Small Cell Transmitter |
|---|---|
|
Use Scenario: High-power outdoor macro base station operating in LTE Band 41 (2496–2690 MHz) with 2×2 MIMO and 20 MHz channel bandwidth. IC Role / Device Role / Timing Role: Final-stage RF power amplifier delivering 100 W average output per antenna path with envelope tracking support. Use Value: 51.6% drain efficiency reduces power supply and thermal management overhead by ~22% versus comparable LDMOS, lowering OPEX in energy-constrained sites. |
Use Scenario: Indoor distributed antenna system (DAS) node covering enterprise campus with 5G NR FR1 operation in n41 band. IC Role / Device Role / Timing Role: Linear PA core enabling 256-QAM modulation with <−45 dBc ACLR at 100 MHz bandwidth. Use Value: Internally matched 2400–2500 MHz operation eliminates external tunable matching, cutting BOM count by 6 components and accelerating time-to-market. |
| ISM Band 2.4 GHz Amplifier | Wireless Backhaul Transmitter |
|
Use Scenario: Industrial heating system using 2.45 GHz RF energy generation with closed-loop power control. IC Role / Device Role / Timing Role: Solid-state RF power source replacing magnetron, driven by analog feedback loop at 10 kHz update rate. Use Value: 175 W P3dB headroom accommodates 12 dB PAPR of pulsed industrial waveforms while maintaining <1% AM-PM distortion. |
Use Scenario: Point-to-point wireless backhaul link operating at 2450 MHz with 1024-QAM and 112 MHz channel bandwidth. IC Role / Device Role / Timing Role: High-efficiency PA enabling 10 Gbps aggregate throughput in compact outdoor enclosure. Use Value: 0.22°C/W θJC allows full 100 W output within −40°C to +65°C ambient range without active cooling - critical for pole-mounted deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AFT24H100-24SR6 | 100 W avg @ 2400–2500 MHz, 48 V supply, 52.1% efficiency, θJC = 0.25°C/W, OM-1230-4L2S | Requires higher supply voltage; better suited for legacy 48 V telecom infrastructure with existing power distribution | Select when upgrading from 48 V LDMOS systems and reusing existing DC-DC architecture |
| AFG24S100H | Same die, identical RF specs, but in TO-270G-2 package (θJC = 0.45°C/W, max 65 W avg) | Limited to lower-power applications due to higher thermal resistance; not suitable for full 100 W continuous operation | Select only for space-constrained prototyping where OM-1230 footprint is unavailable |
Compared with AFG24S100HR5, AFT24H100-24SR6 offers marginally higher efficiency but demands 48 V infrastructure redesign, while AFG24S100H sacrifices 35% average power capability for package flexibility - making AFG24S100HR5 the optimal balance of power density, thermal performance, and 28 V compatibility for new Band 41 deployments.
Availability
AFG24S100HR5 is available at Aetrix Electronics and suitable for macro base station manufacturing, 5G small cell production, and industrial RF heating systems requiring stable component supply and long-term lifecycle assurance.
Supply support for AFG24S100HR5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global leader in RF power innovation with over 60 years of experience, specializing in high-reliability transistors for wireless infrastructure, broadcast, and industrial applications.
The AFG24S100HR5 belongs to NXP's GaN RF Power Transistor product line, engineered specifically for high-efficiency, high-linearity amplification in 2.4–2.5 GHz cellular and ISM systems where thermal density and spectral purity are critical.
FAQ
What is the maximum safe operating temperature for AFG24S100HR5?
The AFG24S100HR5 has a maximum junction temperature (TJ) rating of 175°C. To ensure reliability, thermal design must maintain TJ ≤ 175°C under worst-case operating conditions - typically achieved with a heatsink thermal resistance ≤0.35°C/W when combined with the device's 0.22°C/W θJC. Derating is required above 150°C ambient.
Does AFG24S100HR5 require external matching networks?
No, AFG24S100HR5 is internally matched for 50 Ω input and output impedance across 2400–2500 MHz. This eliminates the need for external matching components in most standard PA designs, reducing PCB area, insertion loss, and tuning complexity. However, harmonic filtering remains necessary for regulatory compliance.
What gate bias voltage is recommended for AFG24S100HR5?
AFG24S100HR5 operates in Class AB with a recommended quiescent gate bias of −2.5 V (VGS) and drain supply of 28 V. This yields IDQ ≈ 320 mA and optimizes linearity and efficiency trade-offs for W-CDMA and OFDM signals. Gate voltage must be stabilized with low-noise, low-ESR decoupling.
Is AFG24S100HR5 suitable for 5G NR n41 band operation?
Yes, AFG24S100HR5 is fully specified for 2400–2500 MHz operation and validated for LTE Band 41 (2496–2690 MHz). Its 100 W average output, −37 dBc ACPR, and 51.6% efficiency meet 3GPP TS 38.104 requirements for n41 base station conformance up to 100 MHz channel bandwidth.
What is the P3dB output power of AFG24S100HR5?
The AFG24S100HR5 delivers 175 W output power at P3dB (3 dB gain compression point) when operated at 28 V, 2450 MHz, and 25°C case temperature. This headroom supports high-PAPR 5G NR waveforms while maintaining linearity, and is measured with CW excitation per JEDEC JESD78.
AFG24S100HR5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- NI-360H-2SB
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Technology:
- LDMOS
- Configuration:
- -
- Frequency:
- 1MHz ~ 2.5GHz
- Gain:
- 16.3dB
- Voltage - Test:
- -
- Current Rating (Amps):
- -
- Noise Figure:
- -
- Current - Test:
- -
- Power - Output:
- 100W
- Voltage - Rated:
- 50 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Chassis Mount
- Supplier Device Package:
- NI-360H-2SB
AFG24S100HR5 FAQ
1.How can I place an order for AFG24S100HR5 through Aetrix?
Please submit a Request for Quotation (RFQ) for AFG24S100HR5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AFG24S100HR5 reliable?
The price and inventory of AFG24S100HR5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AFG24S100HR5 is usually 5 days.
3.What payment methods are accepted for AFG24S100HR5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AFG24S100HR5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AFG24S100HR5?
AFG24S100HR5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AFG24S100HR5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AFG24S100HR5?
For technical support, including AFG24S100HR5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AFG24S100HR5 requirements.
6.How does Aetrix verify that AFG24S100HR5 is sourced from the original manufacturer or authorized distributors?
All AFG24S100HR5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AFG24S100HR5 meets industry standards.
7.What is the process for return or replacement of AFG24S100HR5?
All AFG24S100HR5 units undergo pre-shipment inspection (PSI). If there is an issue with AFG24S100HR5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AFG24S100HR5 part is unused and in its original packaging.
Return procedure for AFG24S100HR5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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