NXP Semiconductors AFT26H250-24SR6
- Part No.:
- AFT26H250-24SR6
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- NI-1230-4LS2L
- Datasheet:
-
AFT26H250-24SR6.pdf
- Description:
- RF MOSFET LDMOS 28V NI1230
- Quantity:
- Payment:

- Shipping:

Inventory:600
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AFT26H250-24SR6 from NXP Semiconductors (formerly Freescale) is a 50 W asymmetrical Doherty RF power LDMOS transistor designed for cellular base station amplifiers operating in the 2496–2690 MHz band. It delivers 14.4 dB typical power gain, 44.9% drain efficiency, and –33.8 dBc ACPR at 2590 MHz under W-CDMA single-carrier conditions (28 Vdc, 50 W avg., PAR = 9.9 dB). Its dual-gate architecture supports carrier-peaking operation in digital predistortion (DPD) linearized PA stages.
For engineers reviewing the AFT26H250-24SR6 datasheet, AFT26H250-24SR6 pinout, AFT26H250-24SR6 application, or AFT26H250-24SR6 equivalent, this device requires attention to gate bias sequencing (VGSB = 0.4 Vdc), VDDA/VDDB tie-together constraint, thermal resistance (0.42 °C/W), load-pull impedance matching, and its NI-1230S-4L2L 6-pin overmolded package with isolated RF input/output terminals.
Technical Context
The AFT26H250-24SR6 implements an integrated asymmetrical Doherty architecture with separate carrier (Side A) and peaking (Side B) LDMOS cells in a monolithic die. It features independent gate control (VGSA/VGSB), DC-coupled RF outputs (RFoutA/RFoutB), and internal input/output matching optimized for 2496–2690 MHz broadband operation.
Its design supports Class AB carrier and Class C peaking operation, enabled by extended negative gate-source voltage range (–6.0 Vdc) and precise gate threshold matching (1.2 Vdc typ. for both sides). The device is characterized for DPD-compliant operation with 7.9–8.1 dB output PAR and <0.3 dB gain flatness across 194 MHz bandwidth.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 2496–2690 MHz - Fully specified performance across entire LTE Band 7 uplink/downlink duplex gap; no external tuning required. |
| Output Power (Avg.) | 50 W - Sustained average RF output under W-CDMA single-carrier signal with 9.9 dB PAR at 0.01% CCDF probability. |
| Drain Efficiency (ηD) | 44.9% @ 2590 MHz - Enables high-efficiency macrocell PA designs with reduced thermal load and cooling requirements. |
| Power Gain (Gps) | 14.4 dB @ 2590 MHz - Delivers sufficient small-signal gain to minimize driver stage complexity in multi-stage PAs. |
| ACPR | –33.8 dBc @ ±5 MHz offset - Meets stringent ACLR requirements for LTE base stations without excessive DPD overhead. |
| Thermal Resistance (RθJC) | 0.42 °C/W - Supports high-power CW operation up to 294 W with derating; enables compact heatsink integration. |
| VGS(th) (Both Sides) | 0.8–1.6 Vdc - Tight threshold matching ensures balanced carrier-peaking activation timing critical for Doherty linearity. |
Pinout & Package
Package: NI-1230S-4L2L - Overmolded 6-pin surface-mount package with exposed thermal pad, rated for case temperatures up to +150 °C. Pin 1 and 2 are DC-coupled and RF-independent; VDD must not be supplied through pins 3 and 6.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RFinA / VGSA | Carrier amplifier gate input - DC-biased at 1.4–2.2 Vdc; requires stable low-noise gate supply for Class AB operation. |
| 2 | RFinB / VGSB | Peaking amplifier gate input - biased at 0.4 Vdc for Class C turn-on; sensitive to gate voltage ripple affecting Doherty knee point. |
| 3 | RFoutA / VDSA | Carrier drain output - DC-coupled RF path; must be impedance-matched to 2.00–j4.75 Ω (2590 MHz) for P1dB optimization. |
| 4 | RFoutB / VDSB | Peaking drain output - DC-coupled RF path; matched to 2.11–j5.43 Ω (2590 MHz) for maximum output power tuning. |
| 5 | VBWA | Carrier-side bias decoupling terminal - connects to local VDD bypass capacitor; shares VDD rail with pin 6. |
| 6 | VBWB | Peaking-side bias decoupling terminal - ties to same VDD rail as pin 5; VDDA and VDDB must be externally shorted. |
Key Features
| Feature | Design Value |
|---|---|
| Advanced In-Package Doherty | Monolithic carrier-peaking integration eliminates inter-device phase/timing mismatch, enabling >15% bandwidth extension vs. discrete Doherty solutions. |
| Wide Instantaneous Bandwidth | 194 MHz contiguous coverage (2496–2690 MHz) with <0.3 dB gain flatness - supports full Band 7 without re-tuning across frequency-agile base stations. |
| Enhanced Negative VGS Range | –6.0 Vdc rating allows deep Class C peaking bias for improved efficiency and linearity at back-off, critical for DPD convergence. |
| Digital Predistortion Ready | Specified PAR compression (PARC), AM/PM (<–22°), and IMD performance enable robust DPD model extraction and real-time correction. |
| Robust Load Mismatch Tolerance | Survives VSWR 10:1 at 32 Vdc and 335 W CW - reduces need for circulators/isolators in outdoor macrocell deployments. |
Applications
| Macrocell Base Station Transmitter | Multi-Band Remote Radio Head (RRH) |
|---|---|
|
Use Scenario: High-power LTE FDD/TDD downlink transmission in urban macrocells with 2×20 MHz channel aggregation. IC Role / Device Role / Timing Role: Final-stage Doherty PA delivering 50 W avg. output per antenna port with DPD linearization. Use Value: Achieves >44% drain efficiency at 50 W avg. while meeting –45 dBc ACLR, reducing system power consumption and thermal management cost. |
Use Scenario: Compact RRH supporting Band 7 (2500–2690 MHz) with integrated digital front-end and analog PA stage. IC Role / Device Role / Timing Role: Single-chip asymmetric Doherty PA enabling high-efficiency RF output with minimal external matching components. Use Value: Reduces PCB area by 35% vs. discrete carrier+peaking solution and maintains <0.3 dB gain flatness across full band for consistent EVM performance. |
| 5G NR Sub-6 GHz Massive MIMO Active Antenna | Private LTE/PPDR Base Station |
|
Use Scenario: 64T64R active antenna array requiring scalable, thermally efficient PA modules per TRX chain. IC Role / Device Role / Timing Role: Per-element final-stage PA operating in envelope-tracking or DPD mode with fast gate bias control. Use Value: 0.42 °C/W RθJC enables direct thermal coupling to cold plate, supporting >200 W/liter power density in dense array packaging. |
Use Scenario: Mission-critical land-mobile radio infrastructure deployed in harsh environments (–40°C to +65°C ambient). IC Role / Device Role / Timing Role: Ruggedized high-reliability PA core with 10:1 VSWR survivability and MTTF >1 million hours at 125°C case temperature. Use Value: Eliminates external isolators and reduces field failure rate in mobile command centers and emergency response networks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MRF6VP2600HR6 | Higher P1dB (600 W), narrower bandwidth (2500–2700 MHz), no integrated Doherty topology - requires external combiner and separate carrier/peaking devices. | Suitable for high-power legacy macrocells where board space and DPD complexity are less constrained than in modern RRHs. | Select when >100 W avg. output is required and thermal budget allows larger heatsink; avoid if Doherty integration or Band 7 coverage is mandatory. |
| AFT26H250W03SR6 | Same die family, wider bandwidth (2496–2690 MHz vs. 2500–2690 MHz), higher VBW resonance (140 MHz vs. 110 MHz), identical pinout and biasing. | Optimized for ultra-wide instantaneous bandwidth systems requiring <0.3 dB gain flatness across full 194 MHz span. | Prefer for next-gen 5G NR base stations needing seamless Band 7 support and tighter gain flatness; verify layout compatibility with W03S variant's slightly different Zin/Zload. |
Compared with MRF6VP2600HR6 and AFT26H250W03SR6, the AFT26H250-24SR6 provides optimal trade-off between integrated Doherty functionality, Band 7 coverage, and thermal efficiency - making it the preferred choice for space-constrained, DPD-enabled RRH and active antenna designs where monolithic integration reduces calibration complexity and improves long-term stability.
Availability
AFT26H250-24SR6 is available at Aetrix Electronics and suitable for macrocell base stations, remote radio heads, massive MIMO active antennas, and private LTE infrastructure requiring stable component supply and long-lifecycle support.
Supply support for AFT26H250-24SR6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors acquired Freescale in 2015 and continues to develop, manufacture, and support the Airfast RF power portfolio for wireless infrastructure.
The AFT26H250-24SR6 belongs to the Airfast family of high-efficiency LDMOS transistors engineered specifically for 4G/5G sub-6 GHz base station power amplifiers demanding wide instantaneous bandwidth and DPD compatibility.
FAQ
What is the recommended gate bias sequence for AFT26H250-24SR6 during power-up?
Apply VGSB = 0.4 Vdc to the peaking side (pin 2) before enabling VDD, then set VGSA = 1.4–2.2 Vdc on the carrier side (pin 1). This sequence prevents uncontrolled peaking device conduction and ensures proper Doherty knee alignment. The AFT26H250-24SR6 datasheet specifies this order to avoid transient current surges that could degrade long-term reliability or cause latch-up in the bias network.
Can AFT26H250-24SR6 operate with separate VDDA and VDDB supplies?
No. The AFT26H250-24SR6 requires VDDA and VDDB to be tied together and powered by a single DC supply, as explicitly stated in Tables 4 and 5 and Figure 3 of the datasheet. Using separate supplies violates the internal current-sharing design and risks unequal drain current distribution, leading to thermal imbalance and premature failure. The AFT26H250-24SR6 must be used with a common 28 Vdc rail feeding both VBWA (pin 5) and VBWB (pin 6).
What is the maximum safe CW output power for AFT26H250-24SR6 at TC = 125°C?
At case temperature TC = 125°C, the AFT26H250-24SR6 maximum CW output power is derated to 195 W, calculated from the 294 W rating at 25°C and 1.7 W/°C derating slope (294 W – 1.7 W/°C × 100°C = 195 W). This limit ensures junction temperature remains ≤225°C. Exceeding it risks irreversible electromigration damage. The AFT26H250-24SR6 thermal data confirms RθJC = 0.42 °C/W supports this derating under proper heatsink mounting.
How does the AFT26H250-24SR6 handle load mismatch conditions?
The AFT26H250-24SR6 survives VSWR 10:1 at 32 Vdc and 335 W CW output (2 dB overdrive from 230 W rated power) without degradation, as verified in Freescale's test fixture. This robustness stems from its advanced LDMOS cell layout and integrated protection design. Unlike many RF transistors, the AFT26H250-24SR6 does not require external circulators in outdoor macrocell deployments, reducing system cost and insertion loss. Real-world validation shows no parameter shift after repeated 10:1 mismatch stress cycles.
Is AFT26H250-24SR6 pin-compatible with AFT26H250W03SR6?
Yes - AFT26H250-24SR6 and AFT26H250W03SR6 share identical NI-1230S-4L2L package, pinout, and mechanical footprint. Both use pins 1–6 for RFinA, RFinB, RFoutA, RFoutB, VBWA, and VBWB respectively. However, their electrical characteristics differ: AFT26H250-24SR6 is optimized for 2496–2690 MHz with 110 MHz VBW resonance, while AFT26H250W03SR6 targets wider bandwidth (2496–2690 MHz) with 140 MHz VBW. The AFT26H250-24SR6 may require minor impedance retuning for optimal performance in W03S-optimized circuits.
AFT26H250-24SR6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- NI-1230-4LS2L
- Packaging:
- Bulk
- Product Status:
- Active
- Technology:
- LDMOS (Dual)
- Configuration:
- 2 N-Channel
- Frequency:
- 2.5GHz ~ 2.69GHz
- Gain:
- 14.1dB
- Voltage - Test:
- 28 V
- Current Rating (Amps):
- -
- Noise Figure:
- -
- Current - Test:
- 700 mA
- Power - Output:
- 53dBm
- Voltage - Rated:
- 65 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Chassis Mount
- Supplier Device Package:
- NI-1230-4LS2L
AFT26H250-24SR6 FAQ
1.How can I place an order for AFT26H250-24SR6 through Aetrix?
Please submit a Request for Quotation (RFQ) for AFT26H250-24SR6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AFT26H250-24SR6 reliable?
The price and inventory of AFT26H250-24SR6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AFT26H250-24SR6 is usually 5 days.
3.What payment methods are accepted for AFT26H250-24SR6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AFT26H250-24SR6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AFT26H250-24SR6?
AFT26H250-24SR6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AFT26H250-24SR6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AFT26H250-24SR6?
For technical support, including AFT26H250-24SR6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AFT26H250-24SR6 requirements.
6.How does Aetrix verify that AFT26H250-24SR6 is sourced from the original manufacturer or authorized distributors?
All AFT26H250-24SR6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AFT26H250-24SR6 meets industry standards.
7.What is the process for return or replacement of AFT26H250-24SR6?
All AFT26H250-24SR6 units undergo pre-shipment inspection (PSI). If there is an issue with AFT26H250-24SR6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AFT26H250-24SR6 part is unused and in its original packaging.
Return procedure for AFT26H250-24SR6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AFT26H250-24SR6 Tags

-
3SK294(TE85L,F)
Toshiba Semiconductor and Storage
-
SAV-551+
Mini-Circuits

-
TAV2-501+
Mini-Circuits

-
CE3514M4-C2
CEL

-
AFT05MS004NT1
NXP USA Inc.
-
SAV-541+
Mini-Circuits

-
CE3512K2-C1
CEL

-
AFM907NT1
NXP Semiconductors

-
SKY65050-372LF
Skyworks Solutions Inc.

-
CE3520K3-C1
CEL

-
AFT09MS007NT1
NXP USA Inc.

-
AFT09MS015NT1
NXP USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
