Asahi Kasei Microdevices/AKM AK1543

Overview

The AK1543 from AsahiKASEI is a 400–1300 MHz Delta-Sigma Fractional-N PLL frequency synthesizer with dual charge pumps (10.6 µA–168.9 µA normal / 0.84–2.32 mA fast lockup), 18-bit modulator, and 24-pin QFN (4×4 mm) package. It integrates a low-noise phase-frequency detector, programmable prescaler (8/9 or 16/17), and on-chip lock detect for RF local oscillator synthesis in wireless transceivers.

For engineers reviewing the AK1543 datasheet, AK1543 pinout, AK1543 application, or AK1543 equivalent, this page delivers verified functional architecture, register-controlled fast-lock timing, dual-supply operation (PVDD/CPVDD), and precise analog/digital lock detect selection - all critical for RF PLL loop design and VCO integration.

Technical Context

The AK1543 implements a 2²⁰-denominator fractional-N architecture using an 18-bit Delta-Sigma modulator to suppress spurs and reduce phase noise. Its dual-module prescaler (P/P+1) supports integer division ratios from 201–16383 (P=8) or 521–32767 (P=16), enabling wideband frequency coverage with fine resolution.

It features two independent charge pumps: Charge Pump 1 (normal mode, 16-step current control) and Charge Pump 2 (fast lockup mode, 8-step current control), switched via internal timer triggered by register D[16]=FASTEN. Lock detection is configurable as analog (PFD output) or digital (63-cycle phase-error validation).

Key Specifications

Pinout & Package

Package: 24-pin QFN, 4.0 × 4.0 × 0.7 mm, 0.5 mm pitch, exposed thermal pad (recommended grounded).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fractional-N synthesizer applications.

Compared with LMX2531LQ1725E and ADF4351, the AK1543 offers superior phase noise floor in its 400–1300 MHz band, deterministic fast-lock timing via hardware timer, and true dual-supply separation - making it optimal for high-reliability RF systems demanding predictable lock behavior and analog-domain noise control.

Availability

The AK1543 is available at Aetrix Electronics and suitable for wireless infrastructure, automotive radar, industrial IoT gateways, and test equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for AK1543 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

AsahiKASEI is a Japanese semiconductor manufacturer specializing in mixed-signal ICs for communications, industrial, and automotive applications, with core expertise in RF synthesis and precision analog design.

The AK1543 belongs to AsahiKASEI's high-performance RF synthesizer product line, designed specifically for low-phase-noise, fast-switching PLL systems in base stations, radar, and spectrum-critical instrumentation.

FAQ

What is the maximum operating frequency supported by the AK1543?

The AK1543 supports an RF input frequency range of 400 MHz to 1300 MHz at its RFINP/RFINN pins. This range is achieved using its dual-modulus prescaler (8/9 or 16/17) and is validated across the full −40°C to +85°C temperature range. The AK1543 itself does not generate RF output - it drives an external VCO, so final output frequency depends on the VCO and loop filter design.

How does the fast lockup mode function in the AK1543?

The AK1543 fast lockup mode activates Charge Pump 2 (0.84–2.32 mA) for a user-defined duration set by FAST[12:0] in . When FASTEN=1 and a frequency change occurs or PDN2 transitions Low→High, the internal timer triggers the switch from CP1 to CP2. After the timer expires, it reverts to CP1. This reduces lock time significantly without altering loop filter topology - the AK1543 handles reconfiguration internally.

Can the AK1543 operate with separate supply voltages for digital and analog sections?

Yes. The AK1543 supports independent supplies: PVDD (pins 18, 20) powers digital logic and the on-chip LDO, while CPVDD (pin 1) powers only the charge pumps. This separation minimizes digital switching noise coupling into the sensitive analog synthesis path - a key advantage over single-supply synthesizers. Both rails operate from 2.7 V to 5.5 V.

What is the role of the BIAS pin on the AK1543?

The BIAS pin (Pin 19) sets the full scale for both Charge Pump 1 and Charge Pump 2 currents. A 22–33 kΩ resistor connected here defines the minimum current step; register settings (CP1[3:0], CP2[2:0]) then scale that baseline. For example, with a 27 kΩ resistor, CP1_min = 10.6 µA and CP2_min = 0.84 mA - values directly used in the AK1543's current calculation formulas.

How is lock detection implemented on the AK1543?

The AK1543 provides two lock detection methods selected via the LD bit in . When LD=1, the LD pin outputs the raw analog PFD output (analog lock detect). When LD=0, it performs digital lock detection - asserting "High" only after 63 consecutive phase-error measurements fall below threshold T. This dual-mode capability allows system-level trade-offs between response speed and false-lock immunity.