Texas Instruments AM1705DPTP3
- Part No.:
- AM1705DPTP3
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 176-LQFP Exposed Pad
- Datasheet:
-
AM1705DPTP3.pdf
- Description:
- IC MPU SITARA 375MHZ 176HLQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,660
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AM1705DPTP3 from Texas Instruments is a 375-MHz ARM926EJ-S™ microprocessor in a 176-pin HLQFP (PTP) package, featuring 16KB instruction and 16KB data caches, 128KB on-chip RAM, and integrated peripherals including 10/100 Mbps Ethernet MAC (RMII), three UARTs (one with RTS/CTS), two McASPs, USB 2.0 OTG with PHY, and PRUSS dual real-time co-processors. It targets industrial automation and portable data terminals requiring deterministic I/O control and OS support.
For engineers reviewing the AM1705DPTP3 datasheet, AM1705DPTP3 pinout, AM1705DPTP3 application, or AM1705DPTP3 equivalent, this page delivers verified technical context, validated pin functions, confirmed peripheral capabilities (eHRPWM, eCAP, eQEP, EMAC, EDMA3), and real-world selection guidance for embedded Linux or RTOS-based designs with mixed-signal timing and connectivity requirements.
Technical Context
The AM1705DPTP3 implements an ARMv5TEJ-compliant ARM926EJ-S core with MMU, VIVT caches, and Embedded ICE-RT™ debug support. Its memory subsystem includes 8KB vector RAM, 64KB ROM, and 128KB SRAM mapped at 0x8000_0000–0x8001_FFFF, accessible via AHB bus with configurable protection units.
Peripherals are organized into dedicated AHB slaves: EMAC uses RMII with MDIO; USB0 integrates full-speed OTG PHY; McASPs support TDM/I2S with FIFOs; EDMA3 provides 32 independent DMA channels and 8 QDMA channels; PRUSS delivers deterministic real-time I/O offload via two 32-bit RISC cores with 4KB IRAM and 512B DRAM each.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM926EJ-S @ 375 MHz (1.2V core), supports ARM/Thumb instructions, Jazelle Java acceleration, and MMU for full OS virtual memory management. |
| Memory | 16KB I-cache + 16KB D-cache (4-way VIVT), 8KB vector RAM, 64KB ROM, 128KB on-chip SRAM - enables fast boot, deterministic interrupt latency, and local code/data execution without external memory. |
| EMAC Interface | IEEE 802.3-compliant 10/100 Mbps Ethernet with RMII physical layer and MDIO management - supports embedded networking with minimal external components. |
| USB | USB 2.0 OTG controller with integrated PHY, supporting full-speed client and host modes plus four configurable endpoints - eliminates need for external transceiver in portable or field-deployable devices. |
| Real-Time Subsystem | PRUSS with two independent 32-bit RISC cores, 4KB IRAM + 512B DRAM per core, clock-gated power control - handles time-critical I/O (PWM, capture, encoder) without CPU intervention. |
| eHRPWM | Three modules, each supporting 6 single-edge or 6 dual-edge symmetric PWM outputs with dead-band generation and trip-zone inputs - suitable for motor control and digital power conversion. |
| Package | 176-pin HLQFP (PTP), 24 mm × 24 mm, 0.5-mm pitch, PowerPAD™ thermal pad - requires standard QFP reflow profile and provides robust thermal dissipation for industrial ambient temperatures. |
Pinout & Package
AM1705DPTP3 is housed in a 176-pin HLQFP (PTP) package with exposed thermal pad (Pin 177 = SS). Pin functions are multiplexed across eight GPIO banks and dedicated peripheral interfaces. The package supports industrial temperature range (–40°C to 85°C) and requires 3.3-V I/O with separate 1.2-V core supply.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (AXR1[0]/GP4[0]) | McASP1 Receive Data / General-Purpose I/O | Primary serial audio input for McASP1; configurable as GPIO with interrupt/event capability - used for synchronous digital audio acquisition or custom protocol signaling. |
| Pin 111 (AXR0[0]/RMII_TXD[0]/GP3[0]) | RMII Ethernet Transmit Data Bit 0 | First bit of 2-bit RMII TX data bus; must be routed with matched length to other RMII signals - enables compact 10/100 Ethernet interface with no external PHY. |
| Pin 137 (USB0_DP) | USB 2.0 Differential Data+ (Full-Speed) | Integrated USB PHY differential pair; requires 90-Ω controlled impedance routing - allows direct connection to USB connector without external transceiver. |
| Pin 146 (RESET) | Active-Low Asynchronous Reset Input | Resets entire device including ARM core, PRUSS, and peripherals; asserted during power-up sequencing and external fault conditions - critical for system reliability and safe startup. |
| Pin 177 (SS) | Thermal Pad (Exposed Die Attach) | Electrically connected to substrate ground; must be soldered to PCB ground plane for thermal conduction and EMI reduction - improves junction temperature by up to 15°C under full load. |
Key Features
| Feature | Design Value |
|---|---|
| ARM926EJ-S with MMU | Enables Linux, Android, or Windows CE deployment with hardware memory protection, process isolation, and virtual address translation - essential for secure multi-tasking systems. |
| PRUSS Dual-Core Subsystem | Offloads time-critical tasks (e.g., PWM synchronization, quadrature decoding, custom protocol engines) from ARM core - preserves CPU bandwidth for application logic and UI rendering. |
| EDMA3 Controller | 32 independent channels + 8 QDMA channels eliminate CPU overhead for high-throughput data movement between peripherals and memory - critical for audio streaming, Ethernet packet handling, and sensor data aggregation. |
| Integrated USB 2.0 OTG PHY | Reduces BOM cost and board space by embedding full-speed transceiver - supports device enumeration, host enumeration, and OTG role switching without external ICs. |
| RMII Ethernet Interface | Minimizes pin count and routing complexity for 10/100 Mbps connectivity - compatible with low-cost Ethernet magnetics and eliminates MII's 16-bit parallel bus. |
| eCAP/eQEP Modules | Three 32-bit enhanced capture modules (configurable as APWM) and two quadrature encoder interfaces enable precise position/speed measurement and servo control - supports industrial motion control without FPGA assistance. |
Applications
| Industrial PLC I/O Module | Portable HMI Terminal |
|---|---|
|
Use Scenario: Compact DIN-rail-mounted controller collecting analog/digital sensor data, driving relays and stepper motors, and communicating via Ethernet and USB. IC Role / Device Role / Timing Role: Central processing unit executing real-time control loops, managing EtherNet/IP stack, and synchronizing PWM outputs via eHRPWM with sub-microsecond jitter. Use Value: PRUSS handles encoder feedback and pulse train generation independently, while ARM runs Linux-based web server and Modbus TCP - enabling deterministic I/O and rich remote diagnostics. |
Use Scenario: Battery-powered handheld terminal with touchscreen, barcode scanner, and Wi-Fi/Ethernet backhaul for warehouse inventory management. IC Role / Device Role / Timing Role: Application processor running embedded Linux, managing USB HID keyboard/mouse, serial barcode interface, and RMII Ethernet link with low-latency packet scheduling. Use Value: Integrated 128KB SRAM stores firmware and display buffers locally; USB OTG allows field firmware updates via flash drive - eliminating need for external NOR/NAND in cost-sensitive designs. |
| Test & Measurement Instrument | Home Automation Gateway |
|
Use Scenario: Benchtop oscilloscope or signal generator with high-resolution display, analog front-end ADC/DAC, and LAN/USB connectivity. IC Role / Device Role / Timing Role: Host processor coordinating McASP audio streaming, eCAP timestamping of trigger events, and Ethernet-based SCPI command parsing with <100 µs response latency. Use Value: EDMA3 transfers waveform samples directly from McASP FIFO to DDR memory; ARM caches execute FFT algorithms - achieving real-time spectral analysis without external DSP. |
Use Scenario: Smart home hub aggregating Zigbee, Z-Wave, and Bluetooth LE devices, exposing REST API over Wi-Fi/Ethernet, and rendering local UI on LCD. IC Role / Device Role / Timing Role: Main SoC running OpenWrt/Linux, managing multiple concurrent wireless stacks via UART/SPI bridges, and serving web UI from local NAND flash. Use Value: Three UARTs support simultaneous Zigbee coordinator, Z-Wave module, and debug console; MMC/SD interface enables field-upgradable firmware storage - simplifying certification and maintenance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ARM microprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM1808BZWT | ARM9-based, 456-MHz max, adds SATA, PCIe, and dual EMAC; larger 361-pin BGA package; higher power consumption. | Targeted at higher-bandwidth industrial gateways requiring dual Ethernet or storage expansion - not pin-compatible and requires new PCB layout. | Select AM1808BZWT only when SATA/PCIe or second EMAC is required; AM1705DPTP3 remains optimal for cost- and size-constrained single-EMAC designs. |
| AM3352BZCZ100 | ARM Cortex-A8, 1-GHz, adds 3D graphics, PRU-ICSS (enhanced PRU), and broader peripheral set; 324-pin BGA; higher performance but greater complexity. | Suitable for advanced HMIs with OpenGL ES rendering or real-time industrial protocols (EtherCAT, PROFINET) requiring PRU-ICSS offload - incompatible package and software migration path. | Choose AM3352BZCZ100 for next-generation designs needing >500 DMIPS or graphics acceleration; AM1705DPTP3 offers proven stability and lower BOM cost for established ARM9-based platforms. |
Compared with AM1808BZWT and AM3352BZCZ100, the AM1705DPTP3 delivers optimal balance of deterministic real-time I/O (via PRUSS/eHRPWM), integrated connectivity (USB OTG + RMII), and low-power ARM9 performance in a compact QFP - making it ideal for cost-sensitive, thermally constrained industrial edge nodes where upgrade path maturity matters more than raw throughput.
Availability
AM1705DPTP3 is available at Aetrix Electronics and suitable for industrial automation, portable data terminals, and test and measurement equipment requiring stable component supply, long-term lifecycle support, and qualified manufacturing traceability.
Supply support for AM1705DPTP3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of experience delivering reliable, high-performance silicon for industrial and automotive markets.
The AM1705DPTP3 belongs to TI's Sitara™ ARM processor family, designed specifically for cost-optimized, real-time embedded applications requiring OS support, rich peripheral integration, and deterministic I/O control - bridging the gap between microcontrollers and application processors.
FAQ
What is the maximum operating frequency of the AM1705DPTP3?
The AM1705DPTP3 operates at a maximum frequency of 375 MHz when powered with a 1.2-V core supply. This speed is specified under industrial temperature conditions (–40°C to 85°C) and is supported by TI's production data sheet SPRS657F. The AM1705DPTP3 does not support the 456-MHz variant - that version uses a different suffix (e.g., AM1705DPPT) and requires 1.3-V core voltage.
Does the AM1705DPTP3 include an integrated USB PHY?
Yes, the AM1705DPTP3 integrates a full-speed USB 2.0 OTG PHY on-die, supporting both device and host roles without external transceivers. Pins USB0_DP (137) and USB0_DM (138) are the differential pair; USB0_VDDA33 (140) supplies the analog PHY domain. This integration reduces bill-of-materials cost and PCB area versus solutions requiring discrete PHY ICs.
Can the AM1705DPTP3 run Linux operating systems?
Yes, the AM1705DPTP3 supports Linux distributions including TI's Processor SDK Linux and community-supported Ångström and Buildroot. Its ARM926EJ-S core includes an MMU, 16KB I-cache and 16KB D-cache, and 128KB on-chip RAM - all essential for booting and running full-featured Linux kernels with user-space applications and network stacks.
What is the function of the PRUSS in the AM1705DPTP3?
The Programmable Real-Time Unit Subsystem (PRUSS) in the AM1705DPTP3 consists of two independent 32-bit RISC cores, each with 4KB instruction RAM and 512 bytes data RAM. It executes time-critical tasks like PWM generation, quadrature decoding, and custom protocol handling - freeing the ARM9 core for higher-level OS and application duties while guaranteeing sub-microsecond response times.
Is the AM1705DPTP3 pin-compatible with other Sitara processors?
No, the AM1705DPTP3 is not pin-compatible with other Sitara processors such as AM1808 or AM3352. It uses a unique 176-pin HLQFP (PTP) package with specific pin assignments documented in Section 3.5 of SPRS657F. Migration to other Sitara devices requires PCB redesign due to differing package types (e.g., BGA), pin counts, and peripheral mappings.
AM1705DPTP3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 176-LQFP Exposed Pad
- Series:
- Sitara™
- Packaging:
- Tube
- Product Status:
- Active
- Core Processor:
- ARM926EJ-S
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 375MHz
- Co-Processors/DSP:
- System Control; CP15
- RAM Controllers:
- SDRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + PHY (1)
- Voltage - I/O:
- 1.8V, 3.3V
- Operating Temperature:
- 0°C ~ 90°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 176-HLQFP (24x24)
- Additional Interfaces:
- I2C, McASP, SPI, MMC/SD, UART
AM1705DPTP3 FAQ
1.How can I place an order for AM1705DPTP3 through Aetrix?
Please submit a Request for Quotation (RFQ) for AM1705DPTP3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AM1705DPTP3 reliable?
The price and inventory of AM1705DPTP3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM1705DPTP3 is usually 5 days.
3.What payment methods are accepted for AM1705DPTP3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AM1705DPTP3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AM1705DPTP3?
AM1705DPTP3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AM1705DPTP3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AM1705DPTP3?
For technical support, including AM1705DPTP3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM1705DPTP3 requirements.
6.How does Aetrix verify that AM1705DPTP3 is sourced from the original manufacturer or authorized distributors?
All AM1705DPTP3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM1705DPTP3 meets industry standards.
7.What is the process for return or replacement of AM1705DPTP3?
All AM1705DPTP3 units undergo pre-shipment inspection (PSI). If there is an issue with AM1705DPTP3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AM1705DPTP3 part is unused and in its original packaging.
Return procedure for AM1705DPTP3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AM1705DPTP3 Tags

-
AT91SAM9260B-CU-999
Microchip Technology

-
AT91SAM9G25-CU
Microchip Technology

-
ATSAMA5D27C-CU
Microchip Technology

-
AT91SAM9X35-CU
Microchip Technology

-
AT91SAM9X25-CU
Microchip Technology

-
MCIMX6Y2CVM08AB
NXP Semiconductors
-
AM3352BZCZ100
Texas Instruments

-
AT91SAM9260B-CU
Microchip Technology

-
AT91SAM9260B-QU
Microchip Technology

-
ATSAMA5D31A-CU
Microchip Technology

-
AT91SAM9G20B-CU-999
Microchip Technology

-
MCIMX6Y2CVM05AB
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

