Texas Instruments AM1707DZKBA3
- Part No.:
- AM1707DZKBA3
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 256-BGA
- Datasheet:
-
AM1707DZKBA3.pdf
- Description:
- IC MPU SITARA 375MHZ 256BGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AM1707DZKBA3 from Texas Instruments is a 375-MHz ARM926EJ-S™ microprocessor in a 256-ball PBGA (ZKB) package, featuring 16KB instruction cache, 16KB data cache, 128KB on-chip RAM, and integrated peripherals including 10/100-Mbps EMAC, USB 2.0 OTG, USB 1.1 OHCI host, three McASP audio ports, and dual external memory interfaces (EMIFA/EMIFB). It targets industrial automation and portable data terminals requiring real-time OS support and deterministic I/O.
For engineers reviewing the AM1707DZKBA3 datasheet, AM1707DZKBA3 pinout, AM1707DZKBA3 application, or AM1707DZKBA3 equivalent, key selection criteria include CPU frequency grade (375 MHz @ 1.2 V), 256-ball 1.0-mm-pitch PBGA thermal profile, EMAC RMII interface compatibility, McASP FIFO buffer depth, and eHRPWM dead-band generation capability for motor control timing precision.
Technical Context
The AM1707DZKBA3 implements an ARMv5TEJ-compliant 32-bit RISC core with MMU, separate Harvard caches, and embedded trace (ETM/ETB). Its subsystem integrates clock-gated peripherals under a unified PSC domain, enabling selective power-down of EMAC, USB, McASP, or timers without affecting CPU operation.
It supports dual external memory interfaces: EMIFA handles 8-/16-bit NAND/NOR/SDRAM up to 128 MB, while EMIFB manages 16-/32-bit SDRAM up to 256 MB. The PRUSS subsystem provides two independent programmable real-time units with 4KB instruction RAM and 512-byte data RAM per core-enabling offload of time-critical I/O tasks from the ARM core.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM926EJ-S at 375 MHz (1.2-V nominal supply); enables Linux/RTOS execution with MMU-based memory protection. |
| On-Chip Memory | 128KB SRAM + 64KB ROM + 8KB vector RAM; eliminates need for external boot ROM and reduces BOM count for basic firmware storage. |
| Cache | 16KB instruction cache + 16KB data cache (4-way associative, VIVT); improves code/data fetch efficiency for deterministic real-time response. |
| EMAC Interface | 10/100-Mbps Ethernet MAC with RMII and MDIO; supports IEEE 802.3 compliance using only 7 pins and external PHY configuration via MDIO bus. |
| USB Interfaces | USB 2.0 OTG (high/full/low-speed) + USB 1.1 OHCI host (full-speed); enables dual-role connectivity without external transceivers or hub ICs. |
| Audio I/O | Three McASP ports with 28 serial data pins, TDM/I2S support, and dedicated FIFO buffers; allows simultaneous multi-channel audio capture/playback with DMA-driven low-CPU-load streaming. |
| eHRPWM | Three enhanced PWM modules with dead-band generation, carrier chopping, and trip-zone inputs; supports precise gate-drive timing for BLDC motor inverters and digital power supplies. |
Pinout & Package
AM1707DZKBA3 uses a 256-ball Pb-free plastic ball grid array (PBGA) package with 1.0-mm ball pitch and 17.0 mm × 17.0 mm body size. Thermal resistance θJA = 25.2°C/W (JEDEC Std-51-2, 4-layer board).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_CORE | Core Power Supply | 1.2-V nominal supply for ARM926EJ-S core; requires tight regulation (±3%) and local decoupling for stable 375-MHz operation. |
| VDD_IO | I/O Power Supply | 3.3-V supply for all GPIO, UART, SPI, I2C, McASP, and EMAC I/O banks; tolerant of 3.3-V LVCMOS logic levels. |
| CLKIN | External Clock Input | Accepts 24-MHz crystal or oscillator input for PLL reference; used to generate internal 375-MHz CPU clock and peripheral clocks. |
| USB0_VDDA12 | USB0 PHY Analog Supply | 1.2-V analog supply for integrated USB 2.0 OTG PHY; must be filtered with 1-µF ceramic capacitor per TI design guidelines. |
| MDIO / MDC | EMAC Management Interface | Two-pin MDIO/MDC bus for configuring external Ethernet PHY registers; enables runtime PHY parameter tuning without reset. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Real-Time Unit Subsystem (PRUSS) | Two independent PRU cores (4KB IRAM + 512B DRAM each) offload deterministic I/O tasks-e.g., encoder pulse counting or custom protocol bit-banging-freeing ARM for high-level OS duties. |
| Enhanced Direct Memory Access (EDMA3) | 32 independent channels + 8 QDMA channels enable zero-CPU-overhead transfers between McASP FIFOs, EMAC buffers, and SDRAM-critical for real-time audio/video streaming. |
| Triple Multichannel Audio Serial Ports (McASP) | Each McASP supports 16/12/4 serializers, DIT-capable (McASP2), and configurable clock zones-enables simultaneous stereo I2S playback, TDM microphone array capture, and S/PDIF output on one device. |
| eCAP Modules | Three 32-bit enhanced capture modules configurable as edge-triggered time-stamp units or auxiliary PWM outputs-ideal for measuring motor encoder period/frequency or generating complementary gate signals. |
| External Memory Interfaces | EMIFA (NAND/NOR/SDRAM) + EMIFB (high-speed SDRAM) provide flexible memory expansion: EMIFA supports legacy flash boot, EMIFB enables fast framebuffer access for LCD applications. |
Applications
| Industrial PLC Controller | Portable Data Terminal |
|---|---|
Use Scenario: Compact programmable logic controller handling discrete I/O, motion profiling, and HMI communication over EtherNet/IP. IC Role / Device Role / Timing Role: Central processing unit executing real-time control loops, managing EMAC-based fieldbus stack, and driving eHRPWM outputs for servo drive modulation. Use Value: Integrated PRUSS handles high-frequency encoder feedback (eQEP) and PWM update timing independently, ensuring sub-microsecond jitter for closed-loop position control. |
Use Scenario: Rugged handheld terminal scanning barcodes, capturing signatures, and transmitting data via Wi-Fi/Ethernet backhaul. IC Role / Device Role / Timing Role: Main application processor running Linux, interfacing with USB HID scanner, McASP-connected audio codec, and EMAC for wired LAN upload. Use Value: On-chip 128KB RAM serves as DMA buffer for high-throughput barcode image transfer; McASP FIFOs prevent audio dropouts during concurrent data transmission. |
| Home Automation Gateway | Test & Measurement Instrument |
Use Scenario: Central hub aggregating Zigbee/Z-Wave sensor data, rendering web UI, and controlling lighting via DALI or 0–10V analog outputs. IC Role / Device Role / Timing Role: Application host managing multiple wireless stacks, serving HTML pages via lightweight web server, and generating PWM-dimmed lighting control signals. Use Value: Three eHRPWM modules deliver synchronized dimming across RGBW channels with hardware-enforced dead-band to prevent MOSFET shoot-through. |
Use Scenario: Portable oscilloscope or signal generator with analog front-end ADC/DAC, touchscreen GUI, and USB PC connectivity. IC Role / Device Role / Timing Role: Real-time waveform acquisition engine using eCAP for precise trigger timestamping and EDMA3 to stream samples directly to SDRAM. Use Value: Dedicated 64-bit general-purpose timer provides nanosecond-resolution timebase for sample interval calibration; McASP supports direct connection to audio DAC/ADC codecs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ARM microprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM1808ZCH25 | ARM926EJ-S at 456 MHz (1.3-V core), adds SATA controller and DDR2 interface; larger 361-ball PBGA package. | Better suited for high-throughput storage gateway or video analytics where SATA bandwidth and DDR2 capacity outweigh footprint constraints. | Select AM1808ZCH25 when >375-MHz CPU performance, SATA host capability, or DDR2 memory bandwidth are required-AM1707DZKBA3 remains optimal for cost-sensitive industrial I/O nodes. |
| AM3352BZCZ100 | ARM Cortex-A8 at 1 GHz, PRU-ICSS instead of PRUSS, supports DDR3/LPDDR2, lacks integrated USB PHY (requires external transceiver). | Targets higher-performance HMI, multimedia, or industrial networking where Cortex-A8 NEON acceleration and Gigabit EMAC are critical. | Choose AM3352BZCZ100 for Linux-based GUI applications needing >1-GHz throughput; AM1707DZKBA3 offers lower power, smaller footprint, and integrated USB PHY for simpler USB peripheral designs. |
Compared with AM1808ZCH25 and AM3352BZCZ100, the AM1707DZKBA3 delivers optimal balance of deterministic real-time I/O (via PRUSS/eCAP/eHRPWM), integrated USB PHYs, and compact 256-ball PBGA-making it ideal for space-constrained industrial controllers where 375-MHz ARM9 performance suffices and SATA/DDR3 are unnecessary.
Availability
AM1707DZKBA3 is available at Aetrix Electronics and suitable for industrial automation, portable data terminals, and home automation gateways requiring stable component supply across extended product lifecycles.
Supply support for AM1707DZKBA3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets.
The AM1707DZKBA3 belongs to TI's Sitara™ ARM microprocessor family, designed specifically for cost-sensitive, low-power industrial applications requiring real-time I/O, rich peripheral integration, and long-term availability-without sacrificing Linux or RTOS compatibility.
FAQ
What is the maximum operating frequency of the AM1707DZKBA3?
The AM1707DZKBA3 operates at a maximum frequency of 375 MHz when supplied with a 1.2-V core voltage. This rating is validated across commercial temperature range (0°C to 90°C) and confirmed in TI's SPRS637E datasheet revision June 2014. Higher-frequency variants (e.g., 456 MHz) use different suffixes and require 1.3-V core supply.
Does the AM1707DZKBA3 include an integrated USB PHY?
Yes, the AM1707DZKBA3 integrates both a USB 2.0 OTG PHY (for USB0 port) and a USB 1.1 OHCI PHY (for USB1 host port). These eliminate the need for external transceivers in standard USB device or host configurations, reducing BOM cost and PCB area-confirmed in Section 1.1 Features and Section 6.25–6.26 of the datasheet.
How many independent McASP ports does the AM1707DZKBA3 support?
The AM1707DZKBA3 supports three independent multichannel audio serial ports (McASP0, McASP1, McASP2), each with dedicated FIFO buffers, 16/12/4 serializers, and configurable clock zones. McASP2 additionally supports Digital Interface Transmitter (DIT) functionality for S/PDIF output, as specified in Table 3-1 and Section 6.16 of the datasheet.
What external memory types are supported by the AM1707DZKBA3?
The AM1707DZKBA3 supports NAND Flash, NOR Flash, and SDRAM through two dedicated interfaces: EMIFA handles 8-/16-bit asynchronous memories (up to 128 MB address space), while EMIFB supports 16-/32-bit SDRAM (up to 256 MB). Both interfaces are electrically and logically isolated, allowing concurrent access without arbitration overhead.
Is the PRUSS subsystem present in the AM1707DZKBA3?
Yes, the AM1707DZKBA3 includes a full Programmable Real-Time Unit Subsystem (PRUSS) with two independent PRU cores, each having 4KB instruction RAM and 512 bytes of data RAM. PRUSS can be disabled via software to reduce power consumption, and its register map is documented in Section 6.29 of the datasheet.
AM1707DZKBA3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 256-BGA
- Series:
- Sitara™
- Packaging:
- Bulk
- Product Status:
- Active
- Core Processor:
- ARM926EJ-S
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 375MHz
- Co-Processors/DSP:
- System Control; CP15
- RAM Controllers:
- SDRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 1.1 + PHY (1), USB 2.0 + PHY (1)
- Voltage - I/O:
- 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 256-BGA (17x17)
- Additional Interfaces:
- I2C, McASP, SPI, MMC/SD, UART
AM1707DZKBA3 FAQ
1.How can I place an order for AM1707DZKBA3 through Aetrix?
Please submit a Request for Quotation (RFQ) for AM1707DZKBA3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AM1707DZKBA3 reliable?
The price and inventory of AM1707DZKBA3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM1707DZKBA3 is usually 5 days.
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4.How is shipping managed for AM1707DZKBA3?
AM1707DZKBA3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AM1707DZKBA3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AM1707DZKBA3?
For technical support, including AM1707DZKBA3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM1707DZKBA3 requirements.
6.How does Aetrix verify that AM1707DZKBA3 is sourced from the original manufacturer or authorized distributors?
All AM1707DZKBA3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM1707DZKBA3 meets industry standards.
7.What is the process for return or replacement of AM1707DZKBA3?
All AM1707DZKBA3 units undergo pre-shipment inspection (PSI). If there is an issue with AM1707DZKBA3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AM1707DZKBA3 part is unused and in its original packaging.
Return procedure for AM1707DZKBA3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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