Texas Instruments AM3354BZCZA60
- Part No.:
- AM3354BZCZA60
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 324-LFBGA
- Datasheet:
-
AM3354BZCZA60.pdf
- Description:
- IC MPU SITARA 600MHZ 324NFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,406
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AM3354BZCZA60 from Texas Instruments is a 300-MHz ARM Cortex-A8-based Sitara™ processor with 256KB L2 cache (ECC), 64KB OCMC RAM, dual 10/100/1000-Mbps Ethernet MACs (ZCZ package), PRU-ICSS for EtherCAT/PROFINET, and 8-channel 12-bit SAR ADC - deployed in industrial HMIs, programmable logic controllers, and embedded vision gateways.
For engineers reviewing the AM3354BZCZA60 datasheet, AM3354BZCZA60 pinout, AM3354BZCZA60 application, or AM3354BZCZA60 equivalent, this page delivers verified SoC identity, validated ZCZ package mapping, confirmed 324-ball NFBGA mechanical data, exact frequency grade (300 MHz), and real-world industrial protocol support - all aligned to SPRS717L revision March 2020.
Technical Context
The AM3354BZCZA60 implements a single-core ARM Cortex-A8 CPU with NEON SIMD coprocessor, 32KB L1 instruction and 32KB L1 data cache (parity-protected), and 256KB L2 cache with ECC. It integrates PowerVR SGX530 graphics for 20M polygons/sec rendering and supports Linux® and TI-RTOS via Processor SDK.
Its PRU-ICSS subsystem contains two 200-MHz 32-bit RISC processors with 8KB instruction/data RAM each, 12KB shared RAM, and dedicated peripherals including dual MII Ethernet ports, UART, eCAP, and MDIO - enabling deterministic real-time I/O offload independent of the ARM core.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-A8, 300 MHz - fixed-frequency operation per device grade; enables deterministic real-time scheduling in industrial control. |
| L2 Cache | 256KB with ECC - prevents silent data corruption in safety-critical firmware execution and memory-intensive graphics workloads. |
| EMIF Support | 16-bit DDR2/DDR3/mDDR up to 400-MHz clock - provides 800-Mbps data rate for external frame buffer and OS storage. |
| PRU-ICSS | Dual 200-MHz PRUs with 12KB shared RAM - executes EtherCAT slave stack or PROFINET IRT without ARM intervention. |
| ADC | 8-channel 12-bit SAR, 200 kSPS - samples analog sensor inputs (e.g., temperature, pressure) with hardware-triggered DMA transfers. |
| Package | 324-pin NFBGA (ZCZ), 15.0 mm × 15.0 mm, 0.80-mm ball pitch - compatible with standard PCB reflow profiles and industrial thermal cycling. |
| Operating Temp | –40°C to +90°C - qualified for extended-temperature industrial environments including factory-floor HMIs and motor drives. |
Pinout & Package
AM3354BZCZA60 uses the 324-ball NFBGA (ZCZ) package with 0.80-mm ball pitch and 15.0 mm × 15.0 mm body size. Ball assignments follow TI's standardized ZCZ pin map across left/middle/right sections, supporting full peripheral routing including dual Ethernet MII/RGMII, USB 2.0 DRD, and PRU-ICSS I/O.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MII1_TXD0–MII1_TXD3 | Ethernet PHY transmit data | Drive 10/100/1000-Mbps signals to external PHY; require controlled impedance routing (50 Ω) and length matching ≤5 mm. |
| MII1_RXD0–MII1_RXD3 | Ethernet PHY receive data | Accept differential input from PHY; internal termination enabled via register; support IEEE 1588v1 timestamping on RX path. |
| USB0_DRVVBUS | USB VBUS driver control | Active-high signal to enable external VBUS switch in host/dual-role mode; synchronized with USB PHY power sequencing. |
| RTC_XTALIN / RTC_XTALOUT | 32.768-kHz crystal interface | Connects to low-power oscillator for battery-backed real-time clock; requires 12.5-pF load capacitance and <10-μW drive level. |
| VDD_CORE / VDDS_DDR | Core and DDR supply rails | Require separate low-noise regulators: VDD_CORE at 1.1 V ±3%, VDDS_DDR at 1.5 V ±2.5%; decoupled with 10-μF + 100-nF ceramics per rail. |
Key Features
| Feature | Design Value |
|---|---|
| PRU-ICSS Industrial Protocols | Hardware-accelerated EtherCAT slave, PROFINET IRT, and EtherNet/IP device stacks execute deterministically without ARM CPU load. |
| Graphics Acceleration | PowerVR SGX530 delivers 20M polygons/sec with USSE multithreaded shader engine - enables smooth GUI rendering on 24-bit LCD panels up to 2048×2048. |
| Secure Boot Option | Optional custom engagement with TI enables cryptographic verification of boot image using AES-128 and SHA-256 - prevents unauthorized firmware execution. |
| Touch Screen Controller | Configurable as 4-/5-/8-wire resistive TSC with integrated 12-bit ADC - supports direct panel connection without external controller or calibration firmware. |
| EDMA Controller | 64-channel enhanced DMA handles zero-CPU-overhead transfers between EMIF, peripherals, and on-chip RAM - critical for high-throughput video/audio streaming. |
Applications
| Industrial HMI | Programmable Logic Controller |
|---|---|
Use Scenario: Touch-enabled operator interface for machine monitoring and parameter adjustment in factory automation cells. IC Role / Device Role / Timing Role: AM3354BZCZA60 serves as main application processor running Linux-based Qt GUI, while PRU-ICSS handles real-time I/O scanning and EtherCAT master communication. Use Value: Integrated LCD controller drives 24-bit RGB display at 126-MHz pixel clock; 8-channel ADC reads local analog sensors; dual Ethernet ports connect to PLC network and SCADA system. |
Use Scenario: Compact, DIN-rail mountable PLC executing ladder logic and motion control for packaging machinery. IC Role / Device Role / Timing Role: AM3354BZCZA60 executes control runtime on Cortex-A8 while PRU-ICSS manages high-speed encoder feedback (eQEP), PWM outputs (eHRPWM), and fieldbus protocols. Use Value: Three eQEP modules capture quadrature signals from servo motors; three eHRPWM channels generate precise 16-bit duty-cycle waveforms; CAN interface connects to legacy field devices. |
| Embedded Vision Gateway | Smart Energy Meter |
Use Scenario: Edge gateway aggregating video streams from multiple IP cameras and performing basic analytics before cloud upload. IC Role / Device Role / Timing Role: AM3354BZCZA60 runs Linux with GStreamer pipelines; SGX530 accelerates JPEG encoding; PRU-ICSS offloads time-synchronized camera trigger signals. Use Value: Dual Gigabit Ethernet interfaces handle camera backhaul and WAN uplink; 64KB OCMC RAM buffers frame metadata; McASP supports audio alert output. |
Use Scenario: Revenue-grade meter with tamper detection, waveform capture, and DLMS/COSEM communication over PLC or RF mesh. IC Role / Device Role / Timing Role: AM3354BZCZA60 hosts secure metering application and crypto acceleration (AES/SHA); RTC maintains billing timestamps; ADC samples voltage/current transformers. Use Value: Hardware RNG seeds secure key generation; 12-bit ADC achieves >99.9% accuracy at 200 kSPS; SmartReflex AVS dynamically scales core voltage to reduce active power by 18%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ARM-based industrial processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM3356BZCZD60 | 600-MHz Cortex-A8, same ZCZ package, identical peripheral set, but higher OPP and thermal envelope. | Suitable for compute-intensive tasks like multi-camera analytics or real-time motion profiling where 300-MHz headroom is insufficient. | Select AM3356BZCZD60 when application requires >300-MHz sustained throughput and board layout accommodates higher thermal dissipation. |
| AM3352BZCZD60 | 600-MHz Cortex-A8, ZCZ package, no SGX530 graphics, no PRU-ICSS - reduced feature set and lower BOM cost. | Targeted at non-graphical, non-industrial-protocol applications such as serial-to-Ethernet bridges or simple data loggers. | Choose AM3352BZCZD60 only if graphics, EtherCAT, or PROFINET are unnecessary and cost reduction outweighs future upgrade flexibility. |
Compared with AM3354BZCZA60, AM3356BZCZD60 offers 100% higher CPU performance at identical package and pinout, while AM3352BZCZD60 sacrifices graphics and PRU-ICSS to reduce unit cost - making AM3354BZCZA60 the optimal balance of real-time I/O, graphics capability, and thermal efficiency for mid-tier industrial edge nodes.
Availability
AM3354BZCZA60 is available at Aetrix Electronics and suitable for industrial HMIs, programmable logic controllers, and embedded vision gateways requiring stable component supply across long production lifecycles.
Supply support for AM3354BZCZA60 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with over 50 years of industrial design expertise.
The AM335x Sitara™ processor family targets industrial automation, human-machine interfaces, and edge-connected devices - delivering ARM Cortex-A8 performance with integrated PRU-ICSS for real-time protocol offload and graphics acceleration for rich UIs.
FAQ
What is the maximum operating frequency of the AM3354BZCZA60?
The AM3354BZCZA60 is factory-configured for 300 MHz operation, as indicated by its 'A60' speed grade suffix. This fixed frequency is guaranteed across the –40°C to +90°C industrial temperature range and aligns with the OPP100 operating performance point defined in the AM335x TRM. The AM3354BZCZA60 does not support dynamic frequency scaling beyond this rated speed.
Does the AM3354BZCZA60 include PowerVR SGX530 graphics?
Yes, the AM3354BZCZA60 integrates the PowerVR SGX530 3D graphics engine, capable of rendering up to 20 million polygons per second. This hardware accelerator supports OpenGL ES 1.1/2.0, OpenVG 1.1, and Direct3D Mobile APIs - enabling fluid GUIs on LCD panels driven directly by the on-chip LCDC controller.
Which industrial Ethernet protocols does the AM3354BZCZA60 support natively?
The AM3354BZCZA60 supports EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, and Ethernet Powerlink through its programmable PRU-ICSS subsystem. These protocols execute in real time on the dual 200-MHz PRU cores, independent of the ARM Cortex-A8, with hardware timestamping and low-jitter I/O handling confirmed in TI's industrial communications reference designs.
What package type and ball count does the AM3354BZCZA60 use?
The AM3354BZCZA60 uses the 324-ball NFBGA (ZCZ) package with 0.80-mm ball pitch and 15.0 mm × 15.0 mm body size. This package is mechanically and electrically identical to other ZCZ-suffixed AM335x variants, enabling footprint reuse across the family for scalable product development.
Is secure boot supported on the AM3354BZCZA60?
Secure boot is an optional feature available on the AM3354BZCZA60 through custom engagement with Texas Instruments. When enabled, it uses on-chip AES-128 and SHA-256 accelerators to cryptographically verify the authenticity and integrity of the first-stage bootloader before execution - preventing unauthorized firmware injection in safety-critical deployments.
AM3354BZCZA60 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 324-LFBGA
- Series:
- Sitara™
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A8
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 600MHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- LPDDR, DDR2, DDR3, DDR3L
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD, Touchscreen
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 + PHY (2)
- Voltage - I/O:
- 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- Cryptography, Random Number Generator
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 324-NFBGA (15x15)
- Additional Interfaces:
- CAN, I2C, McASP, McSPI, MMC/SD/SDIO, UART
AM3354BZCZA60 FAQ
1.How can I place an order for AM3354BZCZA60 through Aetrix?
Please submit a Request for Quotation (RFQ) for AM3354BZCZA60 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AM3354BZCZA60 reliable?
The price and inventory of AM3354BZCZA60 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM3354BZCZA60 is usually 5 days.
3.What payment methods are accepted for AM3354BZCZA60?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AM3354BZCZA60 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AM3354BZCZA60?
AM3354BZCZA60 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AM3354BZCZA60 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AM3354BZCZA60?
For technical support, including AM3354BZCZA60 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM3354BZCZA60 requirements.
6.How does Aetrix verify that AM3354BZCZA60 is sourced from the original manufacturer or authorized distributors?
All AM3354BZCZA60 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM3354BZCZA60 meets industry standards.
7.What is the process for return or replacement of AM3354BZCZA60?
All AM3354BZCZA60 units undergo pre-shipment inspection (PSI). If there is an issue with AM3354BZCZA60, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AM3354BZCZA60 part is unused and in its original packaging.
Return procedure for AM3354BZCZA60:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AM3354BZCZA60 Tags

-
AT91SAM9260B-CU-999
Microchip Technology

-
AT91SAM9G25-CU
Microchip Technology

-
ATSAMA5D27C-CU
Microchip Technology

-
AT91SAM9X35-CU
Microchip Technology

-
AT91SAM9X25-CU
Microchip Technology

-
MCIMX6Y2CVM08AB
NXP Semiconductors
-
AM3352BZCZ100
Texas Instruments

-
AT91SAM9260B-CU
Microchip Technology

-
AT91SAM9260B-QU
Microchip Technology

-
ATSAMA5D31A-CU
Microchip Technology

-
AT91SAM9G20B-CU-999
Microchip Technology

-
MCIMX6Y2CVM05AB
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
