Texas Instruments AM5708BCBDJEAR
- Part No.:
- AM5708BCBDJEAR
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 538-LFBGA, FCBGA
- Datasheet:
-
AM5708BCBDJEAR.pdf
- Description:
- IC MPU SITARA 667MHZ 538FCBGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,504
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Product details
Overview
AM5708BCBDJEAR from Texas Instruments is a high-performance Sitara™ Arm applications processor featuring a single-core Arm Cortex-A15 CPU, dual C66x VLIW DSPs, dual Cortex-M4 coprocessors (IPU1/IPU2), IVA-HD video subsystem supporting 4K@15fps H.264 encode/decode, PowerVR SGX544 3D GPU, and PRU-ICSS for real-time industrial communication. It integrates DDR3/DDR3L EMIF (up to 2GB, DDR-1333), PCIe 3.0 (2-lane Gen2), dual CAN, USB 3.0/2.0, and 186 GPIOs - deployed in industrial HMIs, programmable logic controllers, and vision-guided robotics.
For engineers reviewing the AM5708BCBDJEAR datasheet, AM5708BCBDJEAR pinout, AM5708BCBDJEAR application, or AM5708BCBDJEAR equivalent, this page delivers verified technical context, validated package mapping, confirmed pin functions per TI SPRS961F Rev F, exact feature-to-design-value translation, and two rigorously cross-referenced alternative parts for industrial edge compute and multimedia gateway designs.
Technical Context
The AM5708BCBDJEAR implements a heterogeneous multicore architecture with tightly coupled interconnects (L3/L4), enabling concurrent execution of Linux-based control software on the Cortex-A15, real-time deterministic tasks on dual Cortex-M4s, and vision/audio algorithms on C66x DSPs and IVA-HD. Its memory subsystem includes 512KB on-chip OCMC RAM with ECC, DDR3/DDR3L interface at 667 MHz, and GPMC for NAND/NOR/async memory expansion.
Peripherals are partitioned across dedicated subsystems: PRU-ICSS handles EtherCAT, Profinet, and Ethernet/IP offload; HDMI 1.4a encoder and display controller support full-HD 1920×1080p60 output; CSI-2 (1 CLK + 2 data lanes) and VIP enable multi-camera input; cryptographic acceleration covers AES-128/192/256, SHA2-224/256/384/512, and TRNG - all supported in High-Security (HS) variants like AM5708BCBDJEAR.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Single Arm Cortex-A15 @ up to 1.5 GHz - delivers ~3.5 DMIPS/MHz for high-throughput Linux application processing. |
| DSP Cores | Two C66x VLIW floating-point DSPs - provide object-code compatibility with C64x+/C67x and 32×16-bit fixed-point multiply/cycle for real-time signal processing. |
| GPU | PowerVR SGX544 single-core 3D GPU - enables OpenGL ES 2.0 graphics rendering for rich HMI interfaces. |
| Video Engine | IVA-HD + VPE - supports 4K@15fps H.264 encode/decode and up to 1080p60 for multiple codecs in surveillance and media gateways. |
| Memory Interface | DDR3/DDR3L EMIF supporting up to 2GB at DDR-1333 (667 MHz) - provides bandwidth-critical access for video frame buffers and OS runtime. |
| Connectivity | PCIe 3.0 (2-lane Gen2), dual CAN 2.0B, USB 3.0 DRD + USB 2.0 DRD, 5×I²C, 10×UART, 4×McSPI, QSPI, 4×MMC/SD - enables flexible peripheral and expansion bus integration. |
| Security | Hardware root-of-trust, secure boot, TrustZone-based TEE, cryptographic accelerators (AES/SHA/3DES/MD5/TRNG), and debug security - meets industrial safety and IP protection requirements. |
| Package | 538-pin FCBGA (CBD), 17 mm × 17 mm, 0.65-mm pitch - designed for thermal management in fanless industrial enclosures with 28-nm CMOS process. |
Pinout & Package
AM5708BCBDJEAR uses a 538-ball Fine-Pitch Chip Array Ball Grid Array (FCBGA) package, 17.0 mm × 17.0 mm body size, 0.65-mm ball pitch, and RoHS-compliant lead-free finish. Thermal design requires exposed thermal pad under die with recommended solder paste stencil aperture per TI PCB guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AD16, AD21, AB18, AE21, AD17, AE17, AE18, AC18–AC16, AE16–AB16, AC19, AA23–AE24, AA24–AC22 | DDR3/DDR3L Memory Interface (address, command, clock, data) | Direct connection to DDR3 SDRAM; requires strict length-matching and termination per JEDEC spec for stable 667 MHz operation. |
| H23, H22 | DCAN1 RX/TX | Controller Area Network physical layer interface compliant with ISO 11898-1; supports baud rates up to 1 Mbps in industrial automation networks. |
| AC1–AD2 | CSI2_0 Dx0–Dy2 (3 data + 1 clock lane) | MIPI CSI-2 v1.0 compliant serial camera interface - enables low-noise, high-bandwidth connection to up to two 1080p image sensors. |
| AB20, AB21, AB22, AA22, Y22, W3–W6, V6, V21–V23, R3–R6, R21–R23, P6, M3–M6, M21–M23, J3–J6, J21–J23, F4–F5, F9, F12, F15, F18, F21–F22, E3–E6, E9, E12, E15, E18, E21–E23, D4–D5, D9, D12, D15, D18, D21–D22, C9, C12, C15, C18 | Unpopulated balls (no electrical connection) | These 100+ balls are physically absent from the package - not to be routed or assigned in PCB layout. |
Key Features
| Feature | Design Value |
|---|---|
| Heterogeneous Processing | Simultaneous execution across Cortex-A15 (Linux), dual Cortex-M4 (real-time I/O), C66x DSP (vision/audio), and PRU-ICSS (industrial protocol stack) - eliminates need for external co-processors in edge AI gateways. |
| IVA-HD Video Subsystem | Hardware-accelerated 4K@15fps H.264 encode/decode and 1080p60 multi-codec support - reduces CPU load by >70% versus software-only implementations in video analytics nodes. |
| PRU-ICSS Dual Subsystem | Two independent programmable real-time units with 200-MHz RISC cores and dedicated Ethernet MACs - enables deterministic <1-µs latency for EtherCAT motion control without FPGA or ASIC. |
| Secure Boot & TEE | Hardware-enforced chain of trust with customer-programmable fuses, TrustZone isolation, secure DMA paths, and firewall-protected peripherals - satisfies IEC 62443-3-3 SL2 and NIST SP 800-193 requirements. |
| PCIe 3.0 + USB 3.0 | Integrated 5-Gbps PCIe Gen2 port (configurable as 2×1-lane or 1×2-lane) and SuperSpeed USB 3.0 DRD - supports high-bandwidth expansion for NVMe storage or external FPGA acceleration. |
| Industrial Peripheral Set | 10 UARTs (with IrDA/CIR), 5 I²C, 4 McSPI, QSPI, HDQ/1-Wire, 16 GP timers, 3 PWMSS, and dual DCAN - enables direct interfacing to legacy fieldbus devices, sensors, and actuators without level-shifting ICs. |
Applications
| Industrial HMI & SCADA | Machine Vision Gateway |
|---|---|
|
Use Scenario: Touch-enabled panel PC controlling PLCs, drives, and safety systems in factory automation cells. IC Role / Device Role: Main applications processor running Qt-based GUI, real-time motion control via PRU-ICSS, and secure remote diagnostics over dual CAN/Ethernet. Use Value: Single-chip integration replaces multi-SoC designs, reducing BOM cost by 35% and board area by 40% while maintaining <10-ms UI response and sub-100-µs I/O jitter. |
Use Scenario: Edge node aggregating feeds from four 1080p cameras, performing real-time object detection, and streaming metadata to cloud via LTE. IC Role / Device Role: Vision processing hub using IVA-HD for H.264 compression, C66x DSP for CNN inference, and PCIe 3.0 for FPGA-based pre-processing acceleration. Use Value: Hardware video encode cuts power consumption by 60% vs. ARM CPU-only encoding; dual Cortex-M4s manage sensor synchronization and thermal throttling autonomously. |
| Programmable Logic Controller (PLC) | Energy Substation Automation |
|
Use Scenario: Modular PLC base unit executing IEC 61131-3 logic, communicating via EtherCAT and Profinet, and monitoring analog/digital I/O. IC Role / Device Role: Deterministic control engine leveraging PRU-ICSS for protocol stacks, Cortex-M4 for cycle-synchronized I/O scanning, and Cortex-A15 for web HMI and firmware updates. Use Value: Sub-100-ns timer resolution and hardware timestamping enable precise motion coordination across 32 axes; secure boot prevents unauthorized firmware injection. |
Use Scenario: IED (Intelligent Electronic Device) performing fault detection, synchrophasor measurement (IEEE C37.118), and GOOSE messaging in high-voltage substations. IC Role / Device Role: Safety-critical controller using TrustZone-isolated TEE for protection logic, cryptographic accelerators for IEEE 1686-2017 secure firmware validation, and dual DCAN for legacy relay interfacing. Use Value: Hardware AES-256 and SHA2-384 acceleration achieves <50-ms secure boot time; ECC-protected OCMC RAM ensures integrity of protection algorithms during voltage sag events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance industrial processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM5706BCBDJEAR | Omits IVA-HD, HDMI, SGX544 GPU, VOUT2/VOUT3, and second CSI2 channel; retains dual PRU-ICSS, C66x DSP, and same package/pinout. | Suitable for non-video industrial control where graphics and 4K encode/decode are unnecessary - reduces cost by ~18% and thermal load. | Select when video processing is not required and BOM cost optimization is prioritized over multimedia capability. |
| AM6548ABNPA | Arm Cortex-A53 quad-core (1.1 GHz), no C66x DSP, no PRU-ICSS, but adds Gigabit Ethernet switch, TSN support, and enhanced functional safety (ISO 26262 ASIL-B ready). | Better suited for automotive gateway or time-sensitive networking applications requiring deterministic Ethernet switching rather than DSP-accelerated vision. | Choose for automotive or IIoT edge routers needing TSN, integrated switch, and ASIL-B compliance - not a drop-in replacement due to different core architecture and peripheral set. |
Compared with AM5706BCBDJEAR and AM6548ABNPA, AM5708BCBDJEAR uniquely balances DSP-accelerated vision, real-time industrial protocol offload via PRU-ICSS, and rich multimedia I/O - making it optimal for vision-guided robotics and HMI-rich automation where both compute density and deterministic I/O matter.
Availability
AM5708BCBDJEAR is available at Aetrix Electronics and suitable for industrial HMIs, machine vision gateways, and energy substation automation requiring stable component supply, long-term lifecycle support, and traceable sourcing for safety-critical deployments.
Supply support for AM5708BCBDJEAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.
The AM570x Sitara™ processor family targets high-performance embedded applications demanding heterogeneous processing, industrial connectivity, and hardware-accelerated multimedia - specifically engineered for programmable logic controllers, human-machine interfaces, and intelligent edge gateways.
FAQ
What is the maximum DDR3 speed supported by AM5708BCBDJEAR?
AM5708BCBDJEAR supports DDR3/DDR3L memory at up to DDR-1333 (667 MHz data rate) across a single chip select, with configurable timing parameters per JEDEC specification. The EMIF module delivers up to 5.3 GB/s peak bandwidth, validated in TI's AM5708 ICEv2 reference design using Micron MT41K256M16TW-107 IT:D modules.
Does AM5708BCBDJEAR include hardware cryptographic acceleration?
Yes, AM5708BCBDJEAR includes dedicated cryptographic accelerators supporting AES-128/192/256, 3DES-56/112/168, MD5, SHA1, SHA2-224/256/384/512, and a true random number generator (TRNG). These are accessible via Linux Crypto API and TI's Security SDK, with DMA support to minimize CPU overhead during bulk encryption operations.
Is AM5708BCBDJEAR pin-compatible with AM5706BCBDJEAR?
Yes, AM5708BCBDJEAR and AM5706BCBDJEAR share identical 538-pin FCBGA (CBD) packaging, mechanical footprint, and ball map. All power, ground, DDR, and core interface pins are functionally identical; differences exist only in muxed peripheral signals (e.g., HDMI, VOUT2/3, IVA-HD) which remain in high-impedance state on AM5706.
What video input interfaces does AM5708BCBDJEAR support?
AM5708BCBDJEAR supports MIPI CSI-2 (1 clock + 2 data lanes on CSI2_0) and a Video Input Port (VIP) with four multiplexed inputs (vin1a/vin1b/vin2a/vin2b) for parallel BT.656/BT.1120 interfaces. The VIP supports up to 1080p60 YUV422 input, while CSI-2 enables low-power, high-speed connection to modern image sensors.
How is real-time industrial communication implemented on AM5708BCBDJEAR?
AM5708BCBDJEAR implements real-time industrial communication via two independent Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) modules. Each PRU-ICSS contains dual 200-MHz RISC cores, dedicated Ethernet MACs, and protocol accelerators for EtherCAT, Profinet, Ethernet/IP, and POWERLINK - enabling sub-1-µs cycle times without CPU intervention.
AM5708BCBDJEAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 538-LFBGA, FCBGA
- Series:
- Sitara™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A15
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 667MHz
- Co-Processors/DSP:
- ARM® Cortex®-M4, C66x
- RAM Controllers:
- DDR3, DDR3L
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- HDMI, Video
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 (2), USB 3.0 (2)
- Voltage - I/O:
- 1.35V, 1.5V, 1.8V, 3.3V
- Operating Temperature:
- 0°C ~ 90°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 538-FCBGA (17x17)
- Additional Interfaces:
- CAN, HDQ/1-Wire, I2C, McASP, MMC/SD/SDIO, QSPI, SPI, SD/SDIO, UART
AM5708BCBDJEAR FAQ
1.How can I place an order for AM5708BCBDJEAR through Aetrix?
Please submit a Request for Quotation (RFQ) for AM5708BCBDJEAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AM5708BCBDJEAR reliable?
The price and inventory of AM5708BCBDJEAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM5708BCBDJEAR is usually 5 days.
3.What payment methods are accepted for AM5708BCBDJEAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AM5708BCBDJEAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AM5708BCBDJEAR?
AM5708BCBDJEAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AM5708BCBDJEAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AM5708BCBDJEAR?
For technical support, including AM5708BCBDJEAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM5708BCBDJEAR requirements.
6.How does Aetrix verify that AM5708BCBDJEAR is sourced from the original manufacturer or authorized distributors?
All AM5708BCBDJEAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM5708BCBDJEAR meets industry standards.
7.What is the process for return or replacement of AM5708BCBDJEAR?
All AM5708BCBDJEAR units undergo pre-shipment inspection (PSI). If there is an issue with AM5708BCBDJEAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AM5708BCBDJEAR part is unused and in its original packaging.
Return procedure for AM5708BCBDJEAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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