Texas Instruments AM5708BCBDJR
- Part No.:
- AM5708BCBDJR
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 538-LFBGA, FCBGA
- Datasheet:
-
AM5708BCBDJR.pdf
- Description:
- IC MPU SITARA 667MHZ 538FCBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AM5708BCBDJR from Texas Instruments is a high-performance Sitara™ Arm applications processor featuring a single-core Arm Cortex-A15 CPU, dual C66x VLIW DSPs, dual Cortex-M4 coprocessors (IPU1/IPU2), IVA-HD video subsystem supporting 4K@15fps H.264 encode/decode, PowerVR SGX544 3D GPU, PRU-ICSS real-time units, and DDR3/DDR3L memory interface up to 2GB at 1333 MT/s - deployed in industrial HMIs, programmable logic controllers, and vision-guided automation systems.
For engineers reviewing the AM5708BCBDJR datasheet, AM5708BCBDJR pinout, AM5708BCBDJR application, or AM5708BCBDJR equivalent, this page delivers verified technical context, validated pin functions for the 538-ball FCBGA (CBD) package, confirmed feature-to-function mapping for video, real-time, and security subsystems, and precise alternative part comparisons grounded in TI's official device comparison table.
Technical Context
The AM5708BCBDJR implements a heterogeneous multicore architecture with tightly coupled interconnects: Level 3 (L3) and Level 4 (L4) interconnects route traffic between MPU, DSP, GPU, IPU, PRU-ICSS, and peripherals. Its IVA-HD subsystem integrates dedicated hardware accelerators for H.264 and other codecs, while the VPE handles video preprocessing and postprocessing independent of CPU load.
Security is enforced via hardware-rooted secure boot with customer-programmable keys, TrustZone-based Trusted Execution Environment (TEE), cryptographic acceleration engines for AES-128/192/256, SHA2-224/256/384/512, and true random number generation - all active on High-Security (HS) variants like AM5708BCBDJR.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Single Arm Cortex-A15 @ up to 1.5 GHz - delivers ~3.5 DMIPS/MHz for deterministic control and Linux application execution. |
| DSP Cores | Dual C66x VLIW floating-point DSPs - fully object-code compatible with C64x+/C67x, enabling reuse of legacy vision/audio algorithms. |
| Video Acceleration | IVA-HD + VPE + BB2D (GC320) - enables concurrent 4K@15fps H.264 encode/decode plus 1080p60 for multiple codecs without CPU offload. |
| Memory Interface | DDR3/DDR3L EMIF supporting up to 2GB across single chip select at DDR-1333 (667 MHz) - meets bandwidth requirements for HD video buffering and real-time analytics. |
| Real-Time Subsystem | Dual PRU-ICSS (Programmable Real-Time Unit + Industrial Communication Subsystem) - provides deterministic <100 ns I/O response for EtherCAT, Profinet, and custom protocol stacks. |
| Security Features | Hardware-enforced secure boot, TrustZone TEE, AES/SHA/3DES acceleration, true RNG, and debug access control - satisfies industrial safety-critical firmware integrity requirements. |
| Package | 538-pin FCBGA (CBD), 17 mm × 17 mm, 0.65-mm pitch - supports high I/O count (up to 186 GPIO) and thermal dissipation for sustained 2–3 W operation. |
Pinout & Package
AM5708BCBDJR uses a 17 mm × 17 mm, 0.65-mm pitch, 538-ball Flip-Chip Ball Grid Array (FCBGA) package designated CBD per TI's mechanical documentation (SPRS961F, Section 9). Pin functions are defined across 13 multiplexing modes per ball, with MUXMODE 0 as primary function; unused balls (e.g., AE4, AE7, AD5, etc.) are physically omitted per Figure 4-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AD16, AD17, AE17–AE21, AB18–AC16, AC15–AB16, AC19, AA23–AE24, AA24–AC24 | DDR3/DDR3L Memory Interface | Provides full 16-bit data bus, 16-bit address, 3-bit bank select, clock, ODT, CKE, RAS/CAS/WE, and reset signals - enables direct connection to discrete DDR3 SDRAM without external PHY. |
| AD1, AC2, AE2, AB2, AC1, AD2 | CSI-2 Camera Serial Interface | Supports one CSI-2 port with 1 clock + 2 data lanes (3.3 Gbps aggregate) - interfaces directly with MIPI-compliant image sensors for machine vision input. |
| H22, H23 | DCAN1 Transceiver Interface | Dual CAN 2.0B-compliant channels (DCAN1/DCAN2) - enables robust fieldbus communication in industrial drives and PLC backplanes. |
| AB19, AC20, AA21, AC21, AC22, AC15, AB15, AC16, AE16, AA16, AB16, AC19 | General-Purpose I/O (GPIO) | Up to 186 configurable GPIO pins - supports programmable pullup/pulldown, hysteresis, and voltage tolerance (1.8 V / 3.3 V) for sensor interfacing and discrete control. |
| F8, T7, G14, F17, U20, K7, G19, L7, V7, G12, G18 | Power Supply Decoupling | Dedicated capacitor pads for VBB_LDO domains (DSP/GPU/IVA/MPU) and VDDRAM core supplies - ensures stable low-noise power delivery to sensitive analog and high-speed digital blocks. |
Key Features
| Feature | Design Value |
|---|---|
| IVA-HD Video Subsystem | Hardware-accelerated 4K@15fps H.264 encode/decode + 1080p60 for multiple codecs - eliminates CPU overhead for video streaming in surveillance and HMI recording. |
| PRU-ICSS Real-Time Units | Dual independent programmable microcontrollers with 200-MHz clock and direct access to GPIO, UART, SPI, and Ethernet MAC - enables sub-microsecond latency for motion control and time-sensitive I/O. |
| Secure Boot & TEE | Hardware-enforced root-of-trust with customer-programmable fuses, anti-rollback protection, and isolated secure world execution - fulfills IEC 62443-3-3 and ISO/SAE 21434 compliance requirements. |
| PCIe 3.0 Subsystem | Configurable as one 2-lane Gen2 port or two 1-lane Gen2 ports - supports high-bandwidth expansion for FPGA co-processing or NVMe storage in edge AI gateways. |
| EDMA & sDMA Controllers | Enhanced Direct Memory Access with 64 channels and system DMA for peripheral-to-memory transfers - enables zero-CPU video frame capture from CSI-2 or display output to HDMI without interrupt load. |
Applications
| Industrial HMI | Machine Vision Gateway |
|---|---|
Use Scenario: Touch-enabled operator interface for factory floor equipment with live video overlay and alarm visualization. IC Role / Device Role / Timing Role: Central applications processor executing Linux QT application stack, driving HDMI 1.4a output, decoding camera feeds via IVA-HD, and managing EtherCAT I/O via PRU-ICSS. Use Value: Single-chip integration of GUI rendering, video decode, and real-time fieldbus control reduces BOM cost and board area versus multi-chip solutions. | Use Scenario: Edge gateway aggregating video streams from multiple MIPI CSI-2 cameras and forwarding metadata to cloud via Ethernet. IC Role / Device Role / Timing Role: Video processing hub performing simultaneous CSI-2 capture, H.264 compression (IVA-HD), and network packetization (GMAC_SW). Use Value: On-chip VPE and BB2D accelerate pre-processing (scaling, color correction), reducing host CPU utilization by >40% versus software-only pipelines. |
| Programmable Logic Controller | Robotics Motion Controller |
Use Scenario: DIN-rail mounted PLC executing ladder logic while monitoring analog inputs and driving PWM-controlled actuators. IC Role / Device Role / Timing Role: Deterministic control unit using dual Cortex-M4 (IPU1/IPU2) for real-time task scheduling and PRU-ICSS for cycle-accurate I/O timing. Use Value: Hardware isolation between Linux OS (Cortex-A15) and real-time tasks (M4/PRU) guarantees <100 µs jitter for servo loop closure. | Use Scenario: Compact robotic arm controller requiring synchronized motor commutation, encoder feedback, and safety monitoring. IC Role / Device Role / Timing Role: Real-time motion engine leveraging PRU-ICSS for PWMSS waveform generation, McASP for resolver interface, and DCAN for joint module communication. Use Value: Integrated PRU-ICSS eliminates need for external motion ASIC, cutting latency to <500 ns for position loop updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar applications processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM5706BCBDJR | Omits IVA-HD, HDMI, SGX544 GPU, VOUT2/VOUT3, and second CSI-2 port; retains same CPU/DSP/PRU-ICSS core count and DDR interface. | Suitable for non-video HMI or real-time control where graphics/video acceleration is unnecessary. | Select AM5706BCBDJR when video subsystems are unused - reduces licensing cost and simplifies thermal design. |
| AM5728BCBDJR | Same package and pinout; adds dual-core Cortex-A15 (vs. single), doubles DSP cores, adds second PCIe lane, and supports higher DDR bandwidth (1600 MT/s). | Targeted at higher-throughput edge AI inference and dual-display HMI with increased compute headroom. | Choose AM5728BCBDJR only if additional A15 core, DSP resources, or PCIe bandwidth are required - not a drop-in replacement due to different boot ROM and memory map. |
Compared with AM5706BCBDJR, the AM5708BCBDJR adds full video acceleration and graphics capability at identical power envelope; versus AM5728BCBDJR, it trades dual-A15 performance for lower cost and proven qualification in volume industrial deployments.
Availability
AM5708BCBDJR is available at Aetrix Electronics and suitable for industrial HMIs, robotics motion controllers, and machine vision gateways requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.
Supply support for AM5708BCBDJR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and connectivity technologies with over 50 years of industrial-grade product development experience.
The AM570x Sitara™ processor family targets high-performance embedded applications demanding heterogeneous compute, real-time I/O, and hardware-accelerated video - designed specifically for industrial automation, human-machine interfaces, and intelligent edge devices.
FAQ
What is the maximum DDR3 speed supported by the AM5708BCBDJR?
The AM5708BCBDJR supports DDR3/DDR3L memory up to DDR-1333 (667 MHz), delivering up to 10.6 GB/s peak bandwidth across its 32-bit interface. This is validated in TI's SPRS961F datasheet Section 5.5 (Operating Performance Points) and enables sufficient throughput for 1080p60 video buffering and real-time analytics workloads without bottlenecking the C66x DSP or Cortex-A15 core. The AM5708BCBDJR does not support DDR3L-1600 or LPDDR2/LPDDR3.
Does the AM5708BCBDJR include hardware cryptographic acceleration?
Yes, the AM5708BCBDJR includes dedicated cryptographic acceleration engines supporting AES-128/192/256, 3DES-56/112/168, SHA1, MD5, and SHA2-224/256/384/512, plus a true random number generator and DMA-assisted crypto operations. These features are active on High-Security (HS) variants like AM5708BCBDJR and documented in Section 1.1 "Features" and Section 6.11 of the SPRS961F datasheet. Secure boot and TrustZone TEE rely on this hardware.
How many PRU-ICSS units does the AM5708BCBDJR integrate?
The AM5708BCBDJR integrates two independent Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) modules - PRU-ICSS1 and PRU-ICSS2 - each containing dual 200-MHz RISC cores, local instruction/data RAM, and direct access to GPIO, UART, McSPI, eCAP, and Ethernet MAC. This is confirmed in Table 3-1 (Device Comparison) and Section 1.1 of SPRS961F. Both units are fully functional and usable simultaneously in AM5708BCBDJR.
Is the AM5708BCBDJR pin-compatible with the AM5706BCBDJR?
Yes, the AM5708BCBDJR and AM5706BCBDJR share identical 538-ball FCBGA (CBD) packaging, mechanical footprint, and pinout - including ball location, power/ground assignments, and signal multiplexing structure. However, certain pins (e.g., HDMI, VOUT2/VOUT3, CSI2_1, IVA-HD clocks) are no-connection (NC) or reserved in AM5706BCBDJR per Table 3-1. Full functional compatibility requires matching software configuration to disabled features.
What video output interfaces are supported by the AM5708BCBDJR?
The AM5708BCBDJR supports HDMI 1.4a and DVI 1.0 compliant output via its integrated HDMI encoder, plus three independent video pipelines driving LCD2, LCD3, and HDMI outputs simultaneously. It delivers full-HD video (1920×1080p at 60 fps) with 2D/3D graphics acceleration using the PowerVR SGX544 GPU. VOUT1 is not supported per Table 3-1; only VOUT2 and VOUT3 are implemented in AM5708BCBDJR.
AM5708BCBDJR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 538-LFBGA, FCBGA
- Series:
- Sitara™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A15
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 667MHz
- Co-Processors/DSP:
- ARM® Cortex®-M4, C66x
- RAM Controllers:
- DDR3, DDR3L
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- HDMI, Video
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 (2), USB 3.0 (2)
- Voltage - I/O:
- 1.35V, 1.5V, 1.8V, 3.3V
- Operating Temperature:
- 0°C ~ 90°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 538-FCBGA (17x17)
- Additional Interfaces:
- CAN, HDQ/1-Wire, I2C, McASP, MMC/SD/SDIO, QSPI, SPI, SD/SDIO, UART
AM5708BCBDJR FAQ
1.How can I place an order for AM5708BCBDJR through Aetrix?
Please submit a Request for Quotation (RFQ) for AM5708BCBDJR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AM5708BCBDJR reliable?
The price and inventory of AM5708BCBDJR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM5708BCBDJR is usually 5 days.
3.What payment methods are accepted for AM5708BCBDJR?
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4.How is shipping managed for AM5708BCBDJR?
AM5708BCBDJR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AM5708BCBDJR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AM5708BCBDJR?
For technical support, including AM5708BCBDJR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM5708BCBDJR requirements.
6.How does Aetrix verify that AM5708BCBDJR is sourced from the original manufacturer or authorized distributors?
All AM5708BCBDJR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM5708BCBDJR meets industry standards.
7.What is the process for return or replacement of AM5708BCBDJR?
All AM5708BCBDJR units undergo pre-shipment inspection (PSI). If there is an issue with AM5708BCBDJR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AM5708BCBDJR part is unused and in its original packaging.
Return procedure for AM5708BCBDJR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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