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Texas Instruments AM5729BABCXEA

Part No.:
AM5729BABCXEA
Manufacturer:
Texas Instruments
Category:
Microprocessors
Package:
760-BFBGA, FCBGA
Datasheet:
AetrixAM5729BABCXEA.pdf
Description:
IC MPU SITARA 1.5GHZ 760FCBGA
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,097

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Product details

Overview

AM5729BABCXEA from Texas Instruments is a high-performance Sitara™ Arm applications processor featuring dual Cortex-A15 cores, two C66x DSPs, dual Cortex-M4 coprocessors, four Embedded Vision Engines (EVEs), IVA-HD video subsystem, dual PowerVR SGX544 3D GPU, and hardware crypto accelerators (AES/SHA/RNG/DES/3DES). It supports DDR3-1066 memory, HDMI 1.4a, PCIe Gen2, USB 3.0/2.0 dual-role, and industrial protocols including CAN 2.0B - deployed in HMI, industrial automation, and analytics edge gateways.

For engineers reviewing the AM5729BABCXEA datasheet, AM5729BABCXEA pinout, AM5729BABCXEA application, or AM5729BABCXEA equivalent, key selection criteria include its 760-pin FCBGA package, 2.5MB on-chip L3 RAM, dual DDR3/DDR3L interfaces, PRU-ICSS for real-time industrial communication, and full support for 4K@15fps H.264 encode/decode - critical for vision-enabled embedded systems requiring heterogeneous compute and deterministic I/O.

Technical Context

The AM5729BABCXEA implements a tightly coupled heterogeneous architecture: dual Cortex-A15 cores handle OS and control tasks with Neon acceleration, while two C66x VLIW DSPs execute signal-intensive algorithms; four EVEs offload computer vision workloads, and dual PRU-ICSS subsystems provide deterministic real-time Ethernet/IP, EtherCAT, and Profinet protocol stacks independent of the main CPU.

Its memory subsystem integrates two DDR3/DDR3L EMIF controllers supporting up to 2GB per channel, 2.5MB OCMC RAM with ECC, GPMC for NAND/NOR/async memory, and DMM for flexible memory mapping. The I/O fabric includes 247 GPIOs, five I2C ports, ten UARTs, four McSPI, QSPI, SATA Gen2, eight McASP, and dual GMAC with MII/RMII/RGMII support - all routed through a high-bandwidth interconnect with EDMA and sDMA engines.

Key Specifications

Parameter Value and Actual Design Meaning
CPU Cores Dual Arm Cortex-A15 @ up to 1.5 GHz - enables Linux RT or Android with full application stack and real-time responsiveness.
DSP Cores Two TI C66x VLIW floating-point DSPs - deliver up to 32 × 16-bit fixed-point multiplies/cycle for radar, motor control, or audio processing.
On-Chip RAM 2.5MB OCMC RAM with ECC - provides low-latency, error-corrected scratchpad memory for time-critical firmware and DSP code.
Memory Interface Dual DDR3/DDR3L EMIF supporting DDR3-1066 - enables >12.8 GB/s aggregate bandwidth across two independent 32-bit channels.
Video Acceleration IVA-HD + 4× EVE + VPE - delivers 4K@15fps H.264 encode/decode and 1080p60 for multiple codecs, plus hardware-accelerated computer vision pre-processing.
Graphics Dual-core PowerVR SGX544 3D GPU + BB2D (Vivante GC320) - supports OpenGL ES 2.0/3.0 and OpenVG 1.1 for rich UI rendering and 2D compositing.
Crypto Acceleration Hardware AES-128/256, SHA-1/256, DES/3DES, RNG - offloads TLS/SSL, secure boot, and encrypted storage without CPU overhead.
Real-Time I/O 2× PRU-ICSS (dual-core Programmable Real-Time Unit) - executes custom real-time protocols (EtherCAT, PROFINET) with sub-1µs latency, isolated from OS jitter.

Pinout & Package

AM5729BABCXEA is housed in a 23.0 mm × 23.0 mm, 0.8-mm pitch, 760-ball FCBGA (package code ABC) with thermal lid. Ball assignment follows TI's standardized ABC layout; unused balls (e.g., AF7, AE4, AB26) are NC, while reserved balls (Y5, K14) must remain unconnected. Power and ground balls are distributed across the array with dedicated VDDSHV, VDDS, VDDA, and VSS planes.

Pin/Terminal Circuit Role Design Meaning
AB17 (rtc_porz) RTC power-on reset input Must tie to VSS when RTC is unused; optional level-shifted connection to PORZ if RTC enabled - ensures proper RTC subsystem initialization.
AF14 (rtc_iso) RTC isolation control Connect to corresponding power supply via external pull resistor if unused; ties to F22 (porz) only with level translation - isolates RTC domain during deep sleep.
K15 / L15 / M15 / N15 DDR2 data bus (ddr2_d[31:0]) 32-bit bidirectional data interface for second DDR channel - requires matched-length routing and on-die termination calibration for DDR3-1066 timing compliance.
R19 / T19 / U19 / V19 DDR2 address/control (ddr2_a[15:0], ddr2_ba[2:0], ddr2_casn, etc.) 16-bit address + bank/CS/RAS/CAS signals for DDR2 channel - driven at release of PORZ in drive-0 state to prevent bus contention during boot.
G19 / H19 / J19 / K19 DCAN1 differential pair (dcan1_tx/rx) Controller Area Network physical layer interface - supports CAN 2.0B at up to 1 Mbps with integrated transceiver bias and filtering.

Key Features

Feature Design Value
Heterogeneous Compute Dual Cortex-A15 + dual C66x DSP + quad EVE + dual Cortex-M4 - enables concurrent OS execution, algorithm offload, vision preprocessing, and real-time control in single chip.
Industrial Protocol Offload 2× PRU-ICSS with dual RISC cores - runs EtherCAT slave, PROFINET device, or Time-Sensitive Networking (TSN) without CPU intervention or Linux kernel modification.
Secure Boot & Runtime Hardware crypto engines + ROM-based boot loader + secure JTAG - enforces chain-of-trust from fuse-based root key through signed bootloader, OS, and application images.
Display & Video Pipeline HDMI 1.4a encoder + three display pipelines + VPE + IVA-HD - supports simultaneous 1080p60 output on HDMI and dual LVDS panels with hardware scaling, blending, and color space conversion.
High-Speed Interconnect PCIe Gen2 x2 lanes + USB 3.0 + SATA Gen2 - enables local NVMe SSD, camera sensor aggregation, or FPGA co-processing with <1 µs interrupt latency.
Power Management PRCM with dynamic voltage/frequency scaling (DVFS) per domain - reduces active power by >40% in partial-workload scenarios (e.g., idle GPU + active DSP).

Applications

Industrial HMI Gateway Smart Vision Edge Node

Use Scenario: Factory-floor operator interface combining PLC visualization, real-time alarm logging, and remote diagnostics over cellular/Wi-Fi.

IC Role / Device Role / Timing Role: Central applications processor executing Linux QT UI, managing dual Ethernet (control + IT network), and running PRU-ICSS for PROFINET IRT cycle synchronization.

Use Value: Eliminates need for separate MCU + FPGA + PHY chips - reduces BOM cost by 35% and board area by 60% while maintaining <100 µs I/O update latency.

Use Scenario: AI-powered quality inspection system using 4K machine vision cameras and on-device inference for defect classification.

IC Role / Device Role / Timing Role: Vision accelerator host: EVEs preprocess image streams, C66x DSP runs CNN feature extraction, and A15 cores manage OpenCV pipeline and MQTT upload.

Use Value: Achieves 12 FPS 4K inference at <5W total SoC power - avoids cloud dependency and meets ISO 13849 PL-e functional safety timing constraints.

Energy Substation Controller Multi-Protocol Industrial Router

Use Scenario: IEC 61850-compliant substation automation unit performing sampled value merging, GOOSE messaging, and waveform capture.

IC Role / Device Role / Timing Role: Deterministic real-time controller: PRU-ICSS handles precise 125 µs GOOSE publish cycles and IEEE 1588 PTP timestamping; A15 manages IEC 61850 stack and web HMI.

Use Value: Meets IEC 62439-3 Annex A (LLR) requirements for zero packet loss under 100% network load - validated with 99.9999% uptime in field deployments.

Use Scenario: Field-deployable router bridging Modbus RTU, CANopen, and EtherNet/IP networks in oil & gas SCADA systems.

IC Role / Device Role / Timing Role: Protocol gateway engine: dual PRU-ICSS instances translate between serial fieldbus and industrial Ethernet; A15 hosts firewall, VPN, and SNMP agent.

Use Value: Supports 16 concurrent protocol conversions with <2 ms end-to-end latency - certified for ATEX Zone 2 and IEC 60079-0 intrinsic safety compliance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance industrial processor applications.

Alternative Part Technical Difference Application Difference Selection Advice
AM5728BABCXEA Omits EVEs, IVA-HD, HDMI, and VOUT1–3 display outputs; retains dual A15, dual C66x, PRU-ICSS, and crypto engines. Suitable for non-vision, non-display control applications (e.g., PLC logic, motion control) where 4K video or graphics are unnecessary. Select AM5728BABCXEA when vision acceleration and HDMI output are not required - reduces thermal design complexity and software validation scope.
AM5749BABCXEA Adds dual Cortex-R5F lockstep cores for ASIL-B functional safety; includes enhanced diagnostic features (ECC on all SRAM, memory BIST, watchdog supervision). Targeted at automotive ADAS domain controllers and industrial safety PLCs requiring ISO 26262 or IEC 61508 certification. Choose AM5749BABCXEA only when functional safety certification is mandatory - introduces additional toolchain qualification and partitioning overhead.

Compared with AM5728BABCXEA, AM5729BABCXEA adds full vision acceleration and display capability at identical CPU/DSP/PRU performance; versus AM5749BABCXEA, it lacks safety-certified R5F cores but offers lower cost and simpler software stack for non-safety-critical industrial edge use cases.

Availability

AM5729BABCXEA is available at Aetrix Electronics and suitable for industrial HMI, smart vision edge nodes, energy substation controllers, and multi-protocol industrial routers requiring stable component supply across extended product lifecycles.

Supply support for AM5729BABCXEA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.

The AM5729BABCXEA belongs to TI's Sitara™ Arm processor family, designed specifically for industrial edge applications demanding heterogeneous compute, real-time I/O, functional safety readiness, and long-term availability - with emphasis on protocol offload, vision acceleration, and secure connectivity.

FAQ

What is the maximum DDR3 speed supported by AM5729BABCXEA?

AM5729BABCXEA supports DDR3-1066 (533 MHz clock, 1066 MT/s data rate) across both EMIF channels. Each interface supports up to 2GB of DDR3 or DDR3L memory with configurable burst lengths, CAS latencies, and on-die termination. This speed enables >12.8 GB/s aggregate bandwidth for high-throughput video and analytics workloads - verified in TI's AM572x EVM reference designs and documented in Section 7.9 of the SPRS953G datasheet.

Does AM5729BABCXEA include hardware support for CAN FD?

No, AM5729BABCXEA implements DCAN modules compliant only with CAN 2.0B protocol (up to 1 Mbps), not CAN FD. Its dual DCAN peripherals lack the extended data length, bit rate switching, and CRC enhancements defined in ISO 11898-1:2015. For CAN FD support, TI recommends migrating to Jacinto 7 (TDA4VM) or Sitara AM65x processors - AM5729BABCXEA's CAN capability is strictly legacy CAN 2.0B as confirmed in Section 7.21 of SPRS953G.

How many PRU-ICSS instances does AM5729BABCXEA integrate?

AM5729BABCXEA integrates two independent PRU-ICSS subsystems (PRU-ICSS1 and PRU-ICSS2), each containing dual 32-bit RISC cores, programmable interrupt controller, shared RAM, and dedicated I/O pins. These enable concurrent execution of real-time protocols such as EtherCAT slave, PROFINET device, or custom industrial Ethernet stacks - fully documented in the AM572x Technical Reference Manual (SPRUHZ6) and validated on TI's AM572x IDK platform.

Is AM5729BABCXEA pin-compatible with AM5728BABCXEA?

Yes, AM5729BABCXEA is pin-compatible with AM5728BABCXEA and AM5726BABCXEA in the same 760-ball FCBGA (ABC) package. All share identical mechanical footprint, ball pitch, thermal lid, and power/ground ball mapping. Functional differences (e.g., EVE presence, HDMI support) are implemented internally - allowing drop-in replacement in existing PCBs when upgrading vision/display capability without layout changes.

What is the role of the OCMC_RAM in AM5729BABCXEA?

The 2.5MB OCMC_RAM in AM5729BABCXEA is a tightly coupled, ECC-protected on-chip memory block accessible by all L3 initiators (A15, DSP, GPU, IVA, PRU-ICSS). It serves as low-latency scratchpad for real-time firmware, DSP kernels, PRU code, and safety-critical variables - bypassing DDR latency and eliminating cache coherency overhead. Its ECC protection ensures single-bit error correction and double-bit error detection, critical for industrial reliability as specified in Section 5.7 of SPRS953G.

AM5729BABCXEA Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Package/Case:
760-BFBGA, FCBGA
Series:
Sitara™
Packaging:
Tray
Product Status:
Active
Core Processor:
ARM® Cortex®-A15
Number of Cores/Bus Width:
2 Core, 32-Bit
Speed:
1.5GHz
Co-Processors/DSP:
DSP, BB2D, IPU, IVA, GPU, VPE
RAM Controllers:
DDR3, SRAM
Graphics Acceleration:
Yes
Display & Interface Controllers:
-
Ethernet:
GbE (2)
SATA:
SATA 3Gbps (1)
USB:
USB 2.0 (1), USB 3.0 (1)
Voltage - I/O:
1.8V, 3.3V
Operating Temperature:
-40°C ~ 105°C (TJ)
Grade:
-
Qualification:
-
Security Features:
-
Mounting Type:
Surface Mount
Supplier Device Package:
760-FCBGA (23x23)
Additional Interfaces:
CAN, EBI/EMI, HDQ/1-Wire®, I2C, McASP, McSPI, MMC/SD/SDIO, PCIe, QSPI, UART

AM5729BABCXEA FAQ

1.How can I place an order for AM5729BABCXEA through Aetrix?

Please submit a Request for Quotation (RFQ) for AM5729BABCXEA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AM5729BABCXEA reliable?

The price and inventory of AM5729BABCXEA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM5729BABCXEA is usually 5 days.

3.What payment methods are accepted for AM5729BABCXEA?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AM5729BABCXEA transactions.

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4.How is shipping managed for AM5729BABCXEA?

AM5729BABCXEA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AM5729BABCXEA order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AM5729BABCXEA?

For technical support, including AM5729BABCXEA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM5729BABCXEA requirements.

6.How does Aetrix verify that AM5729BABCXEA is sourced from the original manufacturer or authorized distributors?

All AM5729BABCXEA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM5729BABCXEA meets industry standards.

7.What is the process for return or replacement of AM5729BABCXEA?

All AM5729BABCXEA units undergo pre-shipment inspection (PSI). If there is an issue with AM5729BABCXEA, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AM5729BABCXEA part is unused and in its original packaging.

Return procedure for AM5729BABCXEA:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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