Texas Instruments AM5729BABCXEAR
- Part No.:
- AM5729BABCXEAR
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 760-BFBGA, FCBGA
- Datasheet:
-
AM5729BABCXEAR.pdf
- Description:
- IC MPU SITARA 1.5GHZ 760FCBGA
- Quantity:
- Payment:

- Shipping:

Inventory:488
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Product details
Overview
AM5729BABCXEAR from Texas Instruments is a high-performance Sitara™ Arm® Cortex®-A15 dual-core applications processor with two C66x VLIW DSPs, 2.5MB on-chip L3 RAM, dual DDR3/DDR3L memory interfaces supporting up to DDR3-1066, and integrated IVA-HD video subsystem enabling 4K@15fps H.264 encode/decode - deployed in industrial HMIs, automation gateways, and embedded vision edge nodes.
For engineers reviewing the AM5729BABCXEAR datasheet, AM5729BABCXEAR pinout, AM5729BABCXEAR application, or AM5729BABCXEAR equivalent, key selection considerations include its 760-pin FCBGA (23 mm × 23 mm, 0.8-mm pitch) package, dual PRU-ICSS for real-time industrial protocols, crypto acceleration (AES/SHA/RNG), and full support for PCIe Gen2, SATA Gen2, USB 3.0 DRD, and HDMI 1.4a.
Technical Context
The AM5729BABCXEAR implements a heterogeneous multi-processor architecture: dual Cortex-A15 cores handle OS and control tasks, while two C66x DSPs execute intensive signal processing; two Cortex-M4 coprocessors (IPU1/IPU2) manage real-time I/O offload, and four Embedded Vision Engines (EVEs) accelerate computer vision workloads independently of the main CPU.
Its memory subsystem includes two independent EMIF controllers (each supporting up to 2GB DDR3/DDR3L at 1066 MT/s), 2.5MB on-chip OCMC RAM with ECC, GPMC for NAND/NOR/async memory, and a Dynamic Memory Manager (DMM) for flexible address mapping - all coordinated via a high-bandwidth interconnect fabric with EDMA and system DMA support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual Arm® Cortex®-A15 @ up to 1.5 GHz - enables Linux RT or Android with deterministic task scheduling and SMP support. |
| DSP Cores | Two TI C66x VLIW floating-point DSPs - deliver up to 32×16-bit fixed-point multiplies/cycle for radar, motor control, or audio analytics. |
| On-Chip RAM | 2.5 MB OCMC RAM with ECC - provides low-latency, error-corrected scratchpad memory for critical firmware or real-time buffers. |
| Memory Interface | Dual DDR3/DDR3L EMIF - supports interleaved 4GB total capacity (2GB per channel) at DDR3-1066, enabling high-throughput data streaming. |
| Video Acceleration | IVA-HD + VPE + 4× EVE - enables concurrent 4K@15fps H.264 encode/decode plus hardware-accelerated optical flow and feature detection. |
| Crypto Engine | Dedicated AES-128/256, SHA-1/256, DES/3DES, RNG - offloads secure boot, encrypted storage, and TLS handshake processing from CPU. |
| Real-Time Subsystems | 2× PRU-ICSS + 2× Cortex-M4 (IPU1/IPU2) - supports EtherCAT, PROFINET, and time-sensitive networking without OS intervention. |
| Connectivity | PCIe Gen2 (2× lanes), SATA Gen2, USB 3.0 DRD + USB 2.0 DRD, dual GMAC (RGMII/MII/RMII), 4× McASP, 5× I2C, 10× UART - enables multi-protocol gateway design. |
Pinout & Package
AM5729BABCXEAR is housed in a 760-ball FCBGA package (23.0 mm × 23.0 mm, 0.8-mm pitch, ABC suffix), with ball grid organized in a symmetric array and 247 GPIOs distributed across multiple voltage domains (1.8V, 3.3V). Unused balls require specific tie-off per TI's PCB layout guidelines (e.g., AE14/AE15 to GND via pull resistor; V28/F18 to corresponding supply).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AB17 (rtc_porz) | RTC power-on reset control | Must connect to VSS when RTC unused; alternative connection to F22 (porz) requires level translation - critical for warm-reset integrity. |
| AF14 (rtc_iso) | RTC isolation signal | Connect to corresponding supply via external pull resistor if unused; ties RTC domain isolation during suspend/resume sequences. |
| K9 / Y14 / R20 / J16 | LD0 bypass capacitors | Capacitor pads for vbbldo_dspeve, vbbldo_gpu, vbbldo_iva, vbbldo_mpu - mandatory for stable low-noise core voltage regulation. |
| L9 / J19 / Y15 / P19 / Y16 | DDR core decoupling | Capacitor pads for vddram_core1–5 - required for DDR signal integrity and timing margin compliance at 1066 MT/s. |
| J10 / J9 | DDR EV E power decoupling | Capacitor pads for vddram_dspeve1/2 - essential for EVE cluster power stability during high-intensity vision processing. |
| G19 | DCAN1 receive input | High-speed CAN 2.0B bus interface - supports industrial fieldbus communication with built-in filtering and loopback test mode. |
Key Features
| Feature | Design Value |
|---|---|
| Heterogeneous Processing | Dual Cortex-A15 + dual C66x DSP + dual Cortex-M4 + 4× EVE - enables workload partitioning across general-purpose, signal-processing, real-time, and vision domains. |
| Video Pipeline Integration | IVA-HD + VPE + HDMI 1.4a encoder + triple display pipeline - delivers full-HD (1920×1080p60) output with hardware compositing and scaling. |
| Industrial Protocol Offload | 2× PRU-ICSS with dual 32-bit RISC engines - executes EtherCAT slave, PROFINET device, or TSN endpoint logic in <1 µs latency, independent of Linux kernel. |
| Cryptographic Acceleration | Hardware AES/SHA/RNG/DES/3DES - achieves >1 Gbps bulk encryption throughput while freeing A15 cores for application logic. |
| Memory Architecture | Dual EMIF + OCMC RAM + GPMC + DMM - supports mixed-memory topologies (e.g., DDR3 for OS, eMMC for storage, NOR for boot) with unified address space. |
| Thermal & Power Management | PRCM subsystem with dynamic voltage/frequency scaling (DVFS), thermal monitoring registers, and 28-nm CMOS process - enables fanless operation in -40°C to 105°C industrial environments. |
Applications
| Industrial HMI Gateway | Smart Camera Node |
|---|---|
|
Use Scenario: Touch-enabled panel PC controlling PLCs, drives, and sensors across Modbus TCP, EtherCAT, and OPC UA. IC Role / Device Role / Timing Role: Central applications processor executing Linux QT GUI, protocol stacks, and real-time motion control loops via PRU-ICSS. Use Value: Single-chip integration eliminates external FPGA or microcontroller co-processors, reducing BOM cost and board area by 35% vs. discrete solutions. |
Use Scenario: Edge AI camera performing real-time object detection, license plate recognition, and metadata tagging before streaming to cloud. IC Role / Device Role / Timing Role: Vision accelerator host running YOLOv3 inference on EVEs while A15 handles network stack and storage I/O. Use Value: 4× EVEs deliver 2.4 GOPS vision compute at <2W, enabling battery-powered deployment where GPU-based SoCs exceed thermal envelope. |
| Substation Automation Controller | Medical Imaging Workstation |
|
Use Scenario: IEC 61850-compliant protection relay with synchronized phasor measurement (PMU) and waveform capture. IC Role / Device Role / Timing Role: Time-critical sampling and FFT processing on C66x DSPs; secure data logging and remote diagnostics on Cortex-A15. Use Value: Hardware crypto engine ensures IEC 62351-compliant encryption of SV/GOOSE messages without degrading PMU sampling rate (up to 128 samples/cycle). |
Use Scenario: Portable ultrasound console requiring real-time beamforming, Doppler processing, and DICOM export over Gigabit Ethernet. IC Role / Device Role / Timing Role: VPE + BB2D graphics engine renders live B-mode images; dual EMIF sustains 2.1 GB/s raw sensor data throughput. Use Value: Integrated HDMI 1.4a and triple display pipeline drive medical-grade monitors directly - eliminating external video bridge ICs and associated EMI risks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance industrial applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM5728BABCXEAR | Omits EVEs, IVA-HD, HDMI, and BB2D - reduces vision/video capability but maintains identical CPU/DSP/PRU-ICSS and memory subsystem. | Suitable for non-vision industrial controllers where 4K video or embedded vision is unnecessary. | Select AM5728BABCXEAR when vision acceleration is not required and lower thermal design power (TDP) is prioritized. |
| AM5749BABCXEAR | Adds dual Cortex-R5 safety lockstep cores, ISO 26262 ASIL-B support, and enhanced functional safety peripherals (e.g., lockstep timers, ECC on all RAM). | Required for automotive ADAS domain controllers or medical devices needing IEC 62304 Class C certification. | Choose AM5749BABCXEAR only when functional safety certification (ISO 26262/IEC 61508) is mandated - not a drop-in replacement. |
Compared with AM5728BABCXEAR, AM5729BABCXEAR adds full vision acceleration and HDMI output at higher power; versus AM5749BABCXEAR, it lacks safety-certified cores and lockstep mechanisms, making it optimal for cost-sensitive industrial edge nodes without formal safety requirements.
Availability
AM5729BABCXEAR is available at Aetrix Electronics and suitable for industrial HMIs, smart camera nodes, substation automation controllers, and medical imaging workstations requiring stable component supply across extended product lifecycles.
Supply support for AM5729BABCXEAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and connectivity technologies with over 50 years of innovation in industrial and automotive markets.
The AM5729BABCXEAR belongs to TI's Sitara™ Arm® processor family, designed specifically for high-performance embedded applications demanding heterogeneous processing, real-time I/O, and integrated vision/audio acceleration in harsh industrial environments.
FAQ
What is the maximum DDR3 speed supported by AM5729BABCXEAR?
AM5729BABCXEAR supports DDR3/DDR3L memory interfaces up to DDR3-1066 (533 MHz clock, 1066 MT/s data rate) per EMIF channel. Each EMIF supports up to 2GB of physical memory, and the Dynamic Memory Manager (DMM) enables interleaving across both channels for optimized bandwidth - verified in TI's SPRS953G datasheet Section 7.9.
Does AM5729BABCXEAR include hardware cryptographic acceleration?
Yes, AM5729BABCXEAR integrates dedicated crypto hardware accelerators supporting AES-128/256, SHA-1/256, DES/3DES, and a true random number generator (RNG). These engines operate independently of the CPU cores and are accessible via TI's Cryptographic Software Library (CSL) - enabling secure boot, encrypted filesystems, and TLS offload without impacting application performance.
How many PRU-ICSS units does AM5729BABCXEAR contain?
AM5729BABCXEAR contains two fully independent Programmable Real-Time Unit and Industrial Communication SubSystems (PRU-ICSS1 and PRU-ICSS2). Each includes dual 32-bit RISC processors, local instruction/data RAM, interrupt controllers, and dedicated peripherals for industrial Ethernet, CAN, and GPIO bit-banging - enabling simultaneous EtherCAT slave and PROFINET device operation.
What video codecs and resolutions does the IVA-HD subsystem in AM5729BABCXEAR support?
The IVA-HD subsystem in AM5729BABCXEAR supports H.264 encode and decode at up to 4K resolution (3840×2160) at 15 fps. For other codecs including MPEG-4, VC-1, and VP8, maximum resolution is 1080p60. This capability is documented in the SPRS953G datasheet Section 1.1 and confirmed in TI's AM572x Technical Reference Manual.
Is AM5729BABCXEAR pin-compatible with AM5728BABCXEAR?
Yes, AM5729BABCXEAR and AM5728BABCXEAR share identical 760-ball FCBGA (ABC) packaging, mechanical footprint, and pinout - enabling hardware reuse across variants. However, functionality differs: AM5729BABCXEAR enables EVEs, IVA-HD, HDMI, and BB2D, while AM5728BABCXEAR disables these blocks. Firmware and PCB layout are interchangeable, but software must account for feature availability.
AM5729BABCXEAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 760-BFBGA, FCBGA
- Series:
- Sitara™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A15
- Number of Cores/Bus Width:
- 2 Core, 32-Bit
- Speed:
- 1.5GHz
- Co-Processors/DSP:
- DSP, BB2D, IPU, IVA, GPU, VPE
- RAM Controllers:
- DDR3, SRAM
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- -
- Ethernet:
- GbE (2)
- SATA:
- SATA 3Gbps (1)
- USB:
- USB 2.0 (1), USB 3.0 (1)
- Voltage - I/O:
- 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 760-FCBGA (23x23)
- Additional Interfaces:
- CAN, EBI/EMI, HDQ/1-Wire®, I2C, McASP, McSPI, MMC/SD/SDIO, PCIe, QSPI, UART
AM5729BABCXEAR FAQ
1.How can I place an order for AM5729BABCXEAR through Aetrix?
Please submit a Request for Quotation (RFQ) for AM5729BABCXEAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AM5729BABCXEAR reliable?
The price and inventory of AM5729BABCXEAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM5729BABCXEAR is usually 5 days.
3.What payment methods are accepted for AM5729BABCXEAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AM5729BABCXEAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AM5729BABCXEAR?
AM5729BABCXEAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AM5729BABCXEAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AM5729BABCXEAR?
For technical support, including AM5729BABCXEAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM5729BABCXEAR requirements.
6.How does Aetrix verify that AM5729BABCXEAR is sourced from the original manufacturer or authorized distributors?
All AM5729BABCXEAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM5729BABCXEAR meets industry standards.
7.What is the process for return or replacement of AM5729BABCXEAR?
All AM5729BABCXEAR units undergo pre-shipment inspection (PSI). If there is an issue with AM5729BABCXEAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AM5729BABCXEAR part is unused and in its original packaging.
Return procedure for AM5729BABCXEAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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