Texas Instruments AM5746ABZXAS

Overview

AM5746ABZXAS from Texas Instruments is a high-performance Sitara™ Arm® applications processor featuring dual Cortex®-A15 CPUs, two C66x DSP cores, 2.5MB on-chip L3 RAM, dual DDR3/DDR3L EMIFs supporting up to DDR3-1333, and hardware cryptographic acceleration (AES-128/192/256, SHA2-224/256/384/512). It targets industrial HMI, automation control, and analytics edge nodes requiring deterministic real-time processing with secure boot and TrustZone®-based TEE.

For engineers reviewing the AM5746ABZXAS datasheet, AM5746ABZXAS pinout, AM5746ABZXAS application, or AM5746ABZXAS equivalent, key selection considerations include its lack of HDMI, EVE, IVA-HD, SGX544 GPU, and BB2D 2D accelerator-features present in AM5749/AM5748 but explicitly omitted in AM5746 per device comparison tables-making it suitable for cost-optimized, non-multimedia industrial control applications with full peripheral set including dual PRU-ICSS, PCIe Gen2, SATA, USB 3.0/2.0, and MCAN-FD.

Technical Context

The AM5746ABZXAS implements a heterogeneous compute architecture: dual Cortex-A15 cores handle OS-level control and application logic, while two C66x VLIW DSPs execute signal- and vision-processing algorithms with up to 32 × 16-bit fixed-point multiplies per cycle. Its memory subsystem includes two independent DDR3/DDR3L interfaces (EMIF1 with ECC support, EMIF2 without), unified 2.5MB OCMC RAM with ECC, and GPMC for NAND/NOR/async memory expansion.

Real-time determinism is enforced via two dual-core Cortex-M4 coprocessors (IPU1/IPU2), two PRU-ICSS subsystems for industrial protocol offload (EtherCAT®, Profinet), and dedicated accelerators including VPE for video scaling/compositing and EDMA for zero-CPU-memory transfers. Security is implemented at silicon level with hardware root-of-trust, programmable OTP keys, and Arm TrustZone® isolation across MPU, GPU, DSP, and DMA paths.

Key Specifications

Pinout & Package

AM5746ABZXAS uses a 23 mm × 23 mm, 0.8-mm pitch, 760-ball FCBGA package (ABZ) with exposed thermal pad. Ball grid follows JEDEC MO-275AC standard; non-connected balls include AF7, AF10, AF13, AF16, AF19, AE4, AE25, AB26, W3, W26, T3, T26, N3, N26, K3, K26, G3, D4, D25, C10, C13, C16, C19, C22, and C25.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance industrial processor applications.

Compared with AM5748ABZXAS, AM5746ABZXAS removes display-specific IP to lower cost and power while retaining identical industrial connectivity (PRU-ICSS, MCAN-FD, PCIe), security (TrustZone, crypto), and real-time capability (dual M4, VPE). Against AM5728ABZXAS, AM5746ABZXAS delivers 2× CPU throughput, full DSP compute, and MCAN-FD-justifying its use in next-generation industrial edge nodes requiring analytics and protocol flexibility.

Availability

AM5746ABZXAS is available at Aetrix Electronics and suitable for industrial HMI, programmable logic controller (PLC) edge nodes, smart gateways for IIoT, video analytics appliances, and automation control systems requiring stable component supply across extended product lifecycles.

Supply support for AM5746ABZXAS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company designing analog, embedded processing, and connectivity solutions for industrial, automotive, and consumer markets.

The AM574x Sitara™ processor family targets high-performance industrial applications requiring heterogeneous compute, real-time determinism, and hardware security-designed specifically for HMIs, PLCs, robotics, and edge analytics where mixed-signal integration and long-term availability are critical.

FAQ

What is the maximum DDR3 speed supported by AM5746ABZXAS?

AM5746ABZXAS supports DDR3-1333 (667 MHz) on both EMIF1 and EMIF2 interfaces. EMIF1 includes ECC support for mission-critical applications, while EMIF2 operates without ECC. The device's memory controller complies with JEDEC DDR3L standards and supports 1.35V and 1.5V DDR3 modules. Layout must follow TI's DDR3 board design guidelines-including fly-by topology, length matching, and proper termination-to achieve stable operation at rated speed. AM5746ABZXAS does not support LPDDR3 or DDR4.

Does AM5746ABZXAS include hardware support for CAN FD?

Yes, AM5746ABZXAS includes a Modular Controller Area Network (MCAN) module that supports CAN FD (Flexible Data Rate) functionality per ISO 11898-1:2015, enabling data phase speeds up to 5 Mbps and payloads up to 64 bytes. This is distinct from the two legacy DCAN modules (DCAN1/DCAN2), which only support classical CAN 2.0B. MCAN is pin-muxed on dedicated ball locations and requires specific configuration of the CTRL_CORE_PAD_MCANA/MCANB registers. AM5746ABZXAS fully implements MCAN-FD without requiring external transceivers beyond standard CAN PHYs.

What security features are enabled on AM5746ABZXAS?

AM5746ABZXAS includes hardware-enforced secure boot with one-time-programmable (OTP) fuses for customer keys, Arm TrustZone®-based Trusted Execution Environment (TEE), cryptographic acceleration for AES-128/192/256, SHA2-224/256/384/512, MD5, SHA1, 3DES, and a true random number generator. Debug access is secured via software-controlled lockdown, and DMA paths are isolated within secure worlds. While HS (High-Security) variants offer additional debug lockdown and anti-rollback protection, AM5746ABZXAS implements all baseline security IP blocks-including secure boot root-of-trust and TEE-as standard silicon features.

Can AM5746ABZXAS run Linux and real-time operating systems simultaneously?

Yes, AM5746ABZXAS supports concurrent execution of Linux on the dual Cortex-A15 cores and real-time OSes (e.g., TI-RTOS, FreeRTOS) on the dual Cortex-M4 coprocessors (IPU1/IPU2). Inter-processor communication occurs via mailbox interrupts and shared memory in OCMC RAM, with hardware spinlocks ensuring atomic access. This asymmetric multiprocessing model isolates time-critical tasks (motor control, I/O scanning) from general-purpose workloads (web server, GUI), eliminating OS scheduling jitter. AM5746ABZXAS reference designs demonstrate this configuration with validated IPC frameworks and memory partitioning.

What display interfaces are supported by AM5746ABZXAS?

AM5746ABZXAS does not include HDMI, LVDS, or RGB display controllers-the display subsystem (HDMI encoder, VOUT1–VOUT3, BB2D 2D accelerator, SGX544 GPU, and IVA-HD) is explicitly disabled per device comparison tables. It supports only parallel digital video output via the Video Processing Engine (VPE), which can drive RGB888, YUV422, or BT.656-compatible interfaces at up to 1080p60. For HDMI or LVDS output, an external bridge IC (e.g., TI DS90UB925Q) must be used. AM5746ABZXAS retains full VIP (Video Input Port) support for camera input.