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Texas Instruments AM6546BACDXA
- Part No.:
- AM6546BACDXA
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 784-LFBGA, FCBGA
- Datasheet:
-
AM6546BACDXA.pdf
- Description:
- IC MPU SITARA 1.1GZ/400MZ 784BGA
- Quantity:
- Payment:
- Shipping:
Inventory:207
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Product details
Overview
AM6546BACDXA from Texas Instruments is a quad-core Arm® Cortex®-A53 + dual-core Arm® Cortex®-R5F industrial Sitara™ processor in 784-pin FCBGA (23 mm × 23 mm), supporting DDR4-1600, three PRU_ICSSG subsystems (up to six Gigabit Ethernet ports), functional safety up to SIL 2, and cryptographic acceleration including AES-256, SHA2-512, and PKA. It targets industrial PLCs, robotic motor drives, and safety-critical HMI systems.
For engineers reviewing the AM6546BACDXA datasheet, AM6546BACDXA pinout, AM6546BACDXA application, or AM6546BACDXA equivalent, key selection criteria include dual R5F lockstep support for functional safety, PRU_ICSSG-based multi-protocol industrial Ethernet (Profinet IRT, EtherCAT®, TSN), DDR4 memory subsystem with 7-bit SECDED, and integrated DMSC for centralized security and power management.
Technical Context
The AM6546BACDXA implements two dual-core Arm® Cortex®-A53 clusters (each with 512KB L2 cache and SECDED) and a dual-core Arm® Cortex®-R5F subsystem operating up to 400 MHz with lockstep mode, 16KB ICache/DCache, and 64KB RAM per core. Its industrial subsystem integrates three PRU_ICSSG units, each delivering two 10/100/1000 Ethernet ports, SGMII support, 24× PWMs, 18× sigma-delta filters, and six multi-protocol encoder interfaces.
The SoC includes a 2MB on-chip L3 RAM with SECDED, a Multi-core Shared Memory Controller (MSMC) with 2MB SRAM (2 banks × 1MB), DDR Subsystem (DDRSS) supporting DDR4-1600 on a 32-bit bus with 7-bit SECDED, and a Device Management Security Controller (DMSC) managing boot, security, functional safety, clock/reset/power, and firewall policy enforcement across all domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Quad-core Arm® Cortex®-A53 (two dual-core clusters) + dual-core Arm® Cortex®-R5F, with optional lockstep for functional safety |
| Max Clock Frequency | A53 up to 1.1 GHz; R5F up to 400 MHz - enables real-time deterministic control alongside high-level OS execution |
| Memory Interface | DDR4-1600 (32-bit data + 7-bit SECDED bus); 8 GB addressable space - supports industrial Linux RT and safety-certified runtime environments |
| Industrial Connectivity | Three PRU_ICSSG subsystems, each with two 10/100/1000 Ethernet ports and SGMII - delivers up to six independent industrial Ethernet channels for Profinet, EtherCAT®, or TSN |
| Functional Safety | IEC 61508 certified by TÜV SÜD; hardware integrity up to SIL 2; ECC/parity on critical memories and interconnect; BIST for CPU and RAM |
| Security Acceleration | Hardware AES-128/192/256, SHA2-224/256/384/512, PKA for RSA/ECC, DRBG with TRNG - enables secure boot, encrypted OSPI, and packet-level networking encryption |
| Package | 784-pin FCBGA (ACD), 23.0 mm × 23.0 mm, 0.8-mm pitch - compatible with standard industrial PCB assembly and thermal management |
Pinout & Package
AM6546BACDXA is housed in a 784-ball FCBGA (ACD) package with 0.8-mm pitch and 23.0 mm × 23.0 mm footprint. Pin functions are defined across DDR, PRU_ICSSG, PCIe, USB, CSI-2, MCAN-FD, and multiple I/O banks, with dedicated power/ground balls and configurable I/O voltage domains (1.1 V/1.2 V/1.35 V for DDR; 1.8 V for CSI/IO; 3.3 V for legacy peripherals).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DDR_AC0–DDR_AC27 | DDR Address/Command | 28-bit address/command bus for DDR4 interface; requires matched trace length and termination per JEDEC DDR4 spec |
| DDR_CK0P/N, DDR_CK1P/N | DDR Clock Differential Pairs | Two differential clock pairs for DDR4; routed as controlled-impedance 100-Ω differential traces |
| DDR_DQ0–DDR_DQ63 | DDR Data Bus | 64-bit data bus with per-byte DQS strobes; supports DDR4-1600 (800 MT/s) with 7-bit SECDED error correction |
| PRU0_RGMII0_TXD[3:0] | PRU_ICSSG RGMII Transmit Data | 4-bit RGMII transmit lane for first Gigabit Ethernet port of PRU_ICSSG0 - requires 50-Ω single-ended routing |
| PCIe0_REFCLK_P/N | PCIe Reference Clock | Differential 100-MHz reference clock input for PCIe Gen2 subsystem; critical for Gen2 link training stability |
| USB0_SS_TX_P/N | USB 3.1 SuperSpeed Transmit | Differential SuperSpeed transmit pair for USB 3.1 DRD port; routed as 90-Ω differential impedance |
Key Features
| Feature | Design Value |
|---|---|
| Triple PRU_ICSSG subsystems | Enables concurrent deployment of up to six industrial Ethernet protocols (e.g., EtherCAT® on PRU0, Profinet IRT on PRU1, TSN on PRU2) without CPU intervention |
| Integrated DMSC with firewall matrix | Provides hardware-enforced isolation between A53, R5F, PRUs, and peripherals - essential for Freedom From Interference (FFI) in SIL 2 designs |
| On-chip 2MB MSMC SRAM with SECDED | Eliminates external SRAM for safety-critical code/data storage; ECC detection/correction ensures memory integrity in harsh environments |
| MCU Island architecture | Physically isolates R5F cores with dedicated voltage, clocks, resets, and peripherals - simplifies functional safety certification and fault containment |
| Hardware crypto engine with session-aware key switching | Allows real-time payload encryption/authentication in network stacks without software overhead or key exposure in memory |
Applications
| Industrial PLC Control | Robotic Motor Drive |
|---|---|
|
Use Scenario: High-speed motion control in servo-driven robotic arms requiring synchronized I/O, encoder feedback, and safety shutdown. IC Role / Device Role / Timing Role: AM6546BACDXA executes real-time motion algorithms on R5F lockstep cores while A53 runs Linux-based HMI and diagnostics; PRU_ICSSG handles encoder capture and PWM generation with cycle-by-cycle precision. Use Value: Integrated 6× EQEP, 6× EHRPWM, and 18× sigma-delta filters enable direct connection to resolvers, Hall sensors, and current shunts - eliminating external timing ICs and reducing BOM count. |
Use Scenario: Compact, safety-certified motor drive unit integrating field-oriented control (FOC), STO/SBC, and EtherCAT® master functionality. IC Role / Device Role / Timing Role: R5F cores implement SIL 2-compliant safety logic and FOC loops; PRU_ICSSG offloads EtherCAT® frame processing and distributed clock synchronization; A53 hosts web server and firmware update. Use Value: On-chip PRU_ICSSG eliminates need for external EtherCAT® ASIC or FPGA, reducing latency to <1 µs and enabling sub-100 µs jitter for synchronized multi-axis control. |
| HMI with Functional Safety | Grid Protection Relay |
|
Use Scenario: Operator interface for safety-rated machinery with touch display, emergency stop monitoring, and dual-channel safety inputs. IC Role / Device Role / Timing Role: A53 runs Qt-based GUI and secure OTA updates; R5F executes SIL 3-compliant safety monitor checking watchdogs, voltage, temperature, and input redundancy; DMSC enforces memory and peripheral firewalls. Use Value: Hardware BIST, ESM error signaling, and voltage/temperature monitoring allow continuous self-test - meeting IEC 62061 requirements without external supervision ICs. |
Use Scenario: Digital protection relay for medium-voltage substations requiring precise time-synchronized fault detection and tripping via IEC 61850 GOOSE/SV. IC Role / Device Role / Timing Role: R5F cores execute protection algorithms with deterministic response; CPSW + PRU_ICSSG provide IEEE 1588-2008 Annex D/E/F timestamping and PTP grandmaster capability; DDR4 stores event logs with ECC. Use Value: Hardware-assisted IEEE 1588 timestamping achieves <50 ns accuracy across multiple Ethernet ports - satisfying IEC 61850-9-3 Class C (≤1 µs) synchronization requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar industrial processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM6548BACDXA | Includes PowerVR SGX544-MP1 GPU and display subsystem (MIPI DPI, OLDI); identical CPU, PRU_ICSSG, DDR, and safety features | Required when HMI requires local graphics rendering or video output; unnecessary for headless control or remote-display-only systems | Select AM6548BACDXA only if GPU-accelerated UI or dual-display output is needed; AM6546BACDXA reduces cost and power when graphics are handled externally. |
| AM6526BACDXA | Dual-core Arm® Cortex®-A53 (single cluster), same R5F, PRU_ICSSG, DDR, and safety features; lower max A53 frequency (1.0 GHz vs. 1.1 GHz) | Suitable for less computationally intensive control tasks where dual-A53 performance suffices and quad-core headroom is not required | Choose AM6526BACDXA for cost-sensitive, lower-throughput industrial gateways or edge controllers where A53 compute demand is ≤2 cores. |
Compared with AM6548BACDXA, AM6546BACDXA removes GPU and display IP to reduce silicon area and power; compared with AM6526BACDXA, it doubles A53 core count and increases max frequency - making it optimal for complex Linux-based control with concurrent real-time safety tasks.
Availability
AM6546BACDXA is available at Aetrix Electronics and suitable for industrial PLCs, robotic motor drives, safety-certified HMIs, and grid protection relays requiring stable component supply, long-term lifecycle support, and functional safety documentation.
Supply support for AM6546BACDXA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and connectivity solutions for industrial, automotive, and communications markets.
The AM6546BACDXA belongs to TI's Sitara™ Arm® processor family, designed specifically for industrial automation applications demanding functional safety, real-time determinism, multi-protocol industrial Ethernet, and secure boot - with architectural emphasis on MCU island isolation and PRU-based offload.
FAQ
What is the functional safety certification status of the AM6546BACDXA?
The AM6546BACDXA is IEC 61508 certified by TÜV SÜD for functional safety applications, with systematic capability up to SIL 3 and hardware integrity up to SIL 2. It includes ECC/parity on critical memories, firewalls for Freedom From Interference, BIST for CPU and RAM, and voltage/temperature monitoring - all documented to aid safety system design. The AM6546BACDXA datasheet and safety manual provide full evidence for integration into SIL 2 or SIL 3 systems.
Does the AM6546BACDXA support CAN-FD communication?
Yes, the AM6546BACDXA integrates two Modular Controller Area Network (MCAN) modules with full CAN-FD support, enabling data rates up to 5 Mbps and payloads up to 64 bytes. These MCAN interfaces operate independently, support ISO 11898-1:2015, and are accessible via dedicated pins - allowing direct connection to CAN-FD transceivers without external protocol translation. This capability is confirmed in the AM6546BACDXA device comparison table and peripheral description sections.
How does the PRU_ICSSG subsystem differ from standard Ethernet MACs in the AM6546BACDXA?
The PRU_ICSSG in the AM6546BACDXA is a programmable real-time unit with integrated industrial communication accelerators - not a conventional Ethernet MAC. Each PRU_ICSSG provides two 10/100/1000 Ethernet ports, SGMII support, 24× PWMs, 18× sigma-delta filters, and six encoder interfaces, enabling protocol-specific offload (e.g., EtherCAT® frame processing, Profinet IRT scheduling) without CPU involvement. This differs from the CPSW Gigabit Ethernet interface, which serves general-purpose networking.
What DDR memory types and speeds are supported by the AM6546BACDXA?
The AM6546BACDXA DDR Subsystem (DDRSS) supports DDR4 memory only, up to DDR-1600 (800 MT/s), with a 32-bit data bus and 7-bit SECDED ECC bus. It does not support DDR3L or LPDDR4. The maximum addressable space is 8 GB, and the interface complies with JEDEC DDR4 specifications including write leveling, read leveling, and ZQ calibration - all required for reliable operation in industrial temperature ranges.
Is the AM6546BACDXA pin-compatible with other AM65xx devices like AM6548 or AM6526?
Yes, the AM6546BACDXA shares the identical 784-pin FCBGA (ACD) package, mechanical footprint, and pinout with AM6548BACDXA, AM6528BACDXA, and AM6526BACDXA - as confirmed in TI's packaging information table and pin diagram documentation. This allows PCB reuse across the AM65xx family, though designers must verify signal routing compatibility for unused peripherals (e.g., GPU signals in AM6548 not present in AM6546BACDXA).
AM6546BACDXA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 784-LFBGA, FCBGA
- Series:
- Sitara™
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A53, Arm® Cortex®-R5F
- Number of Cores/Bus Width:
- 6 Core, 32-Bit
- Speed:
- 1.1GHz, 400MHz
- Co-Processors/DSP:
- GPU PowerVR SGX544-MP1 3D
- RAM Controllers:
- DDR3, DDR4, LPDDR4
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LVDS, MIPI-CSI
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 (1), USB 3.1 (1)
- Voltage - I/O:
- 1.2V, 1.35V, 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- 3DES, AES, DRBG, MD5, PKA, SHA
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 784-FCBGA (23x23)
- Additional Interfaces:
- CANbus, I2C, I2S, MMC/SD/SDIO, McASP, McSPI, QSPI, TDM, UART
AM6546BACDXA FAQ
1.How can I place an order for AM6546BACDXA through Aetrix?
Please submit a Request for Quotation (RFQ) for AM6546BACDXA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AM6546BACDXA reliable?
The price and inventory of AM6546BACDXA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AM6546BACDXA is usually 5 days.
3.What payment methods are accepted for AM6546BACDXA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AM6546BACDXA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AM6546BACDXA?
AM6546BACDXA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AM6546BACDXA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AM6546BACDXA?
For technical support, including AM6546BACDXA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AM6546BACDXA requirements.
6.How does Aetrix verify that AM6546BACDXA is sourced from the original manufacturer or authorized distributors?
All AM6546BACDXA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AM6546BACDXA meets industry standards.
7.What is the process for return or replacement of AM6546BACDXA?
All AM6546BACDXA units undergo pre-shipment inspection (PSI). If there is an issue with AM6546BACDXA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AM6546BACDXA part is unused and in its original packaging.
Return procedure for AM6546BACDXA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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