Alpha & Omega Semiconductor Inc. AOZ1321DI-04
- Part No.:
- AOZ1321DI-04
- Manufacturer:
- Alpha & Omega Semiconductor Inc.
- Package:
- 4-UFDFN Exposed Pad
- Datasheet:
-
AOZ1321DI-04.pdf
- Description:
- IC PWR SWITCH P-CHANNEL 1:1 4DFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,781
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Product details
Overview
AOZ1321DI-04 from Alpha & Omega Semiconductor is a single-channel high-side power-distribution switch featuring a 70 mΩ N-channel MOSFET, 1.5 A continuous current rating, 2.7 V to 5.5 V input voltage range, active-high enable logic, and open-drain overcurrent fault flag - designed for USB power switching in notebook and desktop computers.
For engineers reviewing the AOZ1321DI-04 datasheet, pinout, applications, or equivalent options, key selection criteria include thermal shutdown (135 °C), OC deglitch timing (4–15 ms), reverse current blocking, charge-pump gate drive enabling low-voltage operation, and SO-8 package compatibility with standard PCB layouts.
Technical Context
The AOZ1321DI-04 integrates an internal charge pump that drives the N-channel MOSFET gate above VIN, enabling full enhancement down to 2.7 V supply while controlling rise/fall times (0.4–1.5 ms) to limit inrush current. It operates as a high-side switch with inherent reverse-current blocking when disabled.
Overcurrent protection triggers at 1.6–2.7 A and asserts an open-drain OC signal with 4–15 ms deglitching; thermal shutdown activates at 135 °C with 30 °C hysteresis and recovers at 105 °C. UVLO disables operation below 2.12–2.22 V rising threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RDS(ON) | 70 mΩ typical - enables low conduction loss at 1.5 A, minimizing self-heating during sustained load conditions. |
| Continuous Current | 1.5 A maximum - supports USB peripheral power delivery without external current limiting. |
| VIN Range | 2.7 V to 5.5 V - ensures compatibility with 3.3 V and 5 V system rails, including battery-backed USB ports. |
| Enable Logic | Active-high - simplifies interface with standard GPIOs and avoids need for level-shifting or inverters. |
| OC Flag | Open-drain, deglitched (4–15 ms) - prevents false triggering from transient surges while providing reliable short-circuit detection. |
| Thermal Shutdown | 135 °C trip / 105 °C recovery - protects against sustained overload or poor heatsinking without latch-up. |
| Reverse Blocking | Enabled when disabled - eliminates backfeed from output to input, critical for isolated power domains. |
Pinout & Package
AOZ1321DI-04 is housed in an SO-8 package (JEDEC MS-012AC) with exposed pad for enhanced thermal performance. Pin 1 is GND; pins 2 and 3 are IN (tied internally); pin 4 is EN; pin 5 is OC; pins 6 and 7 are OUT; pin 8 is NC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Power ground reference | Return path for all internal circuits and power switch; must connect to low-impedance system ground plane. |
| IN (Pins 2, 3) | Input voltage supply | Dual-pin configuration reduces trace inductance and improves current sharing for high-di/dt loads. |
| EN (Pin 4) | Logic enable input | Active-high TTL/CMOS-compatible control; pulls <1 μA when inactive to minimize standby power. |
| OC (Pin 5) | Open-drain fault flag | Asserts low during overcurrent or thermal shutdown; requires external pull-up for microcontroller interrupt monitoring. |
| OUT (Pins 6, 7) | Switched output | Dual-pin layout lowers on-resistance contribution from bond wires and supports higher peak currents. |
| NC (Pin 8) | No connection | Unbonded die pad; must remain unconnected and may be left floating or tied to GND for mechanical stability. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated charge pump | Enables full gate drive from 2.7 V input without external components, ensuring robust turn-on across entire operating range. |
| Programmable rise/fall control | Adjusts output slew rate via internal circuitry to suppress inrush current into large capacitive loads (e.g., 100 µF USB ports). |
| Reverse current blocking | Prevents backflow from OUT to IN when disabled - essential for preventing cross-rail interference in multi-power-domain systems. |
| UVLO with hysteresis | Disables switch below 2.12–2.22 V rising threshold and maintains disable state until >2.32 V, avoiding oscillation near brownout. |
| Thermal cycling recovery | Auto-restarts after cooling to 105 °C, enabling fault-tolerant operation in thermally constrained enclosures without manual reset. |
Applications
| USB Port Power Switching | Notebook System Power Management |
|---|---|
|
Use Scenario: Controlling power delivery to downstream USB peripherals in portable notebooks where hot-plug events and capacitive loads cause inrush stress. IC Role / Device Role / Timing Role: High-side load switch managing 5 V rail distribution with controlled turn-on/turn-off timing to prevent bus voltage droop. Use Value: Eliminates need for discrete FET + driver + protection IC, reducing BOM count while maintaining 1.5 A sustained current and reverse-blocking capability. |
Use Scenario: Isolating auxiliary power domains (e.g., card reader, webcam, audio codec) from main 3.3 V/5 V rails during sleep states. IC Role / Device Role / Timing Role: Power-gating switch with fast enable/disable response (<3 ms turn-on, <10 ms turn-off) synchronized to system suspend/resume signals. Use Value: Reduces quiescent current to <1 μA in disabled state and blocks reverse leakage (<0.2 μA), extending battery life in S3/S4 sleep modes. |
| Desktop Motherboard USB Hub Protection | Industrial USB-C Docking Station |
|
Use Scenario: Protecting upstream USB hub controllers from short circuits and overloads caused by faulty downstream devices plugged into front-panel ports. IC Role / Device Role / Timing Role: Fault-aware power switch asserting OC flag within 15 ms of overcurrent event, allowing host firmware to log and disable affected port. Use Value: Provides deterministic fault reporting with deglitched OC output, enabling graceful port disable without system-level reset or watchdog intervention. |
Use Scenario: Managing power sequencing and fault isolation for multiple USB-C alternate mode peripherals (DisplayPort, PCIe) in compact docking stations. IC Role / Device Role / Timing Role: Robust high-side switch supporting 5.5 V max input and thermal shutdown cycling to survive repeated short-circuit events in field-deployed units. Use Value: Maintains functional safety under sustained overload via thermal hysteresis (135 °C trip / 105 °C recovery), avoiding permanent latch-off in thermally challenged enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-side USB power switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TUSB2036IPWR | USB 2.0 hub controller with integrated 100 mA switches per port - not a standalone power switch; lacks 1.5 A rating, OC flag, or thermal shutdown. | Designed for full USB hub functionality (repeater, transaction translator), not discrete load switching. | Select only if full hub functionality is required; not suitable as direct replacement for AOZ1321DI-04's discrete switching role. |
| TPS2051BDBVR | 1.5 A single-channel power switch with similar RDS(ON) (85 mΩ), but uses active-low enable and lacks reverse current blocking. | Requires external inverter for active-high control; no reverse blocking increases risk of backfeed in multi-rail systems. | Acceptable where active-low logic is available and reverse blocking is not required; verify OC response time (no deglitch spec provided). |
Compared with TUSB2036IPWR and TPS2051BDBVR, AOZ1321DI-04 uniquely combines active-high enable, reverse current blocking, deglitched OC reporting, and thermal cycling - making it optimal for space-constrained, fault-resilient USB power management where discrete control and protection are prioritized over integrated hub features.
Availability
AOZ1321DI-04 is available at Aetrix Electronics and suitable for notebook computers, desktop motherboards, and industrial USB-C docking stations requiring stable component supply, long-term lifecycle support, and RoHS-compliant green packaging.
Supply support for AOZ1321DI-04 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Alpha & Omega Semiconductor (AOS) is a fabless power semiconductor company specializing in high-efficiency MOSFETs, power ICs, and advanced packaging for power conversion and management.
The AOZ13xx family was designed specifically for USB and general-purpose power-distribution switching, emphasizing robust fault handling, low-voltage operability, and minimal external component count in space-constrained computing platforms.
FAQ
What is the maximum continuous current rating for AOZ1321DI-04?
The AOZ1321DI-04 is rated for 1.5 A maximum continuous current at ambient temperatures up to +85 °C. This rating assumes proper PCB thermal design using the SO-8 package's exposed pad and adequate copper area. Derating applies above 85 °C ambient per the ΘJA = 115 °C/W specification.
Does AOZ1321DI-04 provide reverse current blocking when disabled?
Yes, AOZ1321DI-04 provides inherent reverse current blocking when disabled due to its high-side N-channel MOSFET architecture and gate drive design. When EN is low, the MOSFET is fully off and prevents current flow from OUT to IN, eliminating backfeed in multi-rail systems - a key differentiator from many competing switches.
What is the purpose of the deglitched OC pin on AOZ1321DI-04?
The OC pin on AOZ1321DI-04 is an open-drain fault flag with built-in deglitching (4–15 ms blanking time) to prevent false triggering from transient inrush currents or brief load spikes. It asserts low during overcurrent or thermal shutdown events and remains asserted until the fault condition is cleared, enabling reliable system-level fault logging and port disable.
Can AOZ1321DI-04 operate from a 3.3 V supply?
Yes, AOZ1321DI-04 operates across a 2.7 V to 5.5 V input range, fully supporting 3.3 V rails. Its internal charge pump ensures sufficient gate overdrive for the N-channel MOSFET even at 3.3 V, maintaining low RDS(ON) and stable switching performance without external boost circuitry.
What package type is used for AOZ1321DI-04?
AOZ1321DI-04 is supplied in an SO-8 package (JEDEC MS-012AC) with exposed thermal pad. This package offers proven manufacturability, thermal performance suitable for 1.5 A operation, and pin compatibility with other members of the AOZ13xx family such as AOZ1312AI-1, enabling flexible design reuse.
AOZ1321DI-04 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Alpha & Omega Semiconductor Inc.
- Package/Case:
- 4-UFDFN Exposed Pad
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- General Purpose
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- P-Channel
- Interface:
- On/Off
- Voltage - Load:
- 1.6V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 2A
- Rds On (Typ):
- 60mOhm
- Input Type:
- Non-Inverting
- Features:
- Load Discharge, Slew Rate Controlled
- Fault Protection:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-DFN-EP (1.2x1.6)
AOZ1321DI-04 FAQ
1.How can I place an order for AOZ1321DI-04 through Aetrix?
Please submit a Request for Quotation (RFQ) for AOZ1321DI-04 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AOZ1321DI-04 reliable?
The price and inventory of AOZ1321DI-04 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AOZ1321DI-04 is usually 5 days.
3.What payment methods are accepted for AOZ1321DI-04?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AOZ1321DI-04 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AOZ1321DI-04?
AOZ1321DI-04 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AOZ1321DI-04 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AOZ1321DI-04?
For technical support, including AOZ1321DI-04 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AOZ1321DI-04 requirements.
6.How does Aetrix verify that AOZ1321DI-04 is sourced from the original manufacturer or authorized distributors?
All AOZ1321DI-04 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AOZ1321DI-04 meets industry standards.
7.What is the process for return or replacement of AOZ1321DI-04?
All AOZ1321DI-04 units undergo pre-shipment inspection (PSI). If there is an issue with AOZ1321DI-04, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AOZ1321DI-04 part is unused and in its original packaging.
Return procedure for AOZ1321DI-04:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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