Diodes Incorporated AP1120SBL-13

Overview

AP1120SBL-13 from Diodes Incorporated is a dual-channel, low-dropout linear regulator IC delivering 1A per channel with fixed outputs of 3.3V (CH1) and 1.8V (CH2), housed in an SOP-8L package. It features ≤1.3V dropout at full load, fast transient response, independent thermal shutdown and current limiting per channel, and supports input voltages up to 18V - enabling stable dual-rail power for mixed-voltage logic systems.

For engineers reviewing the AP1120SBL-13 datasheet, AP1120SBL-13 pinout, AP1120SBL-13 application, or AP1120SBL-13 equivalent, key selection criteria include verified dual-output voltage accuracy (±2% for VOUT1, ±2% for VOUT2), thermal resistance (θ_JA = 45°C/W), ripple rejection (60–70 dB at 120 Hz), load regulation (≤25 mV), and SOP-8L PCB layout compatibility per AP02001.

Technical Context

The AP1120SBL-13 integrates two independent LDO regulators sharing a common SOP-8L thermally enhanced package but with fully isolated internal circuitry - including separate VIN1/VIN2 inputs, GND1/GND2 returns, and dedicated current-limit and thermal-shutdown blocks per channel. Each regulator uses a precision 1.25V reference and error amplifier to maintain output stability under dynamic load steps.

Its architecture supports simultaneous operation with minimal crosstalk: typical load transient response shows <±40 mV deviation at 100 mA → 1 A step (C_OUT = 10 µF tantalum), and line regulation remains ≤0.2% across 4.8–12 V input range. Dropout is specified at ΔV_OUT = 0.1%·V_OUT, confirming true low-dropout behavior at rated current.

Key Specifications

Pinout & Package

SOP-8L (Surface-Mount Small Outline Package, 8-pin, 1.27 mm pitch, 4.9 mm × 6.0 mm body, 1.75 mm max height) with exposed thermal pad connected to GND1/GND2 internally - requires soldering to PCB copper area ≥5.5 mm × 5.5 mm per channel for rated 1A operation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output LDO regulator applications.

Compared with TPS7A4700RGWR and RT9013-33PB, AP1120SBL-13 uniquely delivers integrated 3.3V/1.8V dual outputs in one SOP-8L package with per-channel protection - reducing component count, PCB area, and thermal design effort for mid-power digital systems.

Availability

AP1120SBL-13 is available at Aetrix Electronics and suitable for DDR memory power delivery, FPGA power management, industrial PLC I/O modules, and network interface card designs requiring stable component supply and long-term obsolescence mitigation support.

Supply support for AP1120SBL-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability power management, signal integrity, and protection solutions for industrial, computing, and communications markets.

The AP1120 series belongs to Diodes' precision dual-LDO product line, engineered specifically for space-constrained, multi-rail digital systems requiring independent, well-regulated 3.3V/2.5V or 3.3V/1.8V supplies with fast transient response and robust fault protection.

FAQ

What are the exact output voltages and tolerances for AP1120SBL-13?

AP1120SBL-13 delivers 3.300 V ±2% (3.235–3.365 V) on Channel 1 and 1.800 V ±2% (1.764–1.836 V) on Channel 2, measured at I_OUT = 10 mA and T_A = 25°C with specified input voltage ranges. These values are factory-trimmed and guaranteed across operating temperature (0–125°C junction) and load (0–1 A).

Can AP1120SBL-13 operate with input voltage below 4.8V on CH1?

Yes - CH1 (3.3V) can regulate down to VIN1 ≥ VOUT1 + V_DROP = 4.6V (at 1A, typ.), and CH2 (1.8V) down to VIN2 ≥ 3.1V. Operation below these thresholds results in dropout mode with unregulated output. The 4.8V minimum in datasheet testing ensures margin for worst-case dropout and line regulation verification.

Is the thermal pad on SOP-8L electrically connected, and how must it be handled?

The exposed thermal pad on the AP1120SBL-13 SOP-8L package is internally connected to GND1 and GND2. It must be soldered to a dedicated PCB copper area ≥5.5 mm × 5.5 mm per channel, with ≥4 thermal vias (0.3 mm diameter) connecting to inner ground planes - per Diodes' AP02001 layout guide - to achieve the rated 45°C/W θ_JA.

Does AP1120SBL-13 support power sequencing between channels?

No - AP1120SBL-13 has no enable pins or built-in sequencing control. However, independent VIN1 and VIN2 pins allow external sequencing via staggered power-up of input supplies or series FETs. This enables system-level control of 3.3V-before-1.8V or reverse order, provided each channel's input meets its minimum voltage requirement before loading.