Asahi Kasei Microdevices/AKM AP1150ADS33
- Part No.:
- AP1150ADS33
- Manufacturer:
- Asahi Kasei Microdevices/AKM
- Package:
- SC-74A, SOT-753
- Datasheet:
-
AP1150ADS33.pdf
- Description:
- IC REG LINEAR 3.3V 200MA SOT23-5
- Quantity:
- Payment:

- Shipping:

Inventory:2,420
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Product details
Overview
AP1150ADS33 from Diodes Incorporated is a fixed-output 3.3 V, 200 mA low-dropout linear regulator with on/off control (high-active), ±1.5% output voltage accuracy, 120 mV dropout at 100 mA, and 80 dB PSRR at 1 kHz-designed for noise-sensitive analog rails in RF power supplies and precision ADC/DAC circuits.
For engineers reviewing the AP1150ADS33 datasheet, AP1150ADS33 pinout, AP1150ADS33 application, or AP1150ADS33 equivalent, this page delivers verified specifications, SOT23-5 package details, noise-bypass terminal implementation guidance, thermal derating data, and validated alternative LDOs for post-regulator and low-noise imaging use cases.
Technical Context
The AP1150ADS33 employs a bandgap-referenced error amplifier driving an N-channel pass transistor, with internal over-current and thermal shutdown protection. Its noise-bypass (NP) terminal connects to a dedicated 0.001 µF capacitor to improve low-frequency ripple rejection and reduce output noise-distinct from standard bypass pins.
On/off control is high-active via VCONT, featuring a built-in 500 kΩ pull-down resistor; operation begins when VCONT exceeds 1.8 V and ceases below 0.35 V. The device maintains stability with ≥0.1 µF ceramic output capacitance (CL) and requires separate input (CIN) and NP (CNP) capacitors per layout guidelines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.300 V (±1.5% or ±50 mV tolerance over −40°C to +85°C) |
| Max Output Current | 200 mA continuous (derated above 25°C ambient per θJA = 250°C/W) |
| Dropout Voltage | 120 mV at 100 mA load (enables regulation down to VIN = 3.42 V) |
| PSRR | 80 dB at 1 kHz (supports clean supply for PLL/VCO and high-speed ADCs) |
| Quiescent Current | 63–100 µA (IQ) and ≤0.1 µA standby (ISTANDBY at VCONT = 0 V) |
| Noise Bypass Terminal | NP pin accepts 0.001–0.1 µF capacitor to reduce 1/f noise and improve <10 kHz ripple rejection |
| Operating Input Range | 2.1 V to 14.0 V (supports wide-input post-regulation after buck converters) |
Pinout & Package
SOT23-5 package: 2.9 mm × 2.8 mm × 1.3 mm body, exposed pad not present, JEDEC-compliant footprint with 0.95 mm pin pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - VCONT | On/Off Control Input | High-active enable; internal 500 kΩ pull-down ensures safe OFF state; logic-level compatible with CMOS |
| 2 - GND | Ground Reference | Primary ground return for control circuitry and feedback path; must be low-impedance |
| 3 - NP | Noise Pass Terminal | Connects to 0.001 µF capacitor to GND; filters reference noise and improves PSRR below 10 kHz |
| 4 - VOUT | Regulated Output | Delivers stable 3.3 V; requires ≥0.1 µF ceramic capacitor (CL) directly between VOUT and GND |
| 5 - VIN | Input Supply | Accepts 2.1–14.0 V; requires local 1.0 µF input capacitor (CIN) near VIN–GND pins |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low noise operation | NP terminal enables sub-10 µVRMS output noise (10 Hz–100 kHz) with 0.01 µF CNP |
| Stable with small ceramic output cap | Guaranteed stability using ≥0.1 µF X5R/X7R MLCC (no ESR requirement) |
| High PSRR at critical frequencies | 80 dB @ 1 kHz supports RF power rails and precision analog front-ends |
| Integrated protection | Auto-recovering thermal shutdown (TJ ≈ 150°C) and foldback over-current protection |
| Low quiescent current in active mode | 63–100 µA IQ enables battery-powered instrumentation and always-on sensors |
Applications
| RF Power Supplies | PLL & VCO Bias Rails |
|---|---|
Use Scenario: Powers RF transceiver PA bias and LNA stages in 2.4 GHz Wi-Fi modules where supply noise directly impacts EVM and adjacent channel leakage. IC Role / Device Role / Timing Role: Low-noise post-regulator delivering ultra-clean 3.3 V to analog RF blocks downstream of switching converters. Use Value: 80 dB PSRR at 1 kHz and NP-capacitor–enhanced noise suppression reduce phase noise by >3 dB in VCO outputs. | Use Scenario: Supplies voltage-controlled oscillator and phase-locked loop ICs in clock generation circuits for FPGAs and high-speed SerDes. IC Role / Device Role / Timing Role: Fixed 3.3 V LDO providing stable, low-jitter supply to timing-critical PLL core and charge pump sections. Use Value: ±1.5% output accuracy and <120 mV dropout ensure consistent VCO tuning range across temperature and line variations. |
| Low-Noise Image Sensors | Precision ADC/DAC Reference Rails |
Use Scenario: Powers CMOS image sensor analog front-end (AFE) and column ADC in medical endoscopes and industrial inspection cameras. IC Role / Device Role / Timing Role: Dedicated low-noise 3.3 V rail isolating sensitive pixel readout circuitry from digital switching noise. Use Value: NP terminal filtering reduces 1/f noise contribution, improving SNR by up to 2.5 bits in 14-bit image capture. | Use Scenario: Supplies reference voltage buffers and high-resolution SAR ADCs in portable test equipment and data acquisition systems. IC Role / Device Role / Timing Role: Precision post-regulator for ADC/DAC analog supply domains requiring <0.5% total error budget. Use Value: ±50 mV absolute output tolerance and <10 µVRMS noise preserve ENOB in 16-bit+ converter designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AP2204-3.3TRG1 | Same SOT23-5 package, 300 mA rating, but no NP terminal; PSRR = 65 dB @ 1 kHz | Lacks noise-bypass capability; unsuitable for ultra-low-noise RF or imaging rails | Select only if higher current is needed and PSRR/noise requirements are relaxed |
| MCP1700-3302E/TO | 250 mA, SOT23-5, 6 µA IQ, but no VCONT or NP; PSRR = 55 dB @ 1 kHz | Optimized for ultra-low-power battery operation-not for noise-critical analog supply | Prefer for always-on sensor nodes where standby current dominates design priority |
Compared with AP2204-3.3TRG1 and MCP1700-3302E/TO, the AP1150ADS33 uniquely combines high PSRR, integrated on/off control, and a dedicated noise-bypass terminal-making it the only option among the three qualified for RF power supply and precision imaging applications demanding sub-10 µVRMS noise and 80 dB ripple rejection.
Availability
AP1150ADS33 is available at Aetrix Electronics and suitable for RF power supplies, PLL/VCO biasing, low-noise image sensor units, and precision ADC/DAC reference rails requiring stable component supply across automotive infotainment, medical imaging, and industrial instrumentation programs.
Supply support for AP1150ADS33 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and mixed-signal ICs for power management, signal integrity, and connectivity applications.
The AP1150 series is designed specifically for noise-sensitive analog subsystems-delivering high PSRR, low dropout, and dedicated noise-bypass functionality in compact SOT23-5 and PLP1822-6 packages.
FAQ
What is the guaranteed output voltage tolerance for AP1150ADS33 over temperature?
The AP1150ADS33 guarantees ±1.5% or ±50 mV output voltage accuracy across the full operating temperature range of −40°C to +85°C, as confirmed in Table 3 of the datasheet. At 25°C, typical output is 3.300 V with min/max bounds of 3.217 V and 3.383 V. This tight tolerance ensures reliable biasing for precision analog circuits without external trimming.
Does AP1150ADS33 require an external capacitor on the NP pin, and what value is recommended?
Yes, the AP1150ADS33 requires a capacitor between the NP pin and GND to achieve specified noise and PSRR performance. The datasheet recommends 0.001 µF as standard, but values up to 0.1 µF further reduce 1/f noise and improve low-frequency ripple rejection. Increasing CNP slows on/off transient response but does not damage the IC.
Can AP1150ADS33 operate stably with a 0.1 µF ceramic output capacitor?
Yes-AP1150ADS33 is explicitly characterized for stable operation with ≥0.1 µF ceramic output capacitance (CL) at VOUT = 3.3 V, per Section 11.4 and Figure 3. Unlike many LDOs, it imposes no ESR requirement, enabling use of low-ESR X5R/X7R MLCCs without risk of oscillation. Tantalum capacitors are also supported for enhanced damping.
What is the maximum input voltage and thermal limit for AP1150ADS33 in SOT23-5 package?
The AP1150ADS33 supports up to 14.0 V input voltage and has an absolute maximum junction temperature of 150°C. In SOT23-5, its thermal resistance is θJA = 250°C/W on a standard 4-layer JEDEC board. At 85°C ambient, maximum continuous power dissipation is ~260 mW-limiting usable output current to ~130 mA at 3.3 V with 12 V input.
How does the VCONT pin function, and what logic levels activate AP1150ADS33?
The VCONT pin is high-active: AP1150ADS33 enables when VCONT exceeds 1.8 V and disables when VCONT falls below 0.35 V. An internal 500 kΩ pull-down resistor ensures default OFF state during power-up or floating conditions. Drive sources must supply ≤15 µA at 1.8 V-compatible with standard CMOS outputs without external level-shifting.
AP1150ADS33 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Asahi Kasei Microdevices/AKM
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 14V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.39V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 120 µA
- Current - Supply (Max):
- 2.2 mA
- PSRR:
- 80dB (1kHz)
- Control Features:
- Enable, Bypass
- Protection Features:
- Over Current, Short Circuit
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
AP1150ADS33 FAQ
1.How can I place an order for AP1150ADS33 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP1150ADS33 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP1150ADS33 reliable?
The price and inventory of AP1150ADS33 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP1150ADS33 is usually 5 days.
3.What payment methods are accepted for AP1150ADS33?
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Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP1150ADS33?
AP1150ADS33 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP1150ADS33 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP1150ADS33?
For technical support, including AP1150ADS33 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP1150ADS33 requirements.
6.How does Aetrix verify that AP1150ADS33 is sourced from the original manufacturer or authorized distributors?
All AP1150ADS33 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP1150ADS33 meets industry standards.
7.What is the process for return or replacement of AP1150ADS33?
All AP1150ADS33 units undergo pre-shipment inspection (PSI). If there is an issue with AP1150ADS33, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP1150ADS33 part is unused and in its original packaging.
Return procedure for AP1150ADS33:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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