Asahi Kasei Microdevices/AKM AP1156ADS14

Overview

AP1156ADS14 from Asahi Kasei Microdevices is a negative-input, negative-output linear regulator IC using silicon monolithic bipolar technology, delivering 150mA output current with ±2.0% output voltage accuracy at -1.40V nominal. It features ON/OFF control (high-active), noise reduction terminal (Np), and integrated overcurrent, thermal shutdown, and reverse-bias protection. It serves as a precision bias supply in GaAs FET or CCD analog front-ends.

For engineers reviewing the AP1156ADS14 datasheet, AP1156ADS14 pinout, AP1156ADS14 application, or AP1156ADS14 equivalent, key selection considerations include its -1.40V output tolerance, 160mV dropout at 100mA, SOT23-5 package compatibility, low 155µA quiescent current, and support for 1.0µF ceramic output capacitors in battery-powered analog systems.

Technical Context

The AP1156ADS14 employs a bandgap reference-based regulation architecture with internal current-limiting and thermal foldback. Its high-side VEE input connects to the negative rail, while GND serves as the reference node-enabling true negative-to-negative conversion without external charge pumps.

Control logic uses a high-active Cont terminal referenced to GND, enabling direct interface with 1.3–5.0V logic signals. The Np (noise reduction) terminal accepts a 0.01µF capacitor to suppress internal reference noise, improving ripple rejection by up to 20dB across 10Hz–100kHz.

Key Specifications

Pinout & Package

SOT23-5 surface-mount package with 1.3mm × 2.9mm footprint, 0.95mm height, and gull-wing leads. Thermal pad not present; PCB copper area under package recommended for heat dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar negative-output LDO regulator applications.

Compared with AP1156ADS13 and AP1156ADS15, the AP1156ADS14 provides a distinct -1.40V output point optimized for mid-range CCD and RF biasing-enabling tighter headroom control than -1.3V and lower power dissipation than -1.5V in fixed-load scenarios.

Availability

AP1156ADS14 is available at Aetrix Electronics and suitable for CCD image sensors, GaAs FET biasing, and portable medical imaging modules requiring stable component supply with guaranteed long-term availability.

Supply support for AP1156ADS14 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Asahi Kasei Microdevices Corporation is a Japanese semiconductor manufacturer specializing in analog, power management, and sensor ICs with over 30 years of automotive and industrial qualification experience.

The AP1156ADS series belongs to AKM's precision negative LDO family, designed specifically for low-noise analog biasing in battery-powered imaging and RF systems where space, power, and accuracy are constrained.

FAQ

What is the guaranteed output voltage tolerance for AP1156ADS14 across temperature?

The AP1156ADS14 guarantees ±2.0% output voltage accuracy (±60mV around -1.40V) over the full operating temperature range of -40°C to +85°C, as confirmed in Table 4 of the datasheet under "Electrical Characteristics (Ta=-40°C~85°C)". This tolerance is achieved via factory trimming and remains stable without external components.

Can AP1156ADS14 operate with a -2.5V input supply?

No-AP1156ADS14 requires a minimum input voltage of -2.8V (|Vin| ≥ 2.8V) per the Recommended Operating Conditions table. At -2.5V input, the device falls below dropout margin and cannot maintain regulation; output collapses toward input rail. Always ensure |Vin| ≥ 2.8V for reliable -1.40V output.

Is an input capacitor required for AP1156ADS14 stability?

While not strictly required for basic stability, the datasheet recommends a 1.0µF MLCC input capacitor (Cin) when source impedance is high, battery voltage sags occur, or PCB trace length exceeds 2cm. Without Cin, line transient response degrades and ripple rejection drops by up to 15dB at 100kHz-critical in noisy switcher environments.

How does the Np terminal improve noise performance in AP1156ADS14?

The Np terminal connects directly to the internal bandgap reference node. Adding a 0.01µF capacitor from Np to GND shunts high-frequency reference noise, reducing output voltage noise by 40–50% and improving ripple rejection by ≥20dB in the 10kHz–100kHz band-verified in Figure 16 (Ripple Rejection) of the datasheet.

What is the maximum continuous output current for AP1156ADS14 at 75°C ambient?

At 75°C ambient, derating reduces maximum continuous output current to approximately 115mA. Using the thermal derating curve (Figure 5), Pd drops to ~420mW at 75°C; with worst-case |Vin − Vout| = 15.6V, Iout = 420mW ÷ 15.6V ≈ 27mA-but actual limit is governed by junction temperature: Tj = θJA × Pd + Ta. For SOT23-5 on standard PCB, θJA ≈ 220°C/W, so Pd_max = (150°C − 75°C) ÷ 220°C/W ≈ 341mW → Iout ≈ 341mW ÷ 15.6V ≈ 22mA. However, datasheet Table 4 confirms 150mA is guaranteed at Ta = 85°C, meaning full 150mA is usable up to 85°C with adequate PCB copper.