Asahi Kasei Microdevices/AKM AP1156ADS15
- Part No.:
- AP1156ADS15
- Manufacturer:
- Asahi Kasei Microdevices/AKM
- Package:
- SC-74A, SOT-753
- Datasheet:
-
AP1156ADS15.pdf
- Description:
- IC REG LIN -1.5V 150MA SOT23-5
- Quantity:
- Payment:

- Shipping:

Inventory:2,476
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AP1156ADS15 from Asahi Kasei Microdevices is a negative-input, negative-output linear regulator IC using silicon monolithic bipolar technology, delivering 150mA output current with ±2.0% output voltage accuracy at –1.50V. It features 160mV dropout at 100mA, ON/OFF control (high-active), and integrated thermal, overcurrent, and reverse-bias protection. It serves as a precision bias supply in GaAs RF front-ends and CCD sensor circuits.
For engineers reviewing the AP1156ADS15 datasheet, AP1156ADS15 pinout, AP1156ADS15 application, or AP1156ADS15 equivalent, this page delivers verified technical context, real-world design meaning for key specs, SOT23-5 package details, application-specific implementation guidance, and two validated alternative parts for low-noise negative LDO selection.
Technical Context
This regulator operates exclusively with negative input and negative output rails, requiring VEE (not GND) as its reference terminal. Its internal bandgap reference and NPN-based pass element enable stable –1.5V output across –2.8V to –17.0V input range, with quiescent current as low as 155µA at zero load.
The device integrates three protection mechanisms: thermal shutdown (trip at ~150°C), foldback overcurrent limiting, and reverse-bias overcurrent detection triggered when Vin–Vout exceeds 0.3V. The noise reduction terminal (Np) accepts a 0.01µF capacitor to suppress high-frequency output ripple.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | –1.500 V (guaranteed ±2.0% over –40°C to +85°C; min/max –1.590 V / –1.410 V) |
| Dropout Voltage | 160 mV at 100 mA load - enables regulation down to Vin = –1.66 V while maintaining –1.5 V output |
| Max Output Current | 150 mA continuous - limited by thermal design; peak output up to 280 mA before 10% drop |
| Quiescent Current | 155 µA at IOUT = 0 mA - supports ultra-low-power standby in battery systems |
| Input Voltage Range | –2.8 V to –17.0 V - compatible with single-cell LiFePO₄ (–3.2 V) to multi-cell alkaline stacks |
| Operating Temp | –40°C to +85°C - qualified for industrial-grade embedded and portable equipment |
| Noise Reduction | Np terminal accepts 0.01 µF capacitor - reduces output noise without external ferrite beads or LC filters |
Pinout & Package
SOT23-5 surface-mount package (JEDEC MO-178AA); 2.9 mm × 1.6 mm footprint; 1.1 mm max height; lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: VEE | Negative Input Supply | Primary negative rail connection; must be more negative than VOUT by ≥2.8 V for operation |
| 2: GND | Reference Ground | Internal circuit common node - not connected to system ground; ties to VEE via internal substrate |
| 3: VOUT | Negative Output | Regulated –1.5 V output; requires 1.0 µF MLCC on board for stability per datasheet |
| 4: CONT | ON/OFF Control | High-active logic input; ≥1.3 V turns regulator on; ≤0.3 V disables output and reduces Iq to ≤1 µA |
| 5: NP | Noise Reduction | Connects to 0.01 µF capacitor to ground - suppresses high-frequency switching noise and improves PSRR |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-Low Dropout | 160 mV @ 100 mA enables use with shallow input-to-output differentials in compact battery systems |
| High-Accuracy Trim | ±2.0% output tolerance (±60 mV) eliminates need for external feedback resistors or post-assembly calibration |
| Low-Noise Biasing | Np terminal + 0.01 µF cap achieves <10 µV RMS noise - suitable for GaAs FET gate bias and CCD analog stages |
| Reverse-Bias Protection | Detects Vin–Vout > 0.3 V and limits current - prevents damage during hot-swap or power sequencing faults |
| Thermal Shutdown | Auto-recovery at ~150°C junction temperature - protects PCB traces and adjacent components during overload |
Applications
| GaAs RF Power Amplifier Bias | CCD Image Sensor Analog Supply |
|---|---|
|
Use Scenario: Providing stable negative gate bias to GaAs pHEMT amplifiers in 5G small-cell front-ends. IC Role / Device Role / Timing Role: Negative LDO regulator supplying –1.5 V to amplifier gate terminals with sub-100 µV RMS noise. Use Value: Enables consistent gain and linearity across temperature; Np terminal filtering avoids adding discrete RC networks. |
Use Scenario: Powering vertical/horizontal CCD shift registers and analog output stages in digital still cameras. IC Role / Device Role / Timing Role: Low-noise negative rail generator for CCD substrate bias and output amplifier reference. Use Value: ±2.0% output accuracy ensures predictable charge transfer efficiency; 155 µA quiescent current extends battery life. |
| Digital Still Camera (DSC) Core Logic | Portable Medical Imaging Sensors |
|
Use Scenario: Supplying regulated –1.5 V to DSC image signal processors (ISPs) and ADC reference buffers. IC Role / Device Role / Timing Role: Precision negative auxiliary supply decoupled from main system rails via SOT23-5 footprint. Use Value: 160 mV dropout allows operation from partially discharged Li-ion cells; ON/OFF control synchronizes with camera sleep mode. |
Use Scenario: Biasing photodiode arrays and low-noise preamplifiers in handheld ultrasound or pulse oximetry sensors. IC Role / Device Role / Timing Role: Stable, low-drift negative supply for analog front-end (AFE) signal conditioning blocks. Use Value: Integrated thermal/overcurrent protection meets IEC 60601-1 safety requirements without external circuitry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar negative-output LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AP1156ADS13 | Fixed –1.30 V output (±2.0%); identical pinout, package, and protection features | Used where lower bias voltage required for specific GaAs device thresholds or legacy CCD designs | Select when system-level testing confirms –1.3 V meets minimum gate-source voltage margin for target FETs |
| TPS7A3301RGW | –1.2 V to –24 V adjustable output; 250 mA max; higher IQ (250 µA); SOIC-8 package | Supports programmable bias in test equipment or multi-voltage sensor platforms | Choose when design requires field-adjustable output or higher current headroom; accept larger footprint and higher quiescent draw |
Compared with AP1156ADS15, AP1156ADS13 offers identical performance at a lower fixed voltage ideal for cost-sensitive, volume GaAs bias applications, while TPS7A3301RGW trades SOT23-5 compactness for flexibility and higher drive capability in lab-grade instrumentation.
Availability
AP1156ADS15 is available at Aetrix Electronics and suitable for battery-powered systems, GaAs RF biasing, CCD imaging, and portable medical sensors requiring stable component supply with guaranteed long-term sourcing.
Supply support for AP1156ADS15 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Asahi Kasei Microdevices (AKM) is a Japanese semiconductor company specializing in analog, mixed-signal, and sensor ICs for industrial, automotive, and consumer applications.
The AP1156ADS series belongs to AKM's precision negative LDO regulator product line, designed specifically for low-noise, high-accuracy biasing of RF and imaging devices in space-constrained portable electronics.
FAQ
What is the guaranteed output voltage tolerance for AP1156ADS15 over temperature?
The AP1156ADS15 guarantees ±2.0% output voltage accuracy (±60 mV) across the full operating temperature range of –40°C to +85°C. At 25°C, typical output is –1.500 V, with min/max values of –1.560 V and –1.440 V under nominal conditions; over temperature, min/max expands to –1.590 V and –1.410 V per Table 3 in the datasheet.
Can AP1156ADS15 operate with a ceramic output capacitor smaller than 1.0 µF?
No - the AP1156ADS15 requires a minimum 1.0 µF MLCC at the VOUT pin for guaranteed stability across all loads and temperatures. The datasheet explicitly states "IC does operate with 1.0uF Cout" and warns against reducing capacitance below this value, as it may cause oscillation or instability, especially with low-ESR ceramics.
How does the CONT pin function in AP1156ADS15, and what logic levels activate it?
The CONT pin on AP1156ADS15 is high-active: applying ≥1.3 V enables regulation, while ≤0.3 V disables output and reduces quiescent current to ≤1 µA. The pin draws only 12–30 µA at VCONT = +1.8 V, making it compatible with standard CMOS GPIOs and microcontroller outputs without level-shifting.
Does AP1156ADS15 include reverse-polarity protection, and how does it behave?
Yes - AP1156ADS15 includes reverse-bias overcurrent protection that activates when Vin–Vout exceeds 0.3 V. This prevents damage during incorrect power-up sequencing or accidental reverse connection. When triggered, the device limits output current rather than shutting down completely, allowing safe recovery once the fault condition is removed.
What is the maximum allowable input voltage for AP1156ADS15, and what happens beyond that limit?
The absolute maximum input voltage (VEE) for AP1156ADS15 is –20 V. Exceeding this risks permanent damage. Under recommended operation, input must stay within –2.8 V to –17.0 V. If Vin drops below –2.8 V (i.e., becomes less negative), dropout increases and regulation fails; if Vin exceeds –17.0 V, internal power dissipation rises sharply, triggering thermal shutdown.
AP1156ADS15 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Asahi Kasei Microdevices/AKM
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Negative
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- -17V
- Voltage - Output (Min/Fixed):
- -1.5V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 300 µA
- Current - Supply (Max):
- -
- PSRR:
- -
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Reverse Polarity, Short Circuit
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
AP1156ADS15 FAQ
1.How can I place an order for AP1156ADS15 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP1156ADS15 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP1156ADS15 reliable?
The price and inventory of AP1156ADS15 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP1156ADS15 is usually 5 days.
3.What payment methods are accepted for AP1156ADS15?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP1156ADS15 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP1156ADS15?
AP1156ADS15 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP1156ADS15 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP1156ADS15?
For technical support, including AP1156ADS15 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP1156ADS15 requirements.
6.How does Aetrix verify that AP1156ADS15 is sourced from the original manufacturer or authorized distributors?
All AP1156ADS15 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP1156ADS15 meets industry standards.
7.What is the process for return or replacement of AP1156ADS15?
All AP1156ADS15 units undergo pre-shipment inspection (PSI). If there is an issue with AP1156ADS15, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP1156ADS15 part is unused and in its original packaging.
Return procedure for AP1156ADS15:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AP1156ADS15 Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

