Diodes Incorporated AP2004SG-13

Overview

AP2004SG-13 from Diodes Incorporated is a PWM buck controller IC designed for step-down DC/DC converter regulation, featuring an integrated 1.25V reference, error amplifier, adjustable oscillator (up to 300 kHz), soft-start, UVLO (2.9 V turn-on, 2.4 V turn-off), and short-circuit protection. It drives external N-channel MOSFETs in high-efficiency power supplies for LCD monitors and CD-ROM/XDSL systems.

For engineers reviewing the AP2004SG-13 datasheet, AP2004SG-13 pinout, AP2004SG-13 application, or AP2004SG-13 equivalent, key selection criteria include adjustable switching frequency via CT capacitor, 3.6–27 V input range, push-pull output capable of ±200 mA, SCP threshold at 0.67 V typical, and SOP-8L package compatibility with green RoHS-compliant assembly.

Technical Context

The AP2004SG-13 implements a fixed-frequency voltage-mode PWM control architecture with internal bandgap reference (1.25 V), error amplifier (80 dB gain, 1.5 MHz GBW), and oscillator whose frequency is set by an external CT capacitor (100–6800 pF) to yield 10–300 kHz operation. The COMP pin serves as the error amplifier output and PWM comparator input.

UVLO ensures startup only when VCC exceeds 2.9 V and disables outputs below 2.4 V; SCP latches off the output when the SCP pin voltage drops below 100 mV (typical), with timeout controlled by an external capacitor. The OUT pin delivers push-pull drive with 1.0–1.5 V saturation voltage at 10 mA sink/source.

Key Specifications

Pinout & Package

SOP-8L (Small Outline Package, 8-lead, lead-free, green molding compound), 1.27 mm pitch, 4.9 mm × 6.0 mm body, 1.75 mm max height. RoHS compliant, JEDEC MS-012AC compatible.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PWM buck controller applications.

Compared with UC3843BD1G and TL5001CP, the AP2004SG-13 uniquely integrates latch-type SCP, programmable soft-start, and 27 V operation in SOP-8L-reducing BOM count for mid-power consumer and industrial buck converters needing robust fault management.

Availability

AP2004SG-13 is available at Aetrix Electronics and suitable for LCD monitor power supplies, CD-ROM/XDSL auxiliary regulators, and embedded industrial DC/DC converters requiring stable component supply, RoHS-compliant packaging, and long-lifecycle availability.

Supply support for AP2004SG-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability power management, signal integrity, and protection solutions for industrial, computing, and consumer markets.

The AP2004 belongs to Diodes' PWM controller product line, engineered for cost-effective, integrated step-down regulation in space-constrained applications where UVLO, SCP, and soft-start are essential for system robustness.

FAQ

What is the maximum recommended timing capacitor value for AP2004SG-13 to achieve stable 300 kHz operation?

The datasheet specifies CT = 100–6800 pF for 10–300 kHz operation. For 300 kHz, CT = 100 pF is the upper limit; using 100 pF yields nominal 300 kHz with ±10% tolerance. Values below 100 pF risk instability or failure to start due to insufficient oscillator charge time. Always verify frequency with oscilloscope on CT pin under actual load and temperature.

Can AP2004SG-13 drive a P-channel MOSFET directly in high-side buck configuration?

No. AP2004SG-13's OUT pin is a push-pull driver optimized for N-channel MOSFET gate driving in low-side switch configurations. Its output swing is referenced to GND, not VCC, and lacks level-shifting capability. Driving a P-MOSFET high-side requires complementary gate drive or external level shifter, which is outside the device's intended use per the typical application circuit and block diagram.

How does the SCP function interact with the UVLO circuit during startup?

SCP and UVLO operate independently: UVLO controls initial enablement (outputs remain off until VCC ≥ 2.9 V), while SCP monitors the SCP pin voltage only after UVLO releases. During startup, if SCP asserts before soft-start completes, the latch activates and holds OFF until power cycle. No automatic reset occurs - manual VCC recycle or external reset is required to clear SCP latch.

Is the 1.25 V reference internally buffered, and can it supply external circuitry?

The 1.25 V reference is unbuffered and intended solely for internal error amplifier use. Datasheet electrical characteristics show no output current rating for REF; attempting to source external load causes reference voltage droop and regulation error. External circuits requiring 1.25 V must use a dedicated voltage reference IC, not the AP2004SG-13's internal reference node.