Diodes Incorporated AP61302Z6-7

Overview

AP61302Z6-7 from Diodes Incorporated is a 3A synchronous buck converter with integrated 70mΩ high-side and 50mΩ low-side MOSFETs, operating from 2.4V to 5.5V input and delivering adjustable output (0.6V–3.6V) using a 0.6V ±2% reference. It features 2.2MHz switching frequency at 5V/1.8V, 19μA quiescent current in PFM mode, and a dedicated open-drain Power-Good (PG) indicator. It is used in FPGA/DSP point-of-load regulation where fast transient response and rail integrity monitoring are required.

For engineers reviewing the AP61302Z6-7 datasheet, AP61302Z6-7 pinout, AP61302Z6-7 application, or AP61302Z6-7 equivalent, key selection considerations include its SOT563 package footprint, PG fault signaling behavior, COT control architecture for light-load efficiency, and EN-pin programmable PFM/PWM mode selection under varying load conditions.

Technical Context

The AP61302Z6-7 implements Constant On-Time (COT) control with input-voltage–compensated on-time calculation (t_ON = V_OUT / (V_IN × f_SW)), enabling pseudo-fixed-frequency operation and inherently stable loop response without external compensation. Its minimum off-time is 70ns, supporting high duty-cycle operation down to ~0.43 at 2.4V_IN/1.0V_OUT.

It integrates dual protection-triggered discharge paths: a 125Ω active output discharge during UVLO/OVP shutdown, and a 5MΩ internal pull-up on the PG pin. The PG signal asserts low when V_OUT falls below 90% or rises above 110% of regulation, with 40μs rise delay and 5% hysteresis for clean fault reporting.

Key Specifications

Pinout & Package

SOT563 (6-pin, 1.6mm × 1.6mm × 0.55mm, 0.5mm pitch) - thermally enhanced lead-free package with exposed pad for improved heat dissipation in space-constrained PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck converter applications.

Compared with RT6220AGQW and MP2451DT-LF-Z, the AP61302Z6-7 uniquely combines 3A capability, 2.4V–5.5V input range, integrated PG, and COT control in a 1.6mm² package - making it optimal for compact, intelligent power delivery in consumer and industrial edge devices.

Availability

AP61302Z6-7 is available at Aetrix Electronics and suitable for FPGA core supplies, network video camera power rails, and white goods MCU subsystems requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for AP61302Z6-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and mixed-signal ICs for power management, signal integrity, and connectivity applications.

The AP61302Z6-7 belongs to Diodes' AP613xx family of high-efficiency, low-IQ synchronous buck converters designed for space-constrained, battery-sensitive, and industrial point-of-load applications demanding reliable rail integrity and minimal external components.

FAQ

What is the function of the PG pin on AP61302Z6-7?

The PG (Power-Good) pin is an open-drain output that signals rail health: it remains low during soft-start and asserts high only when VOUT reaches 95% of target and stays within ±5% regulation. It pulls low again if VOUT drops below 90% or rises above 110%, with 40μs rise delay and internal 5MΩ pull-up to VIN - enabling direct interfacing with MCU reset or sequencing logic.

How does the EN pin control PFM vs. PWM operation?

The EN pin voltage relative to VIN determines mode: if EN ≥ VIN − 200mV, the device operates in PFM for light-load efficiency; if EN < VIN − 200mV, it forces PWM regardless of load. This is implemented via internal comparator thresholds (VEN_H = 0.91V, VEN_L = 0.83V), allowing simple resistor-divider programming without additional control logic.

What thermal performance can be expected in SOT563 package?

In standard JEDEC 2-layer FR-4 layout with 2oz copper, the AP61302Z6-7 exhibits θ_JA = 141°C/W and θ_JC = 33°C/W. At 3A load and 5V input, junction temperature rise is ~120°C above ambient - requiring derating above +65°C ambient or use of thermal vias under the exposed pad to maintain safe operation within +125°C T_J limit.

Does AP61302Z6-7 support output short-circuit protection?

Yes - it includes valley current limiting, thermal shutdown (+160°C), and active output discharge (125Ω) triggered during UVLO/OVP faults. During sustained short, the device cycles into hiccup mode: it shuts down, discharges VOUT, waits ~10ms, then attempts restart - preventing thermal runaway while maintaining system-level fault visibility via PG pin behavior.