Diodes Incorporated AP62800SJ-7
- Part No.:
- AP62800SJ-7
- Manufacturer:
- Diodes Incorporated
- Package:
- 12-VFQFN
- Datasheet:
-
AP62800SJ-7.pdf
- Description:
- IC REG BUCK ADJ 8A 12QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AP62800SJ-7 from Diodes Incorporated is an 8A synchronous buck DC-DC converter with integrated 22mΩ high-side and 10mΩ low-side MOSFETs, operating from 4.5V to 17V input and delivering 0.6V–7V output. It uses Constant On-Time (COT) control for fast transient response and low output ripple, features programmable soft-start and EMI-optimized gate driving, and targets FPGA/DSP power rails in consumer and industrial systems.
For engineers reviewing the AP62800SJ-7 datasheet, AP62800SJ-7 pinout, AP62800SJ-7 application, or AP62800SJ-7 equivalent, key selection criteria include its 8A continuous current capability, selectable 400/800/1200kHz switching frequency, PFM/USM/PWM mode flexibility, 0.6V ±1% reference accuracy, and V-QFN2030-12 thermal performance (θJA = 40°C/W).
Technical Context
The AP62800SJ-7 implements a Constant On-Time (COT) control architecture where on-time is dynamically calculated as tON ∝ VOUT/VIN, enabling pseudo-fixed-frequency operation across wide input ranges. Its proprietary gate driver suppresses switching-node ringing without extending MOSFET turn-on/off times, directly reducing high-frequency radiated EMI.
It integrates full protection: cycle-by-cycle valley current limit (10.5A typ), thermal shutdown at +160°C with 30°C hysteresis, precision UVLO (4.25V rising, 3.95V falling), and open-drain Power-Good with 5MΩ internal pull-up. The device supports three distinct operational modes-PFM for light-load efficiency, Ultrasonic Mode for noise-sensitive audio applications, and forced PWM for predictable ripple and timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 4.5V to 17V DC - supports 5V/12V distributed bus inputs and automotive-grade transients up to 19V (non-operational) |
| IOUT Continuous | 8A - enables single-chip power delivery for mid-tier FPGAs, DSPs, and ASIC cores without external current sharing |
| VFB Accuracy | 0.600V ±1% - ensures ±6mV output voltage tolerance at feedback node, critical for <1% regulation in digital load applications |
| fSW Options | 400 / 800 / 1200 kHz - selectable via FSEL pin; higher frequencies allow smaller inductors (e.g., 1.2μH @ 800kHz) and reduced output capacitance |
| Quiescent Current | 195μA - enables >90% efficiency at 10mA load in PFM mode, suitable for always-on system rails |
| RDS(ON) HS/LS | 22mΩ / 10mΩ - low conduction loss pair delivers >92% peak efficiency at 5V/8A (VIN=12V), minimizing thermal stress |
| Thermal Resistance | θJA = 40°C/W - validated on 4-layer FR-4 PCB with minimum recommended copper pad; enables 8A operation at +85°C ambient without forced air |
Pinout & Package
V-QFN2030-12 (Type A) package: 3.0mm × 2.0mm body, 0.5mm pitch, exposed thermal pad (PGND-connected), RoHS-compliant, halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGND (1) | Power Ground | Primary return path for high-current switch node; must connect to large copper plane and Kelvin-tie to GND for stability |
| VIN (2) | Main Input Supply | Accepts 4.5–17V; requires local bulk + ceramic bypassing to suppress switching noise and sustain 8A pulsed current |
| EN (3) | Enable Control | Digital enable with 1.18V precision UVLO threshold; open-circuit enables auto-start; supports sequencing with external logic |
| MODE (4) | Operation Mode Select | GND = PFM, floating = USM, VCC = PWM - configures efficiency/noise/ripple trade-off without external components |
| FSEL (5) | Frequency Select | GND = 400kHz, floating = 800kHz, VCC = 1.2MHz - sets switching frequency to balance size, efficiency, and EMI profile |
| PG (6) | Power-Good Indicator | Open-drain output with 5MΩ internal pull-up; asserts low during soft-start, undervoltage (<85% VOUT), or overvoltage (>115% VOUT) |
| BST (7) | Bootstrap Supply | Drives high-side MOSFET gate; requires 100nF ceramic capacitor to SW to sustain gate voltage during 100% duty cycle |
| SW (8) | Switch Node | Connects to inductor; carries full AC switching current; layout critical for EMI and efficiency - minimize loop area with PGND |
| VCC (9) | Internal Bias Supply | Regulated 5.0V output (±2.5%) powering control logic; requires 1μF ceramic cap to PGND; inactive when EN = low |
| SS/TR (10) | Soft-Start & Tracking | Programs soft-start time (≈1ms default); supports output voltage tracking in multi-rail systems via external resistor divider |
| GND (11) | Analog Ground | Kelvin-sensed ground for control circuitry; must be star-connected to PGND at single point to avoid noise coupling into FB |
| FB (12) | Feedback Input | Resistive divider input referenced to 0.6V; high-impedance node requiring short, shielded trace to minimize noise injection |
Key Features
| Feature | Design Value |
|---|---|
| EMI-optimized gate driver | Reduces high-frequency radiated emissions by suppressing switching-node ringing while maintaining <70ns min on-time and <255ns min off-time |
| Three-mode operation (PFM/USM/PWM) | Enables dynamic selection of efficiency (PFM), acoustic noise suppression (USM >20kHz), or deterministic ripple (PWM) per system requirement |
| Programmable soft-start | Adjustable startup time via SS/TR capacitor prevents inrush current; default 1ms avoids brown-out in cascaded supplies |
| Integrated current-limit and thermal protection | Valley current limit at 10.5A (typ) and thermal shutdown at +160°C with 30°C hysteresis ensure robust fault recovery without external circuitry |
| Precision enable threshold | 1.18V EN threshold allows accurate UVLO adjustment using external resistor divider, supporting custom input voltage sequencing |
Applications
| ASIC Core Supply | FPGA I/O Bank Rail |
|---|---|
Use Scenario: Powering 0.85V–1.2V core logic of Xilinx Artix-7 or Intel Cyclone V SoC under dynamic load steps up to 6A. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering tightly regulated, low-noise core voltage with <10μs transient response. Use Value: COT control and 8A capability eliminate need for parallel converters; 0.6V ±1% reference ensures <±12mV core voltage deviation across temperature. |
Use Scenario: Generating 1.8V or 2.5V I/O supply for FPGA banks handling DDR3/DDR4 memory interfaces with burst currents up to 5A. IC Role / Device Role / Timing Role: High-current point-of-load converter with programmable soft-start to coordinate with core rail sequencing. Use Value: Selectable PWM mode guarantees fixed 800kHz switching for predictable EMI filtering; PG signal validates rail readiness before memory initialization. |
| Smart TV Main SoC Rail | Network Router CPU Supply |
Use Scenario: Delivering 1.1V/1.35V to ARM-based SoCs (e.g., Amlogic S905X3) in 4K smart TVs with standby-to-active transitions. IC Role / Device Role / Timing Role: Always-on buck converter operating in PFM mode at light load (<10mA), switching to PWM during video decode bursts. Use Value: 195μA quiescent current extends standby battery life; ultrasonic mode eliminates audible coil whine during quiet scenes. |
Use Scenario: Providing 1.0V CPU core voltage for Broadcom BCM63168 or Qualcomm IPQ807x in enterprise Wi-Fi 6 routers with 24/7 operation. IC Role / Device Role / Timing Role: Thermally robust DC-DC stage mounted near processor die, leveraging V-QFN2030-12's low θJA for passive cooling. Use Value: 40°C/W thermal resistance enables full 8A load at +85°C ambient; integrated OCP prevents damage during firmware update-induced current surges. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2451DT-LF-Z (Monolithic Power) | 4.5–36V input, 0.8A output, external MOSFETs required - lacks integrated 8A power stage and EMI-optimized driver | Suitable only for sub-1A loads; cannot replace AP62800SJ-7 in FPGA/ASIC core rails without redesign | Select only for lower-current, wider-input applications where board space permits discrete FET layout |
| TPS54821RHLR (Texas Instruments) | 4.5–17V input, 8A output, but uses current-mode control and requires external compensation; no USM mode | Higher design complexity due to loop compensation; lacks ultrasonic mode for noise-sensitive audio/video systems | Prefer when existing TI ecosystem mandates compatibility or when precise current limiting (not valley-based) is required |
Compared with MP2451DT-LF-Z and TPS54821RHLR, the AP62800SJ-7 uniquely combines 8A integration, COT simplicity, ultrasonic operation, and EMI-hardened switching in a 3×2mm package - reducing BOM count by 4+ components and eliminating audible noise in consumer displays.
Availability
AP62800SJ-7 is available at Aetrix Electronics and suitable for FPGA power rails, smart TV SoC supplies, and network router CPU regulators requiring stable component supply, long-term lifecycle support, and AEC-Q200-aligned manufacturing rigor.
Supply support for AP62800SJ-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and protection solutions for industrial, consumer, and computing markets.
The AP62800SJ-7 belongs to Diodes' high-current synchronous buck converter product line, engineered specifically for compact, EMI-constrained point-of-load applications in consumer electronics and embedded systems where thermal density and acoustic noise are critical.
FAQ
What is the minimum recommended output capacitance for AP62800SJ-7 at 5V/8A operation?
The datasheet specifies four 22μF X5R/X7R ceramic capacitors (total 88μF) at the output for 5V/8A operation with 1.2μH inductor and 800kHz switching. This value ensures <20mV peak-to-peak ripple under full load and maintains loop stability with COT control. Lower capacitance increases ripple and may trigger PG fault during transients.
Can AP62800SJ-7 operate with 3.3V input?
No. The absolute minimum input voltage is 4.5V per the Recommended Operating Conditions table. At 3.3V, the device remains in undervoltage lockout (UVLO) because the rising POR threshold is 4.0V and falling UVLO threshold is 3.95V. Operation below 4.5V is not functional or characterized.
How does the MODE pin affect efficiency at light load?
When MODE is grounded (PFM mode), the controller skips pulses under light load, reducing switching losses and achieving >85% efficiency at 10mA output. In PWM mode (MODE = VCC), fixed-frequency operation maintains ripple predictability but drops efficiency to ~65% at same load due to constant gate drive losses.
Is the BST capacitor mandatory, and what happens if it's omitted?
Yes - a 100nF ceramic capacitor between BST and SW is mandatory. Without it, the high-side MOSFET gate cannot be driven above VIN, causing immediate dropout and thermal failure. The BST capacitor supplies charge for the high-side driver bootstrap circuit during each switching cycle; omission results in catastrophic loss of regulation within milliseconds.
AP62800SJ-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 12-VFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 7V
- Current - Output:
- 8A
- Frequency - Switching:
- 400kHz, 800kHz, 1.2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- V-QFN2030-12 (Type A)
AP62800SJ-7 FAQ
1.How can I place an order for AP62800SJ-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP62800SJ-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP62800SJ-7 reliable?
The price and inventory of AP62800SJ-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP62800SJ-7 is usually 5 days.
3.What payment methods are accepted for AP62800SJ-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP62800SJ-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP62800SJ-7?
AP62800SJ-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP62800SJ-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP62800SJ-7?
For technical support, including AP62800SJ-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP62800SJ-7 requirements.
6.How does Aetrix verify that AP62800SJ-7 is sourced from the original manufacturer or authorized distributors?
All AP62800SJ-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP62800SJ-7 meets industry standards.
7.What is the process for return or replacement of AP62800SJ-7?
All AP62800SJ-7 units undergo pre-shipment inspection (PSI). If there is an issue with AP62800SJ-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP62800SJ-7 part is unused and in its original packaging.
Return procedure for AP62800SJ-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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