Diodes Incorporated AP64100QSP-13
- Part No.:
- AP64100QSP-13
- Manufacturer:
- Diodes Incorporated
- Package:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Datasheet:
-
AP64100QSP-13.pdf
- Description:
- IC REG BUCK ADJ 1A 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,999
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AP64100QSP-13 from Diodes Incorporated is an AEC-Q100 Grade 1 automotive synchronous buck converter with integrated 150 mΩ high-side and 80 mΩ low-side MOSFETs, supporting 3.8 V to 40 V input, 0.8 V to VIN adjustable output, 1 A continuous current, and 100 kHz–2.2 MHz programmable switching frequency. It delivers up to 88% efficiency at 5 mA light load and is deployed in automotive instrument clusters for stable 5 V/3.3 V rail generation under wide temperature and EMI-constrained conditions.
For engineers reviewing the AP64100QSP-13 datasheet, AP64100QSP-13 pinout, AP64100QSP-13 application, or AP64100QSP-13 equivalent, this page provides verified technical context on EMI-reduction architecture (ringing-free gate drive + ±6% FSS), precision enable threshold (1.18 V), cycle-by-cycle OCP, thermal shutdown (160 °C), and SO-8EP thermal performance (θJA = 45 °C/W).
Technical Context
The AP64100QSP-13 implements fixed-frequency peak current mode control with internal slope compensation to prevent subharmonic oscillation above 50% duty cycle. Its proprietary multi-level gate driver suppresses SW node ringing without degrading rise/fall times, directly reducing high-frequency radiated EMI.
Frequency Spread Spectrum (±6% jitter) spreads conducted/radiated noise across a wider band, while the RT/CLK pin supports both resistor-based timing (100–2200 kHz) and external clock synchronization (100–2200 kHz) via PLL locking. The 0.8 V ±1% reference and 2 ms soft-start ensure precise output regulation and controlled startup.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 3.8 V to 40 V DC - supports direct battery connection across cold-crank (4.5 V) to load-dump (40 V) transients in automotive systems. |
| Output Current | 1 A continuous - sustains full-rated load at TA = 125 °C with SO-8EP package and proper PCB thermal layout. |
| fSW Range | 100 kHz to 2.2 MHz - enables trade-off between inductor size (higher fSW → smaller L) and light-load efficiency (lower fSW → lower switching loss). |
| RDS(ON) HS/LS | 150 mΩ / 80 mΩ - integrated MOSFETs minimize conduction loss and eliminate external power switch selection effort. |
| IQ (PFM) | 25 µA typical - enables >88% efficiency at 5 mA load, critical for always-on automotive modules like telematics wake-up circuits. |
| VFB Accuracy | 0.792 V to 0.808 V (±1%) - ensures tight output voltage regulation (e.g., ±1% on 5 V = ±50 mV) across -40 °C to +125 °C. |
| Thermal Shutdown | 160 °C with 25 °C hysteresis - protects die during sustained overload or poor heatsinking; resumes operation only after junction cools to 135 °C. |
Pinout & Package
AP64100QSP-13 is housed in an SO-8EP (exposed pad) package with 9 terminals (8 pins + exposed thermal pad). The exposed pad must be soldered to a GND-connected copper plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BST | High-side gate drive bootstrap supply | Requires 100 nF ceramic capacitor to SW to sustain high-side MOSFET turn-on; improper placement causes shoot-through or dropout. |
| VIN | Main power input | Supplies IC bias and power stage; requires ≥2×10 µF low-ESR input capacitance near pin to suppress switching noise and handle load-dump energy. |
| EN | Enable control with UVLO adjustment | Logic-high threshold = 1.18 V; internal 1.5 µA pull-up allows floating startup; external resistor divider enables custom VIN UVLO thresholds. |
| RT/CLK | Frequency programming/synchronization | Connect RT resistor to GND for internal oscillator; apply external clock (100–2200 kHz) for system-level timing alignment and EMI reduction. |
| FB | Output voltage feedback sensing | Compares resistive divider output against 0.8 V reference; sets VOUT = 0.8 × (1 + R1/R2); accuracy directly determines output regulation error. |
| COMP | Loop compensation node | Accepts external RC network to stabilize control loop; improper compensation causes instability or slow transient response. |
| GND | Power ground reference | Primary return path for high-current switching; must be low-impedance and tied to exposed pad for optimal thermal and noise performance. |
| SW | Switching node output | Drives external inductor; high di/dt node requiring minimized trace area and tight coupling to GND to reduce EMI radiation. |
| EXPOSED PAD | Thermal and electrical ground | Electrically connected to GND internally; mandatory solder connection to PCB ground plane for θJA = 45 °C/W and reliable 1 A operation. |
Key Features
| Feature | Design Value |
|---|---|
| Proprietary ringing-free gate driver | Eliminates SW node oscillation without slowing edge rates, reducing high-frequency EMI peaks by >10 dBµV in CISPR 25 Class 5 testing. |
| Frequency Spread Spectrum (FSS) | ±6% switching frequency jitter spreads spectral energy, lowering peak conducted emissions by up to 15 dBµV at fundamental harmonics. |
| Low-dropout (LDO) mode | Enables regulation when VIN approaches VOUT, extending usable input range in battery-depleted conditions (e.g., VIN = 3.9 V → VOUT = 3.3 V). |
| Precision EN threshold (1.18 V) | Allows accurate, resistor-programmable UVLO points (e.g., 6 V rising / 5.5 V falling) without external supervisor ICs. |
| Cycle-by-cycle peak current limit | Triggers at 1.5–3.5 A (typ. 2.2 A) per cycle to protect MOSFETs during short-circuit or overload, with fast recovery upon fault clearance. |
Applications
| Automotive Instrument Clusters | Automotive Infotainment Systems |
|---|---|
|
Use Scenario: Powering digital gauges, TFT displays, and microcontrollers in dashboard assemblies exposed to -40 °C to +105 °C ambient and ISO 7637-2 pulse transients. IC Role / Device Role / Timing Role: Primary 5 V/3.3 V DC-DC regulator delivering clean, EMI-compliant power with fast load transient response (<100 µs recovery from 50 mA → 500 mA step). Use Value: Integrated MOSFETs and FSS eliminate need for external EMI filters, reducing BOM count by 3–5 components versus discrete solutions. |
Use Scenario: Supplying USB-C PD controllers, audio codecs, and touch-screen processors in head units operating under engine cranking (4.5 V) and load dump (40 V) conditions. IC Role / Device Role / Timing Role: High-efficiency buck converter with PFM mode enabling <25 µA quiescent current during standby, meeting OEM "always-on" low-power requirements. Use Value: Adjustable frequency (100 kHz–2.2 MHz) allows optimization for compact 2.2 MHz designs or high-efficiency 400 kHz layouts with larger, lower-cost inductors. |
| Advanced Driver Assistance Systems (ADAS) | Automotive Telematics Control Units (TCUs) |
|
Use Scenario: Generating stable 1.2 V core and 3.3 V I/O rails for radar SoCs and camera ISPs in ADAS ECUs requiring ASIL-B compliance and low EMI. IC Role / Device Role / Timing Role: Synchronous buck with thermal shutdown (160 °C) and OVP (110% of 0.8 V) ensures safe operation during sensor fusion processor thermal throttling events. Use Value: Ringing-free SW node meets CISPR 25 Class 5 radiated emission limits without ferrite beads or shielding cans, cutting mechanical cost. |
Use Scenario: Providing regulated 3.3 V power to LTE modems, GNSS receivers, and CAN FD transceivers in cellular-connected vehicle gateways. IC Role / Device Role / Timing Role: Automotive-grade buck converter with AEC-Q100 Grade 1 qualification and PPAP capability for Tier-1 production traceability. Use Value: External clock sync (RT/CLK) enables synchronization with baseband processor clocks to avoid beat-frequency interference in RF-sensitive modem sections. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ4420AGL-A-Z | Higher 2.5 A rating, 4.5–60 V input, but no FSS or ringing-free gate drive; θJA = 50 °C/W in QFN-10. | Preferred for higher-current ADAS domain controllers; less suitable for strict CISPR 25 Class 5 EMI-limited infotainment modules. | Select MPQ4420AGL-A-Z only if >1 A output and >40 V input margin are required; AP64100QSP-13 offers superior EMI performance at 1 A. |
| TPS54340QDGQRQ1 | 3.5–42 V input, 3.5 A, but uses external MOSFETs; no integrated FSS; 14-pin HTSSOP with higher θJA (60 °C/W). | Suitable for thermally relaxed designs where board space allows discrete FETs and external compensation; lacks AP64100Q's EMI-optimized integration. | Choose TPS54340QDGQRQ1 only when design flexibility (e.g., custom FET selection, adjustable dead time) outweighs BOM simplification and EMI advantages of AP64100QSP-13. |
Compared with MPQ4420AGL-A-Z and TPS54340QDGQRQ1, AP64100QSP-13 delivers best-in-class EMI suppression (FSS + ringing-free gate drive) and smallest solution footprint for 1 A automotive rails, while trading off maximum current and input voltage headroom for tighter thermal and EMC compliance.
Availability
AP64100QSP-13 is available at Aetrix Electronics and suitable for automotive instrument clusters, ADAS ECUs, and telematics control units requiring stable component supply, AEC-Q100 qualification, and long-term production continuity.
Supply support for AP64100QSP-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global semiconductor manufacturer specializing in discrete, analog, and mixed-signal devices for automotive, industrial, and consumer markets, with IATF 16949-certified manufacturing facilities.
The AP64100QSP-13 belongs to Diodes' automotive power management portfolio, designed specifically for EMI-sensitive, high-reliability 12 V/24 V battery-fed systems requiring AEC-Q100 Grade 1 operation and PPAP-ready documentation.
FAQ
What is the minimum input voltage required for AP64100QSP-13 to start switching?
The AP64100QSP-13 has a power-on reset (POR) threshold of 3.5 V (typical) and an undervoltage lockout (UVLO) falling threshold of 3.1 V. It begins switching once VIN rises above 3.5 V and remains enabled until VIN drops below 3.1 V. The EN pin can override this behavior if externally driven.
Can AP64100QSP-13 operate in forced PWM mode at all load levels?
No - AP64100QSP-13 defaults to forced PWM under heavy load but automatically transitions to PFM mode below ~400 mA output current. In PFM, it clamps COMP voltage and disables low-side MOSFET conduction at zero-cross (60 mA), achieving 25 µA IQ and 88% efficiency at 5 mA.
How does the RT/CLK pin function when both resistor timing and external clock are present?
When an external clock signal is applied to RT/CLK, the internal oscillator synchronizes via PLL and follows the external frequency. If the external clock stops, the device automatically reverts to resistor-set frequency within one cycle. No manual mode switching is required.
Is the exposed thermal pad of AP64100QSP-13 electrically isolated?
No - the exposed pad is internally connected to GND and must be soldered to a PCB GND plane. It serves dual roles: primary thermal dissipation path (θJC = 5 °C/W) and low-impedance GND return for high-frequency switching currents. Leaving it unconnected violates thermal and electrical specifications.
AP64100QSP-13 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.8V
- Voltage - Input (Max):
- 40V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 40V
- Current - Output:
- 1A
- Frequency - Switching:
- 500kHz, 100kHz ~ 2.2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO-EP
AP64100QSP-13 FAQ
1.How can I place an order for AP64100QSP-13 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP64100QSP-13 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP64100QSP-13 reliable?
The price and inventory of AP64100QSP-13 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP64100QSP-13 is usually 5 days.
3.What payment methods are accepted for AP64100QSP-13?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP64100QSP-13 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP64100QSP-13?
AP64100QSP-13 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP64100QSP-13 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP64100QSP-13?
For technical support, including AP64100QSP-13 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP64100QSP-13 requirements.
6.How does Aetrix verify that AP64100QSP-13 is sourced from the original manufacturer or authorized distributors?
All AP64100QSP-13 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP64100QSP-13 meets industry standards.
7.What is the process for return or replacement of AP64100QSP-13?
All AP64100QSP-13 units undergo pre-shipment inspection (PSI). If there is an issue with AP64100QSP-13, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP64100QSP-13 part is unused and in its original packaging.
Return procedure for AP64100QSP-13:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AP64100QSP-13 Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

