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Diodes Incorporated AP7179DSKZ20-13
- Part No.:
- AP7179DSKZ20-13
- Manufacturer:
- Diodes Incorporated
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
AP7179DSKZ20-13.pdf
- Description:
- LDO CMOS HICURR W-QFN3535-20 T&R
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
AP7179DSKZ20-13 from Diodes Incorporated is a 3A ultra-low-noise, high-accuracy LDO voltage regulator in W-QFN3535-20 (Type A1) package, delivering ±1% output voltage accuracy over line/load/temperature, 180mV dropout at 3A, and 4.4μVRMS noise at 0.8V output-designed to power noise-sensitive SerDes, ADCs, DACs, and RF components in high-performance digital systems.
For engineers reviewing the AP7179DSKZ20-13 datasheet, AP7179DSKZ20-13 pinout, AP7179DSKZ20-13 application, or AP7179DSKZ20-13 equivalent, this device supports pin-strapped (0.8–3.95V) and resistor-adjustable (0.8–5.0V) outputs, features open-drain power-good indication, remote sensing, programmable soft-start via NR/SS, and stable operation with ≥47μF ceramic output capacitance.
Technical Context
The AP7179DSKZ20-13 integrates a precision 0.8V reference, error amplifier, and matched internal resistor ladder for pin-programmed VOUT selection across six voltage-setting pins (50mV to 1.6V), enabling 50mV-step resolution from 0.8V to 3.95V. Its architecture includes active discharge, undervoltage lockout (1.02–1.085V threshold), and thermal shutdown (160°C trip, 140°C hysteresis).
It employs a low-noise charge-pump-assisted gate driver and achieves 42dB PSRR at 10kHz (0.8V output) and 39dB at 500kHz, with CNR/SS capacitor-based noise filtering and feed-forward capacitor (CFF) support to suppress error-amplifier noise-critical for powering analog and mixed-signal loads requiring clean DC rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3A continuous-supports FPGA core rails and high-current SerDes supplies without derating at TJ ≤ 125°C. |
| Dropout Voltage | 180mV max at 3A-enables regulation from 1.1V input down to 0.8V output, minimizing power loss in low-VIN systems. |
| Output Noise | 4.4μVRMS (10Hz–100kHz, 0.8V out)-meets stringent noise requirements for RF synthesizers and high-resolution ADCs. |
| VOUT Accuracy | ±1% over line, load, and temperature-ensures reliable logic-level compliance for ASIC/FPGA I/O and core domains. |
| PSRR | 39dB at 500kHz (0.8V out)-rejects high-frequency switching noise from upstream DC/DC converters. |
| Input Voltage Range | 1.1V to 6.5V-supports single-cell Li-ion, USB PD, and intermediate bus architectures. |
| Soft-Start Control | NR/SS pin with external capacitor-programmable ramp time prevents inrush current and system brownouts during power-up. |
Pinout & Package
Packaged in W-QFN3535-20 (Type A1) with exposed thermal pad (pins 8, 18, 21), the AP7179DSKZ20-13 uses a 3.5mm × 3.5mm footprint optimized for high-power density and thermal dissipation (θJC = 3.68°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 19, 20 | OUT | High-current LDO output-requires ≥47μF ceramic capacitor placed adjacent to minimize ESR/ESL and ensure stability. |
| 2 | SNS | Remote sense input-connect to OUT only when using pin-strapped VOUT; floating for resistor-adjusted mode. |
| 3 | FB | Feedback node-references 0.8V internal bandgap; sets VOUT = 0.8V × (1 + R1/R2) in adjustable configuration. |
| 4 | PG | Open-drain power-good-asserts high when VOUT ≥ 88.3% of target; requires external pull-up (10–100kΩ). |
| 5–11 | 50mV, 100mV, 200mV, 400mV, 800mV, 1.6V | VOUT programming inputs-grounding combinations select precise output voltages from 0.8V to 3.95V in 50mV steps. |
| 12 | NC | No internal connection-must remain unconnected to avoid parasitic coupling. |
| 13 | NR/SS | Noise reduction & soft-start-capacitor to GND filters reference noise and controls output ramp rate. |
| 14 | EN | Enable control-logic-high (>1.1V) enables regulator; <0.5V disables with ≤25μA shutdown current. |
| 15–17 | IN | Input supply-multiple pins reduce IR drop and improve high-frequency decoupling with local 47μF ceramic cap. |
| 8, 18, 21 | GND | Ground terminals-including exposed thermal pad-must be soldered to large PCB copper area for thermal and electrical integrity. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low noise regulation | 4.4μVRMS at 0.8V output enables direct powering of 16-bit+ ADCs without additional post-regulation filtering. |
| Pin-strapped VOUT selection | Six dedicated voltage-setting pins allow factory-trimmed, zero-resistor output configuration from 0.8V to 3.95V. |
| Programmable soft-start | NR/SS capacitor value directly sets output ramp time-prevents overshoot and enables controlled power sequencing with downstream devices. |
| Active output discharge | Internal pulldown MOSFET discharges VOUT when disabled-reduces hold-up time and supports fast system reset cycles. |
| High PSRR at 500kHz | 39dB rejection at 500kHz suppresses noise from adjacent buck converters operating at typical switching frequencies. |
Applications
| High-Speed SerDes Power | FPGA Core Supply |
|---|---|
Use Scenario: Powering 28Gbps PAM4 SerDes transceivers in optical networking modules where supply ripple induces jitter and BER degradation. IC Role / Device Role / Timing Role: Primary low-noise post-regulator delivering clean 0.85V or 0.95V core rail with <5μVRMS noise floor and fast transient response. Use Value: Maintains <0.2ps RMS jitter contribution under 3A dynamic load steps, preserving signal integrity and link margin. | Use Scenario: Supplying adaptive logic and DSP blocks in Xilinx Versal or Intel Agilex FPGAs requiring tightly regulated, sequenced 0.8–1.2V rails. IC Role / Device Role / Timing Role: Configurable LDO with PG indicator and soft-start for safe core domain power-up aligned with configuration clocks. Use Value: Enables deterministic power-on reset timing and eliminates FPGA configuration failures due to undershoot or slow ramp. |
| RF Transceiver Bias | High-Resolution Data Acquisition |
Use Scenario: Providing bias voltage to GaAs pHEMT drivers and PLL VCOs in 5G mmWave front-end modules sensitive to supply-induced phase noise. IC Role / Device Role / Timing Role: Ultra-low-noise LDO generating 3.3V or 4.5V VCO tuning or PA drain supply with minimal close-in phase noise impact. Use Value: Achieves −165dBc/Hz phase noise at 10kHz offset by suppressing supply-induced VCO modulation. | Use Scenario: Powering 24-bit delta-sigma ADCs (e.g., ADS127L01) in precision test equipment where supply noise directly limits ENOB. IC Role / Device Role / Timing Role: Low-noise, high-accuracy regulator supplying AVDD and REFIN with remote sensing to compensate PCB IR drop. Use Value: Delivers >110dB SNR by limiting integrated noise to <1.5μVRMS across 10Hz–100kHz bandwidth. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO voltage regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6216D332MR-G | 2A output, 150mV dropout at 2A, 15μVRMS noise, fixed 3.3V output only | Lacks pin-strapping, adjustability, PG, and remote sense-suitable only for simple fixed-rail use cases | Select when cost sensitivity outweighs noise performance and flexibility needs; not suitable for SerDes or FPGA core rails. |
| Analog Devices ADM7172ACPZ-R7 | 3A output, 120mV dropout at 3A, 2.9μVRMS noise, 0.9–5.5V adjustable, but requires external resistors only | No pin-strapped mode; larger 10-lead LFCSP package; higher BOM count due to mandatory feedback network | Prefer when lowest possible noise is critical and board space allows for resistor network; lacks SNS pin for remote sensing. |
Compared with XC6216D332MR-G and ADM7172ACPZ-R7, the AP7179DSKZ20-13 uniquely combines pin-strappable VOUT, remote sensing, open-drain PG, and sub-5μVRMS noise in a compact 20-pin QFN-making it optimal for space-constrained, multi-rail systems demanding both flexibility and ultra-clean power.
Availability
AP7179DSKZ20-13 is available at Aetrix Electronics and suitable for high-speed SerDes power, FPGA core supply, RF transceiver bias, and high-resolution data acquisition requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for AP7179DSKZ20-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-performance power management, signal integrity, and protection solutions for industrial, computing, and communications markets.
The AP7179D belongs to Diodes' ultra-low-noise LDO family, engineered specifically for powering noise-critical analog, RF, and high-speed digital loads where traditional regulators fail to meet jitter, ENOB, or phase-noise specifications.
FAQ
What is the minimum input voltage required for AP7179DSKZ20-13 to regulate a 0.8V output?
The AP7179DSKZ20-13 supports VIN as low as 1.1V, enabling regulation of 0.8V output with only 300mV headroom. This is validated per datasheet Section 6.2 (Recommended Operating Conditions), where VIN ≥ VOUT(TARGET) + 0.3V is specified, and confirmed by Figure 12 showing stable operation at VIN = 1.1V, VOUT = 0.8V, IOUT = 3A.
Can the AP7179DSKZ20-13 be used without connecting the SNS pin?
Yes-the SNS pin is only required when using pin-strapped VOUT configuration. When setting output voltage via external resistor divider on FB, SNS must be left floating per Pin Description Table (Section 4.1). Leaving SNS unconnected in adjustable mode avoids erroneous feedback path formation and ensures accurate VOUT regulation.
How does the NR/SS pin affect both noise and startup behavior?
The NR/SS pin connects to an internal reference filter and soft-start circuit. A capacitor to GND (≥10nF) reduces reference voltage noise (lowering output noise floor) and simultaneously controls the rate at which the internal reference ramps up-thereby defining output voltage rise time. Datasheet Section 7.3 confirms dual function: "CNR/SS accomplishes both noise-reduction and the soft-start ramp-time programming."
Is the AP7179DSKZ20-13 qualified for automotive applications?
No-the AP7179DSKZ20-13 is not AEC-Q100 qualified. The datasheet explicitly states in the Features section: "For automotive applications requiring specific change control (i.e., parts qualified to AEC-Q100/101/104/200…), please contact us or your local Diodes representative," indicating this variant is intended for industrial and commercial use only.
AP7179DSKZ20-13 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 6.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 5.5V
- Voltage Dropout (Max):
- 0.18V @ 3A
- Current - Output:
- 3A
- Current - Quiescent (Iq):
- 4 mA
- Current - Supply (Max):
- 5.5 mA
- PSRR:
- 42dB ~ 25dB (10kHz ~ 500kHz)
- Control Features:
- Current Limit, Enable, Power Good, Soft Start
- Protection Features:
- Over Current, Over Temperature, Reverse Current, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- W-QFN3535-20 (Type A1)
AP7179DSKZ20-13 FAQ
1.How can I place an order for AP7179DSKZ20-13 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP7179DSKZ20-13 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP7179DSKZ20-13 reliable?
The price and inventory of AP7179DSKZ20-13 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP7179DSKZ20-13 is usually 5 days.
3.What payment methods are accepted for AP7179DSKZ20-13?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP7179DSKZ20-13 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP7179DSKZ20-13?
AP7179DSKZ20-13 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP7179DSKZ20-13 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP7179DSKZ20-13?
For technical support, including AP7179DSKZ20-13 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP7179DSKZ20-13 requirements.
6.How does Aetrix verify that AP7179DSKZ20-13 is sourced from the original manufacturer or authorized distributors?
All AP7179DSKZ20-13 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP7179DSKZ20-13 meets industry standards.
7.What is the process for return or replacement of AP7179DSKZ20-13?
All AP7179DSKZ20-13 units undergo pre-shipment inspection (PSI). If there is an issue with AP7179DSKZ20-13, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP7179DSKZ20-13 part is unused and in its original packaging.
Return procedure for AP7179DSKZ20-13:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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