Diodes Incorporated AP7342D-1833FS6-7
- Part No.:
- AP7342D-1833FS6-7
- Manufacturer:
- Diodes Incorporated
- Package:
- 6-XFDFN Exposed Pad
- Datasheet:
-
AP7342D-1833FS6-7.pdf
- Description:
- IC REG LIN 1.8V/3.3V X2DFN1212-6
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AP7342D-1833FS6-7 from Diodes Incorporated is a dual-channel, 150mA low-dropout linear regulator with independent enable control per channel, delivering fixed 1.8V and 3.3V outputs in a 1.2mm × 1.2mm X2-DFN1212-6 package. It features ±1% output voltage accuracy over temperature, 75dB PSRR at 1kHz, 60µVrms output noise (10Hz–100kHz), and quiescent current as low as 35µA per active channel - optimized for RF supply rails and portable media subsystems.
For engineers reviewing the AP7342D-1833FS6-7 datasheet, AP7342D-1833FS6-7 pinout, AP7342D-1833FS6-7 application, or AP7342D-1833FS6-7 equivalent, key selection criteria include dual-rail sequencing capability, low-noise performance for analog/RF stages, thermal dissipation limits in ultra-compact layouts, and compatibility with 0.47µF ceramic output capacitors.
Technical Context
The AP7342D-1833FS6-7 integrates two independent CMOS-based LDO regulators sharing a common input (VIN) and ground (GND), each with dedicated enable (EN1/EN2) and output (VOUT1/VOUT2) pins. Its architecture supports asynchronous channel control - enabling 1.8V rail first for core logic while holding 3.3V rail off until peripheral initialization completes.
Each regulator employs a precision voltage reference, error amplifier, and low-RDS(ON) NMOS pass device. The D-suffix variant includes integrated auto-discharge circuitry (50Ω typical) on both outputs, ensuring rapid VOUT decay during shutdown to prevent back-powering or latch-up in multi-rail systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 1.8V (Channel 1) and 3.3V (Channel 2) - fixed, non-adjustable; eliminates external resistor network and reduces BOM count. |
| Max Output Current | 150mA per channel - sufficient for powering baseband processors, camera ISPs, or RF front-end bias circuits without thermal derating in ambient ≤85°C. |
| PSRR | 75dB at 1kHz - suppresses switching noise from adjacent DC/DC converters feeding shared input rails, critical for clean RF supply integrity. |
| Output Noise | 60µVrms (10Hz–100kHz) - enables direct use in low-noise analog signal chains (e.g., ADC reference supplies, audio codecs) without additional filtering. |
| Quiescent Current | 35µA per active channel - extends battery life in always-on sensor nodes or standby modes where one channel remains enabled. |
| Dropout Voltage | 290mV max at 150mA (3.3V channel); 390mV max at 150mA (1.8V channel) - allows operation from single-cell Li-ion (3.0V min) or 3.3V system rails with margin. |
| Enable Thresholds | EN high ≥1.3V, EN low ≤0.5V - compatible with 1.8V and 3.3V GPIOs; no level-shifting required for microcontroller control. |
Pinout & Package
AP7342D-1833FS6-7 is housed in a 6-pin X2-DFN1212-6 package (1.2mm × 1.2mm, 0.4mm height) with an exposed thermal pad. The package supports high-density PCB layouts and requires minimal board area - ideal for space-constrained mobile and wearable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VOUT1 | 1.8V regulated output - connects directly to core logic or I/O power domains requiring stable low-voltage supply. |
| 2 | VOUT2 | 3.3V regulated output - powers peripherals such as USB PHYs, SDIO interfaces, or RF transceivers needing higher voltage rails. |
| 3 | GND | Common ground reference for both regulators - must be connected to low-impedance PCB ground plane to minimize noise coupling. |
| 4 | EN2 | Enable input for Channel 2 (3.3V) - driven high to activate 3.3V rail; floating state prohibited; internal pull-down not present. |
| 5 | VIN | Shared input supply (1.7V–5.25V) - accepts output of upstream DC/DC converter or battery; requires 0.47µF ceramic decoupling capacitor. |
| 6 | EN1 | Enable input for Channel 1 (1.8V) - independently controls 1.8V rail; supports power sequencing without external logic. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable inputs | EN1 and EN2 allow precise sequencing of 1.8V and 3.3V rails - avoids bus contention during boot or mode transitions in SoC-based systems. |
| Integrated auto-discharge | 50Ω discharge path per output ensures VOUT drops to <0.1V within 100µs after EN deactivation - prevents backfeeding into powered-down circuitry. |
| Ultra-low noise output | 60µVrms noise floor enables direct powering of sensitive analog blocks (e.g., PLL VCO supplies, microphone preamps) without added LC filtering. |
| High PSRR at 1kHz | 75dB rejection of ripple from switcher-derived VIN rails maintains clean 3.3V supply for RF front-ends operating near cellular bands. |
| Small-footprint packaging | X2-DFN1212-6 footprint (1.2mm × 1.2mm) reduces PCB area by >50% vs. SOT-23-6 - critical for multi-camera modules and compact IoT sensors. |
Applications
| Smartphone Baseband Power | RF Front-End Bias Supply |
|---|---|
|
Use Scenario: Powering application processor I/O banks and memory interfaces requiring tightly regulated 1.8V alongside 3.3V for connectivity peripherals. IC Role / Device Role / Timing Role: Dual-rail LDO providing sequenced, low-noise, low-dropout regulation with independent enable control for boot-time voltage ramp coordination. Use Value: Eliminates need for discrete sequencing ICs or GPIO-controlled MOSFETs; reduces solution size and component count while meeting ±1% voltage tolerance across -40°C to +85°C. |
Use Scenario: Delivering clean 3.3V bias to LTE/5G power amplifiers and 1.8V to RF transceiver digital control logic. IC Role / Device Role / Timing Role: Low-noise, high-PSRR dual LDO isolating RF supply from noisy digital domains and enabling fast turn-off to meet 3GPP transmit/receive transition timing. Use Value: 75dB PSRR at 1kHz suppresses DC/DC switching noise; 60µVrms noise prevents EVM degradation; auto-discharge meets <100µs RF module shutdown requirements. |
| Portable Camera Module | Wireless Adapter Power |
|
Use Scenario: Supplying image signal processor (ISP) core (1.8V) and MIPI CSI-2 interface (3.3V) in ultra-thin camera modules. IC Role / Device Role / Timing Role: Compact dual LDO with minimal external components (only 0.47µF CIN/COUT per rail) supporting high-density flex PCB layouts. Use Value: X2-DFN1212-6 package fits within 2.0mm × 2.0mm camera module footprints; low quiescent current extends battery runtime during preview mode. |
Use Scenario: Powering Bluetooth/Wi-Fi combo chips requiring separate 1.8V digital core and 3.3V radio/analog supplies in USB dongles or embedded modules. IC Role / Device Role / Timing Role: Dual LDO with independent EN pins enabling host-controlled power gating of radio sections while keeping digital logic active for BLE advertising. Use Value: 35µA quiescent current per active channel minimizes standby drain; 150mA per rail supports burst-mode Wi-Fi transmission without dropout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-rail LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AP7345D-1833FS6-7 | Successor device with identical pinout, same 1.8V/3.3V outputs, but improved PSRR (80dB @ 1kHz) and lower noise (45µVrms). | Designed for new designs requiring enhanced RF immunity and tighter noise margins; supports same PCB layout. | Select when designing new products - Diodes explicitly states AP7342 is not recommended for new designs. |
| TPL7407LPGEDR | TI dual 200mA LDO with 1.8V/3.3V fixed outputs, but no auto-discharge, higher IQ (65µA), and larger DSBGA-12 package (1.6mm × 1.6mm). | Lacks integrated discharge path - requires external FETs for fast VOUT decay; less suitable for RF modules with strict shutdown timing. | Consider only if AP7342D-1833FS6-7 is unavailable and discharge functionality is not required. |
Compared with AP7345D-1833FS6-7, this part offers proven field reliability but lacks PSRR/noise improvements; versus TPL7407LPGEDR, it delivers superior thermal density and built-in discharge - critical for space- and timing-constrained RF applications.
Availability
AP7342D-1833FS6-7 is available at Aetrix Electronics and suitable for smartphone baseband power, RF front-end bias supply, and portable camera module applications requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial and consumer OEM programs.
Supply support for AP7342D-1833FS6-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and protection solutions for consumer, industrial, and automotive markets.
The AP7342 series belongs to Diodes' high-PSRR, low-noise LDO portfolio targeting battery-powered portable electronics - designed specifically to replace legacy single-rail regulators in dual-voltage subsystems while minimizing PCB area and external component count.
FAQ
What are the absolute maximum ratings for AP7342D-1833FS6-7?
The absolute maximum input voltage is 6.0V; EN pin voltage must not exceed 6.0V. Output voltage must stay between -0.3V and VIN + 0.3V. Continuous output current is rated up to 150mA per channel, with peak short-circuit current limited to 55mA. Operating ambient temperature range is -40°C to +85°C, and storage temperature spans -55°C to +125°C. Exceeding these limits risks permanent damage.
Does AP7342D-1833FS6-7 require external capacitors, and what values are recommended?
Yes - a minimum 0.47µF ceramic capacitor is required between VIN and GND for input decoupling, and one 0.47µF ceramic capacitor per output (VOUT1 and VOUT2) is recommended for stability and transient response. These capacitors must be placed as close as possible to their respective pins. Low-ESR ceramics are mandatory; bulk capacitance may be added for large load steps, but the device is optimized for small ceramic values.
How does the auto-discharge feature operate, and when is it active?
The D-suffix indicates integrated auto-discharge circuitry on both outputs. When either EN1 or EN2 is pulled low, the corresponding VOUT pin is actively discharged through a ~50Ω internal NMOS path to GND. Discharge begins immediately upon enable deactivation and brings VOUT below 0.1V within 100µs under typical 1µF load conditions - preventing back-powering of downstream circuitry during power-down sequences.
Can AP7342D-1833FS6-7 be used in automotive applications?
No - AP7342D-1833FS6-7 is not qualified to AEC-Q100 or other automotive standards. While it operates across -40°C to +85°C, it lacks PPAP documentation, IATF 16949 manufacturing certification, and automotive-grade reliability testing. For automotive use, Diodes recommends contacting their automotive sales team for qualified alternatives such as the AP7361Q or AP7362Q series.
AP7342D-1833FS6-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 6-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.25V
- Voltage - Output (Min/Fixed):
- 1.8V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.39V @ 150mA, 0.29V @ 150mA
- Current - Output:
- 150mA, 150mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- -
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- X2-DFN1212-6
AP7342D-1833FS6-7 FAQ
1.How can I place an order for AP7342D-1833FS6-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP7342D-1833FS6-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP7342D-1833FS6-7 reliable?
The price and inventory of AP7342D-1833FS6-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP7342D-1833FS6-7 is usually 5 days.
3.What payment methods are accepted for AP7342D-1833FS6-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP7342D-1833FS6-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP7342D-1833FS6-7?
AP7342D-1833FS6-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP7342D-1833FS6-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP7342D-1833FS6-7?
For technical support, including AP7342D-1833FS6-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP7342D-1833FS6-7 requirements.
6.How does Aetrix verify that AP7342D-1833FS6-7 is sourced from the original manufacturer or authorized distributors?
All AP7342D-1833FS6-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP7342D-1833FS6-7 meets industry standards.
7.What is the process for return or replacement of AP7342D-1833FS6-7?
All AP7342D-1833FS6-7 units undergo pre-shipment inspection (PSI). If there is an issue with AP7342D-1833FS6-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP7342D-1833FS6-7 part is unused and in its original packaging.
Return procedure for AP7342D-1833FS6-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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