Diodes Incorporated AP7344-3318RH4-7
- Part No.:
- AP7344-3318RH4-7
- Manufacturer:
- Diodes Incorporated
- Package:
- 8-XFDFN Exposed Pad
- Datasheet:
-
AP7344-3318RH4-7.pdf
- Description:
- IC REG LIN 1.8V/3.3V X2DFN1612-8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AP7344-3318RH4-7 from Diodes Incorporated is a dual-channel CMOS low-dropout regulator delivering fixed 3.3V and 1.8V outputs, each rated for 300mA continuous current, ±1% output voltage accuracy, 75dB PSRR at 1kHz, and 60µVrms output noise (10Hz–100kHz). It operates from 1.7V to 5.25V input and supports independent enable control per channel, targeting power sequencing in compact portable electronics.
For engineers reviewing the AP7344-3318RH4-7 datasheet, AP7344-3318RH4-7 pinout, AP7344-3318RH4-7 application, or AP7344-3318RH4-7 equivalent, key selection criteria include dual-rail voltage accuracy, low-noise performance for RF/analog supply domains, thermal management in X2-DFN1612-8, and enable-controlled power-down sequencing in space-constrained handheld platforms.
Technical Context
The AP7344 integrates two independent LDO regulators on a single CMOS die, each with dedicated error amplifier, voltage reference, current-limit circuit, and EN pin-enabling asynchronous channel enable/disable without cross-talk. Its architecture supports simultaneous or staggered power-up via separate EN1/EN2 signals.
Each channel features low dropout (as low as 220mV at 300mA for 3.3V output), ultra-low quiescent current (50µA per active channel), and built-in short-circuit protection clamping output current to ~55mA. The device lacks auto-discharge functionality in this RH4 variant (non-D suffix), requiring external discharge paths if rapid VOUT decay is needed.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.3V (Channel 1) and 1.8V (Channel 2), factory-fixed - eliminates external resistor networks and ensures stable rail generation for core/logic and I/O domains. |
| Output Accuracy | ±1% at +25°C, ±1.5% over −40°C to +85°C - enables reliable operation of 1.8V I/O interfaces and 3.3V microcontrollers without margining overhead. |
| PSRR | 75dB at 1kHz - suppresses switching noise from upstream DC-DC converters, critical for powering RF transceivers and analog sensor front-ends. |
| Output Noise | 60µVrms (10Hz–100kHz) - meets low-noise requirements for precision ADC references and high-fidelity audio codec supplies. |
| Dropout Voltage | 220mV max at 300mA for 3.3V output; 480mV max for 1.8V output - allows operation from single-cell Li-ion (3.0V min) while maintaining regulation under full load. |
| Quiescent Current | 50µA per enabled channel (no load) - extends battery life in always-on subsystems like real-time clocks or wake-on-event logic. |
| Enable Thresholds | EN high ≥1.3V, EN low ≤0.5V - compatible with 1.8V and 3.3V GPIOs without level-shifting, simplifying host MCU interface. |
Pinout & Package
X2-DFN1612-8 package: 1.6mm × 1.2mm, 0.4mm pitch, thermally enhanced with exposed pad (not electrically connected to GND by default; recommended to tie to PCB ground plane for thermal dissipation).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 4) | Power ground reference | Dual ground pins reduce impedance and improve PSRR; must connect to low-impedance PCB ground plane for optimal noise rejection and thermal performance. |
| VOUT1 (Pin 2) | Channel 1 regulated output | Delivers fixed 3.3V; requires local 1.0µF ceramic capacitor placed adjacent to pin for stability and transient response. |
| VOUT2 (Pin 3) | Channel 2 regulated output | Delivers fixed 1.8V; independent from VOUT1 - supports split-rail sequencing and isolated domain power control. |
| EN2 (Pin 5) | Channel 2 enable input | Active-high logic; floating state prohibited - must be tied to VIN2 or GND to avoid undefined regulator state during power-up. |
| VIN2 (Pin 6) | Channel 2 input supply | Accepts 1.7V–5.25V; may be shared with VIN1 or independently sourced for fault isolation between rails. |
| VIN1 (Pin 7) | Channel 1 input supply | Independent input path enables different source domains (e.g., battery vs. USB) or discrete filtering per rail. |
| EN1 (Pin 8) | Channel 1 enable input | Active-high logic; decouples startup timing from Channel 2 - essential for controlled power sequencing in SoC-based systems. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent LDOs | Two fully isolated regulators sharing only GND and package - enables asymmetric voltage sequencing (e.g., 1.8V before 3.3V) without external logic. |
| High PSRR (75dB @ 1kHz) | Rejects ripple from noisy switchers (e.g., buck converters powering baseband ICs), preserving signal integrity in RF front-end bias rails. |
| Low output noise (60µVrms) | Meets stringent noise floor requirements for 16-bit+ SAR ADC references and PLL VCO supply domains without additional filtering. |
| Ultra-low quiescent current (50µA/channel) | Minimizes standby power in battery-backed subsystems such as secure elements or sensor hubs operating in deep-sleep mode. |
| Wide input range (1.7V–5.25V) | Supports direct connection to single-cell Li-ion (2.7–4.2V), USB 5V, or boosted 3.3V rails - reduces need for intermediate pre-regulation stages. |
Applications
| Smartphone Baseband Power | RF Transceiver Bias |
|---|---|
|
Use Scenario: Supplying 3.3V I/O and 1.8V core voltage to application processors and cellular modems in smartphones. IC Role / Device Role / Timing Role: Dual-rail LDO providing sequenced, low-noise, and PSRR-optimized power to SoC domains with independent enable control. Use Value: Eliminates need for two discrete LDOs and associated passives, reducing BOM count and PCB area while ensuring rail stability during burst-mode LTE/WCDMA transmission. |
Use Scenario: Delivering clean 1.8V bias to RF power amplifiers and 3.3V to LNA/switch control logic in 4G/5G front-end modules. IC Role / Device Role / Timing Role: Low-noise dual-output regulator isolating sensitive RF analog supply from digital switching noise. Use Value: 60µVrms noise and 75dB PSRR directly improve EVM and ACLR performance, enabling compliance with 3GPP RF conformance tests without added ferrite beads or LC filters. |
| Camera Module Core Logic | Portable Media Player Audio Codec |
|
Use Scenario: Powering image signal processor (ISP) core (1.8V) and MIPI interface I/O (3.3V) in smartphone camera modules. IC Role / Device Role / Timing Role: Compact dual-LDO managing rail sequencing and noise isolation between high-speed digital interface and analog pixel processing blocks. Use Value: X2-DFN1612-8 footprint fits within tight camera flex PCB constraints; independent EN pins allow ISP core to power up before MIPI PHY initialization. |
Use Scenario: Supplying 1.8V to DAC/ADC cores and 3.3V to headphone amplifier stages in portable media players. IC Role / Device Role / Timing Role: Dual-output LDO delivering low-noise, low-quiescent-current power to mixed-signal audio subsystems. Use Value: 50µA quiescent current per channel extends playback time in sleep mode; 60µVrms noise prevents audible hiss in high-gain headphone outputs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AP7345D-3318RH4-7 | Successor with integrated auto-discharge (D suffix); identical pinout, same 3.3V/1.8V outputs and specs, but adds 50Ω discharge FET per channel. | Required where fast VOUT ramp-down is needed (e.g., hot-plug detection, safety shutdown), not supported by AP7344-3318RH4-7. | Select AP7345D if discharge functionality is mandatory; otherwise AP7344 remains viable for static-rail applications. |
| Torex XC6210B3318MR-G | Same dual 3.3V/1.8V outputs, 300mA rating, ±2% accuracy (vs. ±1%), 65dB PSRR (vs. 75dB), 40µVrms noise (vs. 60µVrms), SOT-26 package (larger than X2-DFN1612-8). | Suitable for cost-sensitive designs where 1mm² footprint is less critical and slightly relaxed accuracy/PSRR is acceptable. | Choose XC6210B when board area is not constrained and lower PSRR does not impact system-level noise targets. |
Compared with AP7344-3318RH4-7, the AP7345D offers identical performance plus discharge capability in the same package, while the XC6210B trades 1% accuracy and 10dB PSRR for broader availability and lower unit cost - making AP7344 optimal for noise-critical, space-constrained designs where discharge is unnecessary.
Availability
AP7344-3318RH4-7 is available at Aetrix Electronics and suitable for smartphone baseband power, RF transceiver bias, and camera module core logic requiring stable component supply, long-term manufacturability, and RoHS-compliant packaging.
Supply support for AP7344-3318RH4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in power management, signal integrity, and connectivity solutions for consumer, industrial, and automotive markets.
The AP7344 belongs to Diodes' high-PSRR dual-LDO product line, designed specifically for noise-sensitive portable electronics requiring compact, accurate, and independently controllable dual-rail regulation.
FAQ
Is AP7344-3318RH4-7 pin-compatible with AP7345D-3318RH4-7?
Yes - both use the identical X2-DFN1612-8 package and share identical pin numbering and function mapping. The AP7345D adds internal discharge FETs but does not alter pin behavior, enabling drop-in replacement where discharge functionality is not actively used.
What is the maximum allowable input voltage for AP7344-3318RH4-7?
The absolute maximum input voltage is 6.0V, but the recommended operating range is 1.7V to 5.25V. Exceeding 5.25V risks violating safe operating area limits and may trigger thermal shutdown or permanent damage, even briefly.
Can EN1 and EN2 be tied together and driven by a single GPIO?
Yes - EN1 and EN2 accept standard CMOS logic levels (VIH ≥1.3V, VIL ≤0.5V) and draw <1.0µA leakage. Tying them simplifies control but eliminates independent sequencing; ensure the driving GPIO can source/sink sufficient current for both inputs simultaneously.
Does AP7344-3318RH4-7 require external capacitors, and what values are recommended?
Yes - each channel requires a minimum 1.0µF ceramic capacitor on both input (CIN) and output (COUT), placed as close as possible to respective VIN/VOUT/GND pins. For improved transient response under large load steps, add low-ESR bulk capacitance in parallel with COUT.
AP7344-3318RH4-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 8-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.25V
- Voltage - Output (Min/Fixed):
- 1.8V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.39V @ 300mA, 0.29V @ 300mA
- Current - Output:
- 300mA, 300mA
- Current - Quiescent (Iq):
- 140 µA
- Current - Supply (Max):
- -
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- X2-DFN1612-8
AP7344-3318RH4-7 FAQ
1.How can I place an order for AP7344-3318RH4-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP7344-3318RH4-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP7344-3318RH4-7 reliable?
The price and inventory of AP7344-3318RH4-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP7344-3318RH4-7 is usually 5 days.
3.What payment methods are accepted for AP7344-3318RH4-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP7344-3318RH4-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP7344-3318RH4-7?
AP7344-3318RH4-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP7344-3318RH4-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP7344-3318RH4-7?
For technical support, including AP7344-3318RH4-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP7344-3318RH4-7 requirements.
6.How does Aetrix verify that AP7344-3318RH4-7 is sourced from the original manufacturer or authorized distributors?
All AP7344-3318RH4-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP7344-3318RH4-7 meets industry standards.
7.What is the process for return or replacement of AP7344-3318RH4-7?
All AP7344-3318RH4-7 units undergo pre-shipment inspection (PSI). If there is an issue with AP7344-3318RH4-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP7344-3318RH4-7 part is unused and in its original packaging.
Return procedure for AP7344-3318RH4-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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