Diodes Incorporated AP7344D-3612RH4-7
- Part No.:
- AP7344D-3612RH4-7
- Manufacturer:
- Diodes Incorporated
- Package:
- 8-XFDFN Exposed Pad
- Datasheet:
-
AP7344D-3612RH4-7.pdf
- Description:
- IC REG LIN 1.2V/3.6V X2DFN1612-8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AP7344D-3612RH4-7 from Diodes Incorporated is a dual-channel CMOS low-dropout regulator delivering fixed 3.6V and 1.2V outputs with ±1% accuracy, 300mA per channel, 75dB PSRR at 1kHz, and 60µVrms output noise (10Hz–100kHz). It operates from 1.7V to 5.25V input and supports independent enable control for each channel-ideal for powering core logic and I/O rails in space-constrained portable electronics.
For engineers reviewing the AP7344D-3612RH4-7 datasheet, AP7344D-3612RH4-7 pinout, AP7344D-3612RH4-7 application, or AP7344D-3612RH4-7 equivalent, key selection criteria include dual-rail voltage accuracy, low-noise performance for RF/analog sections, thermal management via X2-DFN1612-8 thermal pad, and independent enable sequencing for power domain control.
Technical Context
The AP7344D-3612RH4-7 integrates two independent LDO regulators on a single CMOS die, each with dedicated error amplifier, voltage reference, current-limit circuit, and enable input. Channel 1 delivers 3.6V with dropout as low as 0.22V at 300mA; Channel 2 delivers 1.2V with dropout as low as 0.48V at 300mA. Both channels feature auto-discharge functionality when disabled.
It employs a non-inverting architecture with internal resistor networks for fixed-output versions, enabling stable operation with 1.0µF ceramic output capacitors. The device supports simultaneous or staggered enable control, with EN1/EN2 thresholds of 0–0.5V (low) and 1.3–5.25V (high), and draws only 0.1–1.0µA in shutdown mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.6V (CH1) and 1.2V (CH2), fixed via internal resistor network-eliminates external feedback components and ensures rail-specific compliance for SoC core/I/O domains. |
| Output Accuracy | ±1% at +25°C, ±1.5% over −40°C to +85°C-enables reliable operation of voltage-sensitive processors and memory without margining overhead. |
| PSRR | 75dB at 1kHz-suppresses switching noise from upstream DC/DC converters, critical for clean power to RF transceivers and ADCs. |
| Output Noise | 60µVrms (10Hz–100kHz)-minimizes phase jitter in clock paths and preserves SNR in audio/RF signal chains. |
| Quiescent Current | 100–140µA (both channels enabled, no load)-extends battery life in always-on subsystems like sensor hubs or real-time clocks. |
| Dropout Voltage | 0.22V (CH1 @ 300mA), 0.48V (CH2 @ 300mA)-allows operation from single-cell Li-ion (3.0–4.2V) while maintaining regulation across both rails. |
| Enable Thresholds | EN high = 1.3–5.25V, EN low = 0–0.5V-compatible with 1.8V/3.3V GPIOs and enables flexible power sequencing without level shifters. |
Pinout & Package
The AP7344D-3612RH4-7 is housed in an X2-DFN1612-8 package (1.6mm × 1.2mm, 0.4mm height) with exposed thermal pad for enhanced heat dissipation. PCB layout requires connection of the thermal pad to GND plane for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 4) | Common ground reference | Provides return path for both regulators; pins must be connected to low-impedance ground plane to minimize noise coupling and ensure stability. |
| VOUT1 (Pin 2) | Channel 1 regulated output | Delivers fixed 3.6V; requires local 1.0µF ceramic capacitor placed adjacent to pin for transient response and stability. |
| VOUT2 (Pin 3) | Channel 2 regulated output | Delivers fixed 1.2V; shares same capacitor requirements as VOUT1 but must be decoupled independently to prevent cross-rail interference. |
| EN2 (Pin 5) | Channel 2 enable input | Active-high control: drives high ≥1.3V to enable 1.2V rail; must not float-tie to VIN2 or GND if unused. |
| VIN2 (Pin 6) | Channel 2 input supply | Accepts 1.7–5.25V; requires 0.47µF ceramic input capacitor near pin to suppress supply glitches during load transients. |
| VIN1 (Pin 7) | Channel 1 input supply | Accepts 1.7–5.25V; electrically isolated from VIN2-supports independent input sources or shared rail with appropriate decoupling. |
| EN1 (Pin 8) | Channel 1 enable input | Active-high control: drives high ≥1.3V to enable 3.6V rail; supports independent sequencing relative to CH2 for safe power-up/down. |
| Thermal Pad | Thermal dissipation node | Not electrically connected; must be soldered to large copper area tied to GND for thermal relief-critical for >200mA continuous operation. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent LDOs | Enables discrete power domain control-e.g., 3.6V for display interface and 1.2V for processor core-with no shared regulation dependency. |
| Auto-discharge function | Internally discharges VOUT1/VOUT2 when respective EN pin is pulled low-prevents floating voltages and ensures fast, controlled rail collapse during sleep mode. |
| Ultra-low noise (60µVrms) | Meets stringent noise requirements for RF front-ends and high-resolution analog sensors without requiring additional filtering stages. |
| High PSRR (75dB @ 1kHz) | Maintains output stability against ripple from noisy switchers-essential for co-located PMIC + LDO architectures in compact mobile designs. |
| Low quiescent current (100µA) | Reduces standby power loss by >50% vs. legacy dual-LDOs-directly extends battery runtime in IoT edge nodes with frequent wake/sleep cycles. |
Applications
| Smartphone Core/I/O Power | RF Transceiver Bias Supply |
|---|---|
|
Use Scenario: Dual-rail power delivery to application processor (1.2V core) and display interface (3.6V I/O) in slim smartphone PCBs. IC Role / Device Role / Timing Role: Primary voltage regulation IC providing tightly regulated, low-noise, sequenced supplies to SoC domains. Use Value: Eliminates need for two discrete LDOs-reducing BOM count, board area, and layout complexity while ensuring ±1% rail accuracy under dynamic load. |
Use Scenario: Clean bias supply for LTE/Wi-Fi RF front-end modules requiring minimal phase noise contribution. IC Role / Device Role / Timing Role: Low-noise LDO channel (1.2V) powering RF synthesizer VCO and PA bias circuits. Use Value: 60µVrms noise and 75dB PSRR suppress switching artifacts from baseband PMIC, preserving EVM and receiver sensitivity. |
| Multi-Camera Sensor Hub | Portable Media Player Audio Rail |
|
Use Scenario: Simultaneous power to image signal processors (3.6V) and CIS analog front-ends (1.2V) in triple-camera array modules. IC Role / Device Role / Timing Role: Dual-output regulator managing independent startup/shutdown of camera subsystems via EN1/EN2 control. Use Value: Independent enable pins allow staggered initialization-preventing inrush current peaks and avoiding brownout during multi-sensor boot. |
Use Scenario: Dedicated low-noise supply for DAC and headphone amplifier in battery-powered media players. IC Role / Device Role / Timing Role: 3.6V LDO channel powering Class AB amplifier stage; 1.2V channel powering digital audio controller. Use Value: Ultra-low 60µVrms noise prevents audible hiss; 0.22V dropout enables full 3.6V output from depleted 3.4V Li-ion cells. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AP7345D-3612RH4-7 | Successor part with identical pinout, same 3.6V/1.2V outputs, improved PSRR (80dB @ 1kHz), and lower dropout (0.20V CH1). | Recommended for new designs; supports higher ambient temperature derating and tighter load regulation (±10mV vs. ±30mV). | Select AP7345D for production ramp-offers extended lifecycle, enhanced specs, and full drop-in compatibility. |
| TPL7407LDR | Single-channel 3.6V LDO (300mA), no 1.2V rail; lacks independent enable and auto-discharge; PSRR = 65dB @ 1kHz. | Requires second regulator for 1.2V rail-increasing footprint, cost, and design complexity versus integrated dual solution. | Only viable if 1.2V rail is sourced elsewhere; not suitable for space-constrained dual-rail systems. |
Compared with AP7344D-3612RH4-7, the AP7345D offers measurable improvements in PSRR and thermal robustness without layout changes, while TPL7407LDR forces a two-component solution that increases PCB area and compromises sequencing control-making the AP7344D optimal for legacy designs where pinout lock-in is required.
Availability
AP7344D-3612RH4-7 is available at Aetrix Electronics and suitable for smartphone power management, RF module biasing, and multi-camera sensor hub applications requiring stable component supply and long-term industrial availability.
Supply support for AP7344D-3612RH4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and protection solutions for consumer, industrial, and automotive markets.
The AP7344 series belongs to Diodes' precision dual-LDO product line, engineered specifically for space-constrained portable electronics requiring independent, low-noise, sequenced voltage rails with minimal external components.
FAQ
What is the maximum output current per channel for AP7344D-3612RH4-7?
The AP7344D-3612RH4-7 delivers up to 300mA per channel continuously, verified across −40°C to +85°C ambient. Absolute maximum rating is 400mA, but sustained operation above 300mA requires careful thermal design due to 600mW power dissipation limit and package thermal resistance constraints.
Does AP7344D-3612RH4-7 support independent power sequencing between its two outputs?
Yes-EN1 controls Channel 1 (3.6V) and EN2 controls Channel 2 (1.2V) independently. Each enable pin accepts standard logic-level inputs (0–0.5V low, 1.3–5.25V high), allowing precise timing control for safe power-up/down sequences without external logic.
Is the thermal pad on AP7344D-3612RH4-7 electrically connected or isolated?
The thermal pad is electrically isolated-it has no internal connection to any pin. It must be soldered to a PCB copper area tied to GND for thermal conduction, but cannot serve as a functional ground electrode. Layout guidelines specify minimum 1.0mm² copper area for effective heat dissipation.
Can AP7344D-3612RH4-7 operate with ceramic output capacitors smaller than 1.0µF?
No-the datasheet specifies 1.0µF ceramic capacitors as the minimum for stable operation and adequate transient response. Using smaller values risks instability, overshoot, or oscillation, particularly under 100mA+ load steps, as confirmed by ESR vs. output current stability analysis in the datasheet.
AP7344D-3612RH4-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 8-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.25V
- Voltage - Output (Min/Fixed):
- 1.2V, 3.6V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.5V @ 300mA, 0.29V @ 300mA
- Current - Output:
- 300mA, 300mA
- Current - Quiescent (Iq):
- 140 µA
- Current - Supply (Max):
- -
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- X2-DFN1612-8
AP7344D-3612RH4-7 FAQ
1.How can I place an order for AP7344D-3612RH4-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP7344D-3612RH4-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP7344D-3612RH4-7 reliable?
The price and inventory of AP7344D-3612RH4-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP7344D-3612RH4-7 is usually 5 days.
3.What payment methods are accepted for AP7344D-3612RH4-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP7344D-3612RH4-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP7344D-3612RH4-7?
AP7344D-3612RH4-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP7344D-3612RH4-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP7344D-3612RH4-7?
For technical support, including AP7344D-3612RH4-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP7344D-3612RH4-7 requirements.
6.How does Aetrix verify that AP7344D-3612RH4-7 is sourced from the original manufacturer or authorized distributors?
All AP7344D-3612RH4-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP7344D-3612RH4-7 meets industry standards.
7.What is the process for return or replacement of AP7344D-3612RH4-7?
All AP7344D-3612RH4-7 units undergo pre-shipment inspection (PSI). If there is an issue with AP7344D-3612RH4-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP7344D-3612RH4-7 part is unused and in its original packaging.
Return procedure for AP7344D-3612RH4-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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