Diodes Incorporated AP7346D-3330FS6-7
- Part No.:
- AP7346D-3330FS6-7
- Manufacturer:
- Diodes Incorporated
- Package:
- 6-XFDFN Exposed Pad
- Datasheet:
-
AP7346D-3330FS6-7.pdf
- Description:
- IC REG LIN 3V/3.3V X2DFN1212-6
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AP7346D-3330FS6-7 from Diodes Incorporated is a dual-channel, high-accuracy current-limiting LDO regulator in X2-DFN1212-6 package, delivering fixed 3.3V and 3.0V outputs with ±1% accuracy, 75dB PSRR at 1kHz, and 60µVrms output noise (10Hz–100kHz). It features independent enable pins (EN1/EN2), low 35µA quiescent current per active channel, and integrated auto-discharge functionality-designed for RF supply rails and multi-rail portable media subsystems.
For engineers reviewing the AP7346D-3330FS6-7 datasheet, AP7346D-3330FS6-7 pinout, AP7346D-3330FS6-7 application, or AP7346D-3330FS6-7 equivalent, key selection criteria include dual-output voltage matching, channel-independent enable control, thermal performance in 1.2mm × 1.2mm DFN, current-limit accuracy (157mA ±25mA), and discharge-enabled fast turn-off behavior in battery-sensitive designs.
Technical Context
The AP7346D-3330FS6-7 integrates two independent CMOS-based LDO regulators sharing a single VIN input but with separate EN1/EN2 controls and VOUT1/VOUT2 outputs. Each channel employs a precision voltage reference, error amplifier, and fold-back current-limit circuit with 132–182mA OCP threshold and 55mA short-circuit clamp.
Its architecture supports simultaneous or staggered power sequencing via discrete enable logic, delivers <0.30V dropout at 120mA for 3.0V output, and maintains stability with ≥0.47µF ceramic output capacitors-enabling compact, low-noise biasing of RF transceivers and image sensors without external compensation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.3V (Channel 1) and 3.0V (Channel 2), fixed by internal resistor network-eliminates external feedback components and ensures rail-to-rail compatibility with 3.3V/3.0V logic and analog subsystems. |
| Output Accuracy | ±1% at +25°C; ±1.5% over −40°C to +85°C-meets tight tolerance requirements for ADC references and RF PLL VCO biasing. |
| PSRR | 75dB at 1kHz-suppresses switching noise from adjacent DC-DC converters feeding shared PCB power planes. |
| Output Noise | 60µVrms (10Hz–100kHz)-minimizes phase noise degradation in RF front-end LNA and mixer bias supplies. |
| Quiescent Current | 35µA per active channel (EN high, no load)-extends battery life in always-on sensor or fingerprint modules. |
| Current Limit | 157mA ±25mA per channel-provides predictable fault containment during hot-plug or transient overload without latch-up. |
| Dropout Voltage | 0.22V (max) at 120mA for 3.3V output-enables operation from single-cell Li-ion (3.0V min) with >100mV headroom. |
Pinout & Package
X2-DFN1212-6 package: 1.2mm × 1.2mm body, 0.4mm pitch, 6-pin exposed-pad layout optimized for thermal dissipation and space-constrained mobile PCBs. Thermal pad must be connected to GND plane for optimal junction temperature control.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VOUT1 | Channel 1 regulated output | Delivers stable 3.3V; requires local 0.47µF ceramic capacitor to GND for transient response and stability. |
| 2 VOUT2 | Channel 2 regulated output | Delivers stable 3.0V; independently decoupled-supports asynchronous power sequencing with VOUT1. |
| 3 GND | Analog/digital ground reference | Common return path for both regulators; must connect directly to low-impedance PCB ground plane. |
| 4 EN2 | Channel 2 enable input | Logic-high (>1.3V) enables VOUT2; floating or undriven states cause undefined operation-must be tied high/low. |
| 5 VIN | Input power supply | Accepts 1.7V–5.25V; requires 0.47µF ceramic capacitor to GND within 2mm of pin to suppress supply glitches. |
| 6 EN1 | Channel 1 enable input | Logic-high (>1.3V) enables VOUT1; supports independent on/off control for power domain isolation. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable inputs | EN1 and EN2 allow per-channel power gating-enables dynamic rail shutdown in camera ISP or modem sleep modes without affecting companion rail. |
| Integrated auto-discharge | On-chip 50Ω N-channel discharge path per output rapidly collapses VOUT when disabled-prevents residual voltage hold-up in battery-backed systems. |
| Low-noise, high-PSRR regulation | 60µVrms noise + 75dB PSRR at 1kHz-preserves signal integrity in RF receiver chains and high-resolution audio codecs. |
| Wide input range with low dropout | 1.7V–5.25V input, <0.29V dropout at 3.3V/120mA-supports direct connection to buck converter outputs or single-cell batteries. |
| High-accuracy current limiting | 157mA ±25mA per channel-enables precise current budgeting in multi-sensor modules where thermal margin is constrained. |
Applications
| Fingerprint Sensor Module | RF Transceiver Bias Rail |
|---|---|
Use Scenario: Powering capacitive fingerprint sensor ASIC and analog front-end in smartphones and access control devices. IC Role / Device Role / Timing Role: Dual-rail LDO supplying 3.3V for digital interface and 3.0V for analog sensing circuitry with independent enable sequencing. Use Value: ±1% output accuracy ensures consistent sensor gain calibration; low 60µVrms noise prevents false touch detection from supply-induced baseline drift. |
Use Scenario: Providing clean, isolated bias to PA driver stages and LNA blocks in 2.4GHz/5GHz Wi-Fi/BT modules. IC Role / Device Role / Timing Role: Low-noise dual LDO delivering 3.3V (PA bias) and 3.0V (LNA bias) with fast enable/disable for TDD mode transitions. Use Value: 75dB PSRR rejects switching noise from nearby DC-DC converters; auto-discharge eliminates residual voltage that could disrupt RF state machines during sleep/wake cycles. |
| Camera Image Signal Processor | Portable Media Player Audio Codec |
Use Scenario: Supplying core logic (3.3V) and analog pixel processing (3.0V) rails in multi-megapixel smartphone camera modules. IC Role / Device Role / Timing Role: Dual-output LDO with independent EN pins enabling staggered power-up of ISP digital core before analog front-end activation. Use Value: <0.29V dropout allows operation from shared 3.6V battery rail; 35µA quiescent current minimizes standby drain during preview mode. |
Use Scenario: Powering DAC, headphone amplifier, and digital audio controller in Bluetooth headphones and portable speakers. IC Role / Device Role / Timing Role: Dual LDO generating 3.3V for digital audio interface and 3.0V for analog output stage with low-noise regulation. Use Value: 60µVrms output noise prevents audible hiss in high-gain headphone amplifiers; ±1% accuracy maintains consistent DAC reference scaling across volume levels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AP7345D-3330FS6-7 | Successor device with identical pinout, same 3.3V/3.0V outputs, improved load regulation (±15mV vs. ±30mV), and lower 25µA quiescent current. | Recommended for new designs requiring tighter load regulation and longer battery life; pin-compatible drop-in replacement. | Select AP7345D if designing for production beyond Q3 2024-Diodes explicitly states AP7346 is not recommended for new designs. |
| TPL7407LDR | TI dual LDO with 3.3V/3.0V outputs, but higher 65µA quiescent current, no auto-discharge, and 8-pin SOIC package (vs. 6-pin DFN). | Suitable for prototyping or legacy through-hole layouts; lacks compact footprint and fast discharge needed for modern mobile form factors. | Choose only if board redesign is impractical and thermal/noise specs are less critical than mechanical compatibility. |
Compared with AP7346D-3330FS6-7, the AP7345D offers measurable improvements in quiescent current and load regulation while maintaining full pin and functional compatibility-making it the preferred choice for new designs. The TPL7407LDR trades size and discharge capability for broader availability and simpler layout, but sacrifices key mobile-optimized features.
Availability
AP7346D-3330FS6-7 is available at Aetrix Electronics and suitable for fingerprint sensor modules, RF transceiver biasing, and camera ISP power management requiring stable component supply, long-term lifecycle support, and traceable sourcing for consumer electronics OEMs.
Supply support for AP7346D-3330FS6-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and mixed-signal ICs for power management, signal integrity, and connectivity applications.
The AP7346 belongs to Diodes' high-accuracy, low-noise LDO family designed specifically for space-constrained, battery-powered mobile devices requiring dual-rail, independently controllable regulation with minimal EMI impact.
FAQ
What is the thermal pad connection requirement for AP7346D-3330FS6-7?
The exposed thermal pad on the X2-DFN1212-6 package must be soldered to a dedicated GND copper pour on the PCB. Diodes recommends connecting it to the system ground plane-not as a standalone GND electrode-to maximize heat dissipation. Leaving it unconnected reduces thermal performance by up to 40%, risking thermal shutdown under 120mA continuous load.
Can EN1 and EN2 be tied together for synchronous enable/disable?
Yes, EN1 and EN2 may be connected to a common control signal, but doing so eliminates independent channel sequencing. When tied, both outputs turn on/off simultaneously-acceptable for simple dual-rail loads but incompatible with applications requiring staggered startup (e.g., camera module power sequencing where digital core powers before analog front-end).
Is AP7346D-3330FS6-7 qualified for automotive use?
No. The AP7346D-3330FS6-7 is not AEC-Q100 qualified. Diodes explicitly states that automotive-grade versions require specific change control, PPAP capability, and IATF 16949 manufacturing-none of which apply to this part. It is rated for −40°C to +85°C industrial operation only.
What output capacitor value is required for stability?
A minimum 0.47µF X5R/X7R ceramic capacitor is required per output, placed within 2mm of VOUT and GND pins. Larger values (e.g., 1.0µF) improve transient response but do not affect stability. Bulk electrolytic capacitors are unnecessary unless load steps exceed 100mA/µs-verified in Diodes' load transient waveforms on page 8 of DS38082 Rev. 2-3.
AP7346D-3330FS6-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 6-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.25V
- Voltage - Output (Min/Fixed):
- 3V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.29V @ 120mA, 0.29V @ 120mA
- Current - Output:
- 130mA, 130mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- -
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- X2-DFN1212-6
AP7346D-3330FS6-7 FAQ
1.How can I place an order for AP7346D-3330FS6-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AP7346D-3330FS6-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP7346D-3330FS6-7 reliable?
The price and inventory of AP7346D-3330FS6-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP7346D-3330FS6-7 is usually 5 days.
3.What payment methods are accepted for AP7346D-3330FS6-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP7346D-3330FS6-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP7346D-3330FS6-7?
AP7346D-3330FS6-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP7346D-3330FS6-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP7346D-3330FS6-7?
For technical support, including AP7346D-3330FS6-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP7346D-3330FS6-7 requirements.
6.How does Aetrix verify that AP7346D-3330FS6-7 is sourced from the original manufacturer or authorized distributors?
All AP7346D-3330FS6-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP7346D-3330FS6-7 meets industry standards.
7.What is the process for return or replacement of AP7346D-3330FS6-7?
All AP7346D-3330FS6-7 units undergo pre-shipment inspection (PSI). If there is an issue with AP7346D-3330FS6-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP7346D-3330FS6-7 part is unused and in its original packaging.
Return procedure for AP7346D-3330FS6-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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