Diodes Incorporated AP7361-15ER-13

Overview

AP7361-15ER-13 from Diodes Incorporated is a 1A fixed-output (1.5V) ultra-low dropout linear regulator in SOT223R package, featuring 70µA typical quiescent current, 500mV dropout at 1A load, and integrated enable control, thermal shutdown, and current limiting-designed for FPGA I/O power, laptop subsystems, and battery-powered audio devices.

For engineers reviewing the AP7361-15ER-13 datasheet, AP7361-15ER-13 pinout, AP7361-15ER-13 application, or AP7361-15ER-13 equivalent, key selection criteria include dropout voltage at full load, EN logic thresholds, thermal resistance (θ_JA = 110°C/W), output accuracy (±2% over temperature), and ceramic capacitor stability with ≥2.2µF.

Technical Context

The AP7361-15ER-13 implements a PMOS pass transistor architecture enabling ultra-low dropout operation, with internal 0.8V bandgap reference and error amplifier driving the gate to regulate output. Its EN pin accepts 1.0V–V_IN logic-high threshold and supports active-high sequencing in multi-rail systems.

Thermal shutdown triggers at ~150°C junction temperature with 20°C hysteresis, and current limit is thermally compensated across –40°C to +85°C ambient. The device operates stably with ceramic output capacitors ≥2.2µF and ESR between 10mΩ and 300mΩ-no minimum load required.

Key Specifications

Pinout & Package

SOT223R package: exposed thermal pad on bottom, 3-pin configuration with GND (Pin 1), OUT (Pin 2), IN (Pin 3); pin numbering matches top-view marking "61R-15" with year/week code.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fixed-output LDO applications.

Compared with MCP1703T-1502E/MB and TLS850F1BTV50, the AP7361-15ER-13 uniquely balances 1A output, 500mV dropout, and 70µA IQ in a thermally efficient SOT223R package-making it optimal for high-current, battery-sensitive industrial and computing applications where space and thermal management are critical.

Availability

AP7361-15ER-13 is available at Aetrix Electronics and suitable for FPGA power delivery, laptop subsystem regulation, and battery-powered audio applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for AP7361-15ER-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and mixed-signal solutions, with emphasis on power management, signal integrity, and protection devices for industrial, computing, and consumer markets.

The AP7361 belongs to Diodes' high-performance LDO family targeting low-dropout, low-IQ, and fast-transient applications in portable and embedded systems-designed to replace legacy regulators with tighter voltage tolerance and improved thermal robustness.

FAQ

What is the maximum allowable input voltage for AP7361-15ER-13?

The absolute maximum input voltage is 6.5V, but the recommended operating range is 2.2V to 6.0V. Exceeding 6.0V risks violating the 0.3V headroom limit relative to EN and ADJ pins, and may accelerate parametric shift over lifetime. Operation above 6.0V voids warranty and compromises reliability per DS33626 Rev. 11–3 Section 4.

Can AP7361-15ER-13 be used without an enable signal?

Yes-tie the EN pin directly to the IN pin to maintain continuous operation. This configuration bypasses the enable function while preserving all regulation, protection, and thermal characteristics. Do not leave EN floating, as leakage currents could cause unpredictable turn-on behavior per Electrical Characteristics Table footnote.

Is a minimum load required for output stability?

No minimum load is required. The AP7361-15ER-13 remains stable and regulated from zero load up to 1A, confirmed in Application Information Section 13 of DS33626. This eliminates need for dummy loads in standby modes, reducing system power consumption in always-on sensor or communication modules.

What thermal pad layout is required for SOT223R package?

The SOT223R exposes the die paddle as Pin 1 (GND); it must be soldered to a ≥100mm² copper area with ≥4 thermal vias (0.3mm diameter, filled) connecting to inner ground planes. Per Note 9 in DS33626, this achieves θ_JA = 110°C/W; omitting vias increases junction temperature by >35°C at 1A load.