Diodes Incorporated AP7368D-30RS4-7

Overview

AP7368D-30RS4-7 from Diodes Incorporated is a 3.0V fixed-output, low-noise RF LDO regulator delivering up to 1A output current (selectable via LCON pin), ±1% output voltage accuracy, 80dB PSRR at 1kHz, and 16µV_rms output noise (10Hz–100kHz). It operates from 1.7V to 5.5V input, features enable control, thermal shutdown, and foldback short-circuit protection, and is optimized for RF supply rails in portable wireless devices.

For engineers reviewing the AP7368D-30RS4-7 datasheet, AP7368D-30RS4-7 pinout, AP7368D-30RS4-7 application, or AP7368D-30RS4-7 equivalent, key selection criteria include its dual-current-limit configuration (500mA/1A), ultra-low quiescent current (110µA), DFN1612-8 footprint, and RF-grade noise/PSRR performance in space-constrained handheld systems.

Technical Context

The AP7368D-30RS4-7 implements a CMOS-based LDO architecture with integrated voltage reference, error amplifier, and current-limit circuitry. Its LCON pin selects between 500mA (L) and 1A (H) output current limits, while EN enables/disables regulation with defined logic thresholds (V_IL ≤ 0.4V, V_IH ≥ 1V).

It delivers 3.0V output with ±1% accuracy over –40°C to +85°C ambient, dropout voltage as low as 66mV at 3.0V/500mA, and maintains stability with 1µF ceramic input/output capacitors. Thermal shutdown activates at +150°C with +20°C hysteresis, and short-circuit protection clamps output to 60mA (LCON=L) or 110mA (LCON=H).

Key Specifications

Pinout & Package

Packaged in X1-DFN1612-8 (Type B), a 1.6mm × 1.2mm, 0.4mm pitch, thermally enhanced leadless package with exposed pad (EP) for PCB-level heat dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with XC6210B302MR-G and RT9080A-30PU5, the AP7368D-30RS4-7 uniquely combines 1A/500mA configurability, 16µV_rms noise, 80dB PSRR, and DFN1612-8 footprint-making it optimal for miniaturized RF power delivery where noise, size, and flexible current scaling are critical.

Availability

AP7368D-30RS4-7 is available at Aetrix Electronics and suitable for smartphone RF front-ends, wireless adapter power supplies, and portable camera modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for AP7368D-30RS4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-performance power management, signal integrity, and protection solutions for consumer, industrial, and automotive markets.

The AP7368 belongs to Diodes' low-noise RF LDO product line, engineered specifically for noise-sensitive wireless communication systems where PSRR, output noise, and small-footprint integration are design priorities.

FAQ

What is the function of the LCON pin on AP7368D-30RS4-7?

The LCON pin configures the device's output current limit: logic-high (≥1V) sets 1A, logic-low (≤0.4V) sets 500mA and enables 300mA inrush current limiting. It is not a tri-state input and must be actively driven to avoid undefined behavior during power-up or system reset sequences.

Can AP7368D-30RS4-7 be used without an external output capacitor?

No. An output capacitor (minimum 1µF ceramic) is mandatory for stability and transient response. The device is optimized for low-ESR ceramics; omitting C_OUT causes oscillation and potential damage. Layout requires placing C_OUT within 2mm of VOUT and GND pins to minimize parasitic inductance.

Does AP7368D-30RS4-7 support output discharge functionality?

Yes. The "D" suffix in the part number indicates integrated output discharge. When EN is pulled low, an internal NMOS switch connects VOUT to GND, discharging external capacitance rapidly-critical for safe power sequencing in multi-rail systems and preventing backfeed into powered-down sections.

What is the recommended PCB layout for thermal performance?

Maximize copper area under the exposed pad (EP), connect it directly to a solid GND plane using ≥4 thermal vias (0.3mm diameter), and route wide traces (>0.5mm) to VDD and VOUT pins. Avoid splitting the GND plane beneath the device to maintain low-impedance return paths and achieve θ_JA ≤ 55.5°C/W.