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Microchip Technology AT17C65-10PC
- Part No.:
- AT17C65-10PC
- Manufacturer:
- Microchip Technology
- Category:
- Configuration PROMs for FPGAs
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
AT17C65-10PC.pdf
- Description:
- IC SERIAL CONFIG PROM 64K 8DIP
- Quantity:
- Payment:
- Shipping:
Inventory:1,735
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Product details
Overview
AT17C65-10PC from Atmel is a 65,536 × 1-bit serial EEPROM FPGA configuration memory operating at 5V ±5% (commercial), featuring 12.5 MHz max clock frequency, programmable reset polarity, and compatibility with Xilinx XC3000/XC4000, Altera FLEX®, and Atmel AT40K/AT6000 FPGAs in master serial mode.
For engineers reviewing the AT17C65-10PC datasheet, AT17C65-10PC pinout, AT17C65-10PC application, or AT17C65-10PC equivalent, key selection factors include its 8-pin PDIP/20-lead PLCC/SOIC packaging options, cascading support only as end-of-chain device, 75 µA standby current at 5V, and in-system programmability via 2-wire bus.
Technical Context
The AT17C65-10PC implements a serial-access configuration memory architecture optimized for FPGA master serial mode loading, where CLK drives internal address/bit counters and DATA delivers configuration bits to FPGA DIN. Its CEO output is inactive, confirming it cannot drive downstream CE in cascade chains.
Reset polarity is user-programmable via EEPROM byte; RESET/OE functions as active-high or active-low depending on configuration. SER_EN must be held high during FPGA configuration and pulled low only for 2-wire ISP programming, with no internal voltage boosting required.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 65,536 × 1-bit (64 Kbit) nonvolatile configuration storage |
| Supply voltage | 5V ±5% (commercial), supports industrial range 4.5–5.5V |
| Max clock frequency | 12.5 MHz - determines maximum FPGA configuration speed |
| Standby current | 75 µA at 5V - enables low-power system sleep states |
| Operating temperature | 0°C to +70°C - commercial-grade thermal envelope |
| Interface | Serial master-mode interface with CLK, DATA, CE, RESET/OE, SER_EN |
| Reset polarity | Programmable active-high or active-low - eliminates external inverters |
Pinout & Package
AT17C65-10PC is available in 8-pin PDIP (8P3) package per JEDEC MS-001 BA standard, with 0.300" width and through-hole mounting.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | DATA | Bi-directional open-collector I/O for configuration bit streaming and 2-wire programming |
| 2 | CLK | Input clock synchronizing internal address counter and bit transfer to FPGA |
| 3 | RESET/OE | Programmable polarity input controlling address counter reset and output enable |
| 4 | CE | Chip Enable - high disables counters and forces standby mode (75 µA) |
| 5 | GND | Ground reference - requires 0.2 µF decoupling capacitor to VCC |
| 6 | CEO | Inactive on AT17C65 - not used; reserved for 128K/256K cascade chaining |
| 7 | SER_EN | Serial enable - high for FPGA configuration, low for 2-wire ISP programming |
| 8 | VCC | +5V power supply - operates within 4.75–5.25V for commercial grade |
Key Features
| Feature | Design Value |
|---|---|
| In-system programmability | 2-wire serial interface with SER_EN control enables field reprogramming without socket removal |
| Programmable reset polarity | Eliminates need for external inverter logic by storing reset behavior in EEPROM byte |
| FPGA master serial mode support | Direct compatibility with Xilinx, Altera, Atmel, Lucent, Motorola FPGA families' native config protocol |
| Low-power standby | 75 µA ICCS at 5V allows integration into power-sensitive embedded systems |
| Write protection | Hardware WP input (active-low when CE low) prevents accidental overwrite of critical config blocks |
Applications
| Industrial PLC Configuration | Xilinx XC4000 FPGA Boot |
|---|---|
Use Scenario: Reconfigurable logic modules in factory automation controllers require reliable, repeatable FPGA initialization after power cycle or watchdog reset. IC Role / Device Role / Timing Role: AT17C65-10PC serves as dedicated configuration memory delivering bitstream to XC4000 DIN under CCLK control in master serial mode. Use Value: Guaranteed deterministic startup with 12.5 MHz clock support reduces boot latency versus slower alternatives. | Use Scenario: Field-deployed telecom edge devices use Xilinx XC4000 FPGAs for protocol adaptation and require secure, tamper-resistant configuration storage. IC Role / Device Role / Timing Role: AT17C65-10PC provides nonvolatile, electrically erasable config storage with programmable reset polarity aligned to system reset architecture. Use Value: Write-protection capability prevents corruption during firmware updates or brown-out events. |
| Altera FLEX® Development Board | Atmel AT40K-Based Motor Controller |
Use Scenario: Engineering validation platforms for Altera FLEX® devices require rapid config iteration during hardware-software co-design. IC Role / Device Role / Timing Role: AT17C65-10PC acts as in-system programmable configuration source, enabling bitstream updates via 2-wire bus without board rework. Use Value: SER_EN-controlled ISP mode allows debug-time reconfiguration without removing the device from circuit. | Use Scenario: Brushless DC motor drives implement real-time control logic in Atmel AT40K FPGAs, requiring robust configuration persistence across thermal cycling. IC Role / Device Role / Timing Role: AT17C65-10PC supplies configuration data at power-on, synchronized to AT40K CON and CCLK signals in master serial topology. Use Value: Commercial-grade 0°C to +70°C operation matches motor controller ambient envelope without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPGA configuration memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT17LV65-10PC | 3.3V ±10% supply, 10 MHz max clock, 50 µA standby current | Targets 3.3V FPGA systems (e.g., newer Xilinx Spartan); incompatible with 5V-only designs | Select when host FPGA uses 3.3V I/O banks and lower power is prioritized over speed |
| AT17C128-10PC | 128K × 1-bit capacity, supports cascading via CEO output, 8 MHz max clock in cascade mode | Required for larger FPGAs (e.g., XC4010E) or multi-FPGA daisy chains; physically pin-compatible but electrically distinct | Choose only if configuration bitstream exceeds 64 Kbit or cascade topology is needed |
Compared with AT17LV65-10PC, AT17C65-10PC delivers higher clock rate (12.5 vs. 10 MHz) and 5V compatibility but consumes more standby current; versus AT17C128-10PC, it offers faster single-device operation but lacks CEO-driven cascade capability and half the memory depth.
Availability
AT17C65-10PC is available at Aetrix Electronics and suitable for industrial PLCs, FPGA-based telecom edge devices, Altera FLEX® development boards, Atmel AT40K motor controllers, and Xilinx XC4000 boot systems requiring stable component supply across extended production lifecycles.
Supply support for AT17C65-10PC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation, now part of Microchip Technology, designed high-reliability nonvolatile memory and microcontroller solutions for embedded systems before its 2016 acquisition.
The AT17 Series was developed specifically as FPGA configuration EEPROMs supporting master serial mode across Xilinx, Altera, and Atmel FPGA families, emphasizing ease of integration, in-system programmability, and industrial temperature resilience.
FAQ
What is the function of the SER_EN pin on the AT17C65-10PC?
The SER_EN pin on the AT17C65-10PC controls entry into 2-wire in-system programming mode: when pulled low, it enables serial programming via DATA and CLK; when held high, it permits normal FPGA configuration operation. This separation ensures that configuration integrity is maintained during routine system operation while allowing field updates when needed. The AT17C65-10PC does not require external programming voltage - all necessary levels are generated internally.
Can the AT17C65-10PC be used in a cascaded configuration chain with other AT17 devices?
No, the AT17C65-10PC cannot initiate or drive a cascade chain because it lacks functional CEO output - that feature is exclusive to AT17C128 and AT17C256 variants. However, the AT17C65-10PC may serve as the final device in a cascade when driven by an upstream AT17C128 or AT17C256's CEO signal. Its pinout is compatible, but electrical functionality is limited to standalone or end-of-chain use.
What does "-10PC" signify in the AT17C65-10PC part number?
The "-10PC" suffix in AT17C65-10PC indicates two attributes: "10" denotes the commercial-grade speed grade (12.5 MHz max clock), and "PC" specifies the 8-pin PDIP package (8P3) with commercial temperature range (0°C to +70°C). This distinguishes it from variants like -10JC (20-lead PLCC) or -10PI (industrial temperature PDIP), ensuring mechanical and thermal compliance for intended applications.
How is reset polarity programmed on the AT17C65-10PC?
Reset polarity on the AT17C65-10PC is programmed by writing a specific byte in the EEPROM's configuration area using an industry-standard programmer or Atmel's ATDH2200E kit. Once set, RESET/OE behaves as either active-high or active-low - eliminating need for external inversion logic. The AT17C65-10PC retains this setting across power cycles, and the polarity choice directly affects how system reset signals synchronize with FPGA configuration restart.
Is the AT17C65-10PC compatible with Xilinx Spartan FPGAs?
Yes, the AT17C65-10PC is explicitly listed in its documentation as compatible with Xilinx SPARTAN® FPGAs, operating in master serial mode where the FPGA generates CCLK and reads configuration bits from AT17C65-10PC's DATA pin. It supports the required timing parameters including 12.5 MHz clock rate and proper OE/CE assertion sequencing, making it suitable for Spartan-1 and Spartan-II family configuration where 64 Kbit capacity suffices.
AT17C65-10PC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Programmable Type:
- Serial EEPROM
- Memory Size:
- 64kb
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
AT17C65-10PC FAQ
1.How can I place an order for AT17C65-10PC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT17C65-10PC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT17C65-10PC reliable?
The price and inventory of AT17C65-10PC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT17C65-10PC is usually 5 days.
3.What payment methods are accepted for AT17C65-10PC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT17C65-10PC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT17C65-10PC?
AT17C65-10PC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT17C65-10PC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT17C65-10PC?
For technical support, including AT17C65-10PC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT17C65-10PC requirements.
6.How does Aetrix verify that AT17C65-10PC is sourced from the original manufacturer or authorized distributors?
All AT17C65-10PC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT17C65-10PC meets industry standards.
7.What is the process for return or replacement of AT17C65-10PC?
All AT17C65-10PC units undergo pre-shipment inspection (PSI). If there is an issue with AT17C65-10PC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT17C65-10PC part is unused and in its original packaging.
Return procedure for AT17C65-10PC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT17C65-10PC Tags
-
AT17LV512A-10PU
Microchip Technology
-
EPCQ4ASI8N
Intel
-
AT17LV256-10PU
Microchip Technology
-
AT17LV256-10NU
Microchip Technology
-
EPCQ16ASI8N
Intel
-
AT17LV010-10PU
Microchip Technology
-
EPCQ32ASI8N
Intel
-
EPCQ64ASI16N
Intel
-
EPCQ128ASI16N
Intel
-
AT17LV512A-10JU
Microchip Technology
-
AT17LV512-10JU
Microchip Technology
-
AT17LV010-10JU
Microchip Technology
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