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Microchip Technology AT17C65-10SC
- Part No.:
- AT17C65-10SC
- Manufacturer:
- Microchip Technology
- Category:
- Configuration PROMs for FPGAs
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT17C65-10SC.pdf
- Description:
- IC EEPROM FPGA 65KB 20-SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,298
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Product details
Overview
AT17C65-10SC from Atmel is a 65,536 × 1-bit serial EEPROM FPGA configuration memory with 5V ±5% supply, 12.5 MHz max clock frequency, and programmable reset polarity, designed to load configuration bitstreams into SRAM-based FPGAs including Xilinx XC3000/XC4000 and Altera FLEX® devices in master serial mode.
For engineers reviewing the AT17C65-10SC datasheet, AT17C65-10SC pinout, AT17C65-10SC application, or AT17C65-10SC equivalent, key selection criteria include cascading capability (end-of-chain only), 2-wire ISP support via SER_EN, CEO output absence (distinguishing it from AT17C128/256), and compatibility with industry-standard FPGA configuration protocols.
Technical Context
The AT17C65-10SC implements a synchronous serial interface where CLK drives internal address/bit counters, DATA serves as bidirectional open-collector I/O for configuration data transfer, and CE controls active/standby mode-asserting high forces low-power standby (<75 µA at 5V). RESET/OE enables configurable reset polarity (active-high or active-low) and resets internal counters upon assertion.
It operates exclusively in master serial mode with FPGA CCLK as clock source; SER_EN must be held high during configuration and pulled low only for 2-wire programming. Unlike AT17C128/256, it lacks CEO output and cannot drive downstream EEPROMs-limiting use to standalone or cascade-end configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 65,536 × 1-bit (64 Kbit) nonvolatile configuration storage |
| Supply Voltage | 5V ±5% (commercial range: 0°C to +70°C) |
| Max Clock Frequency | 12.5 MHz - sets maximum FPGA configuration speed |
| Standby Current | <75 µA at 5V - enables low-power system sleep states |
| Reset Polarity | Programmable (active-high or active-low) - eliminates need for external inverters |
| Write Protection | Hardware WP input disables writes when high - prevents accidental reconfiguration |
| Interface Protocol | 2-wire serial bus for ISP (SER_EN-controlled) - supports in-system programming without socket removal |
Pinout & Package
AT17C65-10SC is available in 20-lead SOIC (20S) package per ordering code suffix "SC", with 0.300" body width and standard JEDEC SOIC footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | DATA | Open-collector bidirectional I/O for configuration data transfer and 2-wire programming |
| 2 | CLK | Input clock synchronized to FPGA CCLK; increments internal address/bit counter |
| 3 | (WP) RESET/OE | Programmable dual-function input: reset polarity control or write protect (when CE = low) |
| 4 | CE | Chip enable - high disables counters and activates standby mode (<75 µA) |
| 5 | GND | Ground reference - requires 0.2 µF decoupling capacitor to VCC |
| 6 | CEO (A2) | Not connected (NC) on AT17C65 - distinguishes it from 128K/256K variants with cascading output |
| 7 | SER_EN | Serial enable - must be high during FPGA configuration; low enables 2-wire ISP mode |
| 8 | VCC | +5V power supply - supports commercial temperature range (0°C to +70°C) |
Key Features
| Feature | Design Value |
|---|---|
| In-system programmability | 2-wire serial interface via SER_EN enables field updates without device removal |
| Configurable reset polarity | EEPROM-programmed reset behavior eliminates external logic for FPGA reset synchronization |
| FPGA master serial mode support | Direct interface to Xilinx, Altera, Atmel, Lucent, and Motorola SRAM FPGAs without glue logic |
| Low-power standby | 75 µA max ICCS at 5V allows integration into power-sensitive embedded systems |
| Hardware write protection | WP input disables memory writes when asserted - prevents corruption during power transitions |
Applications
| Industrial PLC Configuration | Xilinx XC4000 FPGA Boot |
|---|---|
|
Use Scenario: Reconfiguring logic in programmable logic controllers after firmware updates or field calibration. IC Role / Device Role / Timing Role: Serial configuration memory providing deterministic bitstream loading at power-on or command-triggered reset. Use Value: Enables zero-downtime reconfiguration using the AT17C65-10SC's programmable reset polarity and 12.5 MHz clock rate. |
Use Scenario: Loading initial configuration into Xilinx XC4000-series FPGAs during cold start in test equipment. IC Role / Device Role / Timing Role: Master serial mode configurator synchronizing to FPGA CCLK for bit-accurate streaming. Use Value: Guarantees reliable boot via AT17C65-10SC's open-collector DATA line and CE-controlled standby recovery. |
| Altera FLEX® Development Board | Atmel AT40K FPGA System |
|
Use Scenario: Supporting rapid prototyping on evaluation boards requiring multiple FPGA configuration variants. IC Role / Device Role / Timing Role: Standalone configuration EEPROM interfacing directly to Altera FLEX® master serial pins (DIN, CCLK, nCONFIG). Use Value: Leverages AT17C65-10SC's 2-wire ISP capability for iterative design validation without hardware changes. |
Use Scenario: Providing secure, field-upgradable configuration storage for Atmel AT40K-based motor control modules. IC Role / Device Role / Timing Role: Nonvolatile memory storing encrypted bitstreams loaded at power-up via AT40K master serial interface. Use Value: Uses AT17C65-10SC's hardware write protection (WP) and programmable reset to prevent unauthorized reprogramming. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPGA configuration memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT17LV65-10SC | 3.3V operation (3.0–3.6V), lower ICCA (5 mA), reduced FMAX (10 MHz), same pinout and functionality | Required for 3.3V FPGA systems; not suitable for 5V-only designs | Select AT17LV65-10SC only when target FPGA uses 3.3V I/O and power rails |
| AT17C65-10PC | Identical electrical specs but in 8-pin PDIP (8P3) package instead of 20-lead SOIC (20S) | Preferred for through-hole prototyping or legacy board layouts | Choose AT17C65-10PC for hand-soldered development; AT17C65-10SC for surface-mount production |
Compared with AT17LV65-10SC, the AT17C65-10SC delivers higher clock tolerance (12.5 MHz vs. 10 MHz) and 5V compatibility, while AT17C65-10PC offers identical performance in a through-hole package-making AT17C65-10SC optimal for space-constrained 5V SMT FPGA designs.
Availability
AT17C65-10SC is available at Aetrix Electronics and suitable for industrial PLCs, FPGA-based test equipment, Altera FLEX® development platforms, and Atmel AT40K motor control systems requiring stable component supply across extended product lifecycles.
Supply support for AT17C65-10SC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and FPGA configuration solutions.
The AT17 Series was designed specifically as cost-effective, easy-to-integrate configuration memory for SRAM-based FPGAs, targeting industrial, communications, and embedded systems requiring field-upgradable logic.
FAQ
What is the function of the SER_EN pin on the AT17C65-10SC?
The SER_EN pin on the AT17C65-10SC enables 2-wire in-system programming mode when pulled low; during normal FPGA configuration, it must be held high to ensure proper serial data streaming. This dual-mode control allows field updates without removing the AT17C65-10SC from the board, and its state directly determines whether the device operates in configuration or programming mode.
Can the AT17C65-10SC be used in a cascaded configuration chain with other AT17 devices?
No-the AT17C65-10SC lacks a CEO (Chip Enable Output) pin and is explicitly designated for standalone use or as the final device in a cascade chain. Only AT17C128 and AT17C256 variants provide CEO functionality required to drive subsequent EEPROMs; attempting to place AT17C65-10SC upstream in a cascade will halt configuration after its last bit.
What does the "-10SC" suffix indicate in AT17C65-10SC?
The "-10SC" suffix in AT17C65-10SC specifies a commercial-grade (0°C to +70°C) 5V device in 20-lead SOIC (20S) package with 10% timing margin (–10 speed grade); "SC" confirms SOIC packaging per Atmel's ordering convention, distinguishing it from PDIP (PC), PLCC (JC), or narrow SOIC (NC) variants.
How does the programmable reset polarity work on the AT17C65-10SC?
The AT17C65-10SC stores reset polarity configuration in a dedicated EEPROM byte, allowing users to select active-high or active-low behavior on the RESET/OE pin via standard programmer algorithms. This eliminates external inverters and ensures synchronization with FPGA reset timing requirements-critical for robust power-on initialization in the AT17C65-10SC's target applications.
Is the AT17C65-10SC compatible with Xilinx Spartan FPGAs?
Yes-the AT17C65-10SC is explicitly listed as compatible with Xilinx SPARTAN® FPGAs in its features table and supports master serial mode configuration per Xilinx documentation. Its 64 Kbit capacity matches Spartan-1 and early Spartan-II configuration requirements, and its 12.5 MHz clock tolerance aligns with typical CCLK timing budgets for those families.
AT17C65-10SC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Programmable Type:
- Serial EEPROM
- Memory Size:
- 64kb
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SOIC
AT17C65-10SC FAQ
1.How can I place an order for AT17C65-10SC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT17C65-10SC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT17C65-10SC reliable?
The price and inventory of AT17C65-10SC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT17C65-10SC is usually 5 days.
3.What payment methods are accepted for AT17C65-10SC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT17C65-10SC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT17C65-10SC?
AT17C65-10SC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT17C65-10SC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT17C65-10SC?
For technical support, including AT17C65-10SC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT17C65-10SC requirements.
6.How does Aetrix verify that AT17C65-10SC is sourced from the original manufacturer or authorized distributors?
All AT17C65-10SC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT17C65-10SC meets industry standards.
7.What is the process for return or replacement of AT17C65-10SC?
All AT17C65-10SC units undergo pre-shipment inspection (PSI). If there is an issue with AT17C65-10SC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT17C65-10SC part is unused and in its original packaging.
Return procedure for AT17C65-10SC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT17C65-10SC Tags
-
AT17LV512A-10PU
Microchip Technology
-
EPCQ4ASI8N
Intel
-
AT17LV256-10PU
Microchip Technology
-
AT17LV256-10NU
Microchip Technology
-
EPCQ16ASI8N
Intel
-
AT17LV010-10PU
Microchip Technology
-
EPCQ32ASI8N
Intel
-
EPCQ64ASI16N
Intel
-
EPCQ128ASI16N
Intel
-
AT17LV512A-10JU
Microchip Technology
-
AT17LV512-10JU
Microchip Technology
-
AT17LV010-10JU
Microchip Technology
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