Microchip Technology AT24C02A-10PC-1.8
- Part No.:
- AT24C02A-10PC-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
AT24C02A-10PC-1.8.pdf
- Description:
- IC EEPROM 2KBIT I2C 400KHZ 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,723
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C02A-10PC-1.8 from Microchip Technology (formerly Atmel) is a 2K-bit (256 × 8) I²C-compatible serial EEPROM optimized for ultra-low-voltage embedded systems. It operates from 1.8V to 5.5V, supports 100 kHz I²C communication at 1.8V, features hardware write protection via the WP pin, and delivers 1 million write cycles with 100-year data retention - ideal for battery-powered sensor nodes and portable medical devices.
For engineers reviewing the AT24C02A-10PC-1.8 datasheet, AT24C02A-10PC-1.8 pinout, AT24C02A-10PC-1.8 application, or AT24C02A-10PC-1.8 equivalent, key selection criteria include its 1.8V minimum supply, 8-pin PDIP package, page-write capability (8-byte pages), Schmitt-trigger inputs for noise immunity, and guaranteed operation across commercial temperature range (0°C to 70°C).
Technical Context
The AT24C02A-10PC-1.8 implements a standard two-wire I²C interface with open-drain SDA and active-high SCL, supporting device addressing via A0–A2 pins (all hardwired on this variant). Its internal architecture organizes memory as 256 words of 8 bits each, requiring an 8-bit word address for random access and enabling byte- or page-write operations with self-timed 10 ms max write cycles.
It integrates Schmitt-trigger inputs on SDA and SCL for robust noise suppression, supports acknowledge polling during write cycles, and uses a dedicated WP pin to protect the upper half (1K-bit) of the array when pulled high - distinct from earlier AT24C02 versions with different protection mapping.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2048 bits (256 × 8), organized as nonvolatile storage for configuration, calibration, or event logging in resource-constrained systems. |
| Supply Voltage Range | 1.8V to 5.5V - enables direct interfacing with 1.8V logic families and mixed-voltage microcontrollers without level shifters. |
| I²C Clock Frequency | 100 kHz maximum at 1.8V - ensures reliable timing margins under low-power conditions while maintaining compatibility with legacy I²C masters. |
| Write Cycle Time | 10 ms maximum - defines minimum interval between write commands; requires polling or timeout handling in firmware. |
| Endurance & Retention | 1 million write cycles / 100 years data retention - supports long-life deployment in industrial logging and firmware parameter storage. |
| ESD Protection | >3000V HBM - provides robustness against handling-induced electrostatic discharge in assembly and field environments. |
| Operating Temperature | 0°C to +70°C (Commercial grade) - validated for use in consumer electronics, office equipment, and non-automotive embedded applications. |
Pinout & Package
AT24C02A-10PC-1.8 is housed in an 8-lead, 0.300" wide plastic dual-inline package (PDIP), per JEDEC MS-001 BA standard. Pin 1 is marked by a notch or dot; leads are spaced 0.100" (2.54 mm) apart, with overall body dimensions 0.300" × 0.400".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardwired ground or VCC to set one of eight possible I²C slave addresses; determines bus topology scalability. |
| A1 | Device Address Input | Hardwired address bit; used with A0 and A2 to uniquely identify up to eight AT24C02A devices on same I²C bus. |
| A2 | Device Address Input | Third device address bit; all three (A0–A2) are externally configurable to avoid I²C address conflicts. |
| GND | Ground Reference | Return path for VCC and signal currents; must be low-impedance and decoupled near device for noise immunity. |
| VCC | Power Supply | Primary power input (1.8V–5.5V); requires local 0.1 µF ceramic decoupling capacitor to suppress switching transients. |
| WP | Write Protect Control | Hardware-enforced lock: tied to GND for full read/write access; tied to VCC to protect upper 1K-bit memory segment. |
| SCL | Serial Clock Input | Master-generated clock signal; open-drain compatible; requires external pull-up resistor (typically 2.2–10 kΩ). |
| SDA | Serial Data I/O | Bidirectional, open-drain data line shared across I²C bus; requires same pull-up as SCL for proper bus arbitration. |
Key Features
| Feature | Design Value |
|---|---|
| 1.8V Operation Support | Enables direct integration into modern ultra-low-power SoCs and battery-operated IoT endpoints without voltage translation. |
| Hardware Write Protection (WP) | Prevents accidental overwrites of critical firmware parameters or calibration data via simple VCC/GND tie-off. |
| 8-Byte Page Write Mode | Reduces I²C transaction overhead by writing up to 8 bytes per command - cuts firmware execution time vs. byte-by-byte writes. |
| Schmitt-Trigger Inputs | Rejects noise on SDA/SCL lines in electrically noisy environments (e.g., motor control boards, industrial sensors). |
| 100-Year Data Retention | Guarantees stored configuration remains valid over product lifetime without refresh - essential for maintenance-free deployments. |
Applications
| Smart Metering | Industrial PLC Modules |
|---|---|
Use Scenario: Storing tariff tables, meter calibration constants, and tamper-event logs in electricity/water meters with 10+ year field life. IC Role / Device Role / Timing Role: Nonvolatile configuration storage with infrequent writes and frequent reads; operates during brown-out conditions down to 1.8V. Use Value: Eliminates need for backup batteries or supercapacitors due to guaranteed 100-year retention and low 3 µA standby current at 1.8V. |
Use Scenario: Holding I/O mapping definitions, firmware update flags, and diagnostic history in modular programmable logic controllers. IC Role / Device Role / Timing Role: Persistent parameter store interfaced via microcontroller's I²C peripheral; accessed during boot and runtime reconfiguration. Use Value: Enables field-upgradable logic configurations without PCB redesign, leveraging 1M endurance for repeated firmware updates. |
| Wearable Health Monitors | Point-of-Sale Terminals |
Use Scenario: Saving user profiles, sensor calibration offsets, and last-measured vitals in compact, coin-cell-powered ECG/SpO₂ devices. IC Role / Device Role / Timing Role: Low-voltage EEPROM co-located with MCU and analog front-end; powered directly from 1.8V LDO output. Use Value: Reduces BOM count by removing level shifters and extends battery life via sub-µA standby current and efficient page writes. |
Use Scenario: Storing encryption keys, transaction audit trails, and display language settings in retail payment terminals with regulatory compliance requirements. IC Role / Device Role / Timing Role: Secure parameter storage with hardware write lock (WP pin) preventing unauthorized key modification. Use Value: Meets PCI PTS data integrity mandates through deterministic write protection and certified 1M-cycle endurance for audit log rotation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Microchip AT24C02D-SSHM-T | Same 2K-bit capacity and 1.8V–5.5V range, but in 8-pin SOIC (8S1) and rated for industrial temp (−40°C to +85°C); no PDIP option. | Preferred for surface-mount production and extended-temperature deployments; lacks through-hole PDIP footprint. | Select if board space is constrained and industrial-grade reliability is required; not drop-in for AT24C02A-10PC-1.8's PDIP socket. |
| ON Semiconductor CAT24C02HU4I-GT3 | 2K-bit I²C EEPROM with identical 1.8V–5.5V operation and 100 kHz speed at 1.8V, offered in 8-pin TSSOP (8T); 1M endurance and 100-year retention matched. | Targets high-density PCB layouts; TSSOP package reduces footprint vs. PDIP but requires reflow soldering. | Choose for automated SMT assembly and space-sensitive designs; pinout matches AT24C02A but physical package differs. |
Compared with AT24C02A-10PC-1.8, the AT24C02D-SSHM-T offers broader temperature support in SOIC, while the CAT24C02HU4I-GT3 provides TSSOP miniaturization - both retain identical electrical behavior and memory architecture but require layout adaptation for their respective packages.
Availability
AT24C02A-10PC-1.8 is available at Aetrix Electronics and suitable for smart metering, industrial PLC modules, wearable health monitors, and point-of-sale terminals requiring stable component supply across multi-year production cycles.
Supply support for AT24C02A-10PC-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product continuity, technical documentation, and manufacturing for the AT24C series EEPROMs.
The AT24C02A-10PC-1.8 belongs to Microchip's serial EEPROM product line, designed specifically for low-voltage, low-power embedded systems needing reliable nonvolatile storage with minimal external components.
FAQ
What is the maximum I²C clock frequency supported by AT24C02A-10PC-1.8 at 1.8V?
The AT24C02A-10PC-1.8 supports a maximum I²C clock frequency of 100 kHz when operating at 1.8V. This is specified in the AC Characteristics table under fSCL for 1.8V operation. The device does not support 400 kHz at 1.8V - that speed is only guaranteed at 5.0V (4.5V–5.5V) operation. Firmware must configure the I²C master accordingly to avoid communication failures.
How does the Write Protect (WP) pin function on AT24C02A-10PC-1.8?
On the AT24C02A-10PC-1.8, the WP pin enables hardware-based memory protection: when tied to GND, full read/write access is allowed; when tied to VCC, the upper half (1K-bit) of the 2K-bit array is write-protected. This behavior is specific to the AT24C02A family and differs from earlier AT24C02 versions - the protection boundary is fixed at the 1K boundary regardless of address pointer position.
What package type is used for AT24C02A-10PC-1.8?
The AT24C02A-10PC-1.8 uses an 8-lead, 0.300" wide plastic dual-inline package (PDIP), designated as package code 8P3 per Microchip's ordering information. Its pinout matches standard 8-pin DIP footprints, with pin 1 located at the left end adjacent to the notch or dot marking. This through-hole package supports manual prototyping and legacy board assemblies.
Can AT24C02A-10PC-1.8 be used in industrial temperature applications?
No - the AT24C02A-10PC-1.8 is rated for commercial temperature range only (0°C to +70°C), as indicated by the "C" suffix in its part number. For industrial applications (−40°C to +85°C), Microchip offers variants such as AT24C02A-10PI-1.8 (PDIP) or AT24C02A-10SI-1.8 (SOIC). Using AT24C02A-10PC-1.8 outside its specified range may result in timing violations or data corruption.
What is the page size and maximum write length per I²C transaction for AT24C02A-10PC-1.8?
The AT24C02A-10PC-1.8 supports an 8-byte page write mode, meaning up to 8 consecutive bytes can be written in a single I²C transaction. This requires the starting address to be aligned to an 8-byte boundary (e.g., 0x00, 0x08, 0x10). Exceeding 8 bytes causes wraparound within the same page - critical for firmware to manage to avoid unintended overwrites.
AT24C02A-10PC-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
AT24C02A-10PC-1.8 FAQ
1.How can I place an order for AT24C02A-10PC-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C02A-10PC-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C02A-10PC-1.8 reliable?
The price and inventory of AT24C02A-10PC-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C02A-10PC-1.8 is usually 5 days.
3.What payment methods are accepted for AT24C02A-10PC-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C02A-10PC-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C02A-10PC-1.8?
AT24C02A-10PC-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C02A-10PC-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C02A-10PC-1.8?
For technical support, including AT24C02A-10PC-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C02A-10PC-1.8 requirements.
6.How does Aetrix verify that AT24C02A-10PC-1.8 is sourced from the original manufacturer or authorized distributors?
All AT24C02A-10PC-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C02A-10PC-1.8 meets industry standards.
7.What is the process for return or replacement of AT24C02A-10PC-1.8?
All AT24C02A-10PC-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT24C02A-10PC-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C02A-10PC-1.8 part is unused and in its original packaging.
Return procedure for AT24C02A-10PC-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C02A-10PC-1.8 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

