Microchip Technology AT24C02D-XHM-T
- Part No.:
- AT24C02D-XHM-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24C02D-XHM-T.pdf
- Description:
- IC EEPROM 2KBIT I2C 1MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:5,372
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C02D-XHM-T from Microchip Technology is a 2-Kbit I²C-compatible serial EEPROM organized as 256 × 8 bits, operating from 1.7V to 3.6V with industrial temperature range (−40°C to +85°C), 1 MHz Fast Mode Plus support at 2.5–3.6V, and hardware write-protection via WP pin - used for nonvolatile configuration storage in embedded microcontroller systems.
For engineers reviewing the AT24C02D-XHM-T datasheet, AT24C02D-XHM-T pinout, AT24C02D-XHM-T application, or AT24C02D-XHM-T equivalent, key selection factors include I²C bus speed compatibility (100/400/1000 kHz), low standby current (≤0.8 μA), page-write capability (8-byte pages), write endurance (1M cycles), and UDFN-8 package footprint constraints.
Technical Context
The AT24C02D-XHM-T functions as an I²C slave device with fixed 7-bit address prefix 1010b and three programmable address bits (A2–A0), enabling up to eight devices on one bus. It implements Schmitt-triggered, noise-filtered SDA/SCL inputs and supports standard, fast, and fast-mode plus timing with tLOW/tHIGH down to 500 ns at 1 MHz.
Internally, it uses a high-voltage generation circuit for EEPROM programming, power-on reset (POR) with 1.5 V threshold and 100 µs tPUP delay, and automatic address pin pull-down when floating. Memory is arranged in 32 pages of 8 bytes each, supporting byte, page, random, and sequential read/write operations with self-timed 5 ms max write cycle.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2,048 bits (256 × 8), organized in 32 pages of 8 bytes - enables compact firmware parameter storage without external memory controller. |
| Supply Voltage | 1.7 V to 3.6 V - compatible with modern ultra-low-power MCUs and battery-backed systems. |
| I²C Speed Modes | 100 kHz (std), 400 kHz (fast), 1 MHz (FM+) - FM+ requires ≥2.5 V supply; supports high-throughput configuration updates. |
| Standby Current | Max 0.8 μA at 3.6 V - minimizes quiescent power in always-on IoT sensor nodes. |
| Write Endurance | 1,000,000 cycles - ensures reliable logging or calibration data retention over 10+ years of field operation. |
| Data Retention | 100 years at 55°C - guarantees long-term integrity of stored device identifiers, calibration coefficients, or security keys. |
| Write Protection | Hardware WP pin - disables all writes when pulled high, preventing accidental corruption during firmware updates. |
Pinout & Package
AT24C02D-XHM-T is supplied in an 8-pad UDFN (Ultra Thin DFN) package, 2 mm × 3 mm, 0.5 mm pitch, with exposed pad (recommended connected to GND). Pin 1 is A0 (top-left corner, marked dot).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | LSB of 3-bit hardware address; pulled down internally if floating - sets I²C slave address bit 0 (A0 = 0 → address bit 0 = 0). |
| A1 | Device Address Input | Middle bit of hardware address; determines unique I²C address among up to 8 devices on same bus. |
| A2 | Device Address Input | MSB of hardware address; combined with A1/A0, selects one of eight possible 7-bit addresses (1010xxx). |
| GND | Ground Reference | System return path for VCC and signal logic; must be low-impedance connection to minimize noise coupling into SDA/SCL. |
| SDA | Serial Data I/O | Open-drain bidirectional line; requires external pull-up (≤10 kΩ); shares bus with other I²C slaves; transmits ACK/NACK on 9th clock edge. |
| SCL | Serial Clock Input | Master-generated clock; rising edge latches input data, falling edge outputs data; includes internal spike filter and Schmitt trigger. |
| WP | Write-Protect Control | Active-high protection: tied to VCC blocks all writes; tied to GND enables full array write access; internally pulled down if floating. |
| VCC | Power Supply | 1.7–3.6 V core supply; must ramp monotonically at ≤0.1 V/µs; POR activates at ~1.5 V; stable >100 µs required before first command. |
Key Features
| Feature | Design Value |
|---|---|
| Fast Mode Plus Support | 1 MHz I²C operation at 2.5–3.6 V - reduces configuration write time by 2.5× vs. 400 kHz mode, critical for production-line programming. |
| Page Write Capability | 8-byte page buffer with partial-page writes - allows efficient multi-byte updates without repeated start/stop sequences. |
| Noise-Resilient Interface | Schmitt-triggered SDA/SCL with 100 ns spike suppression - maintains reliable communication in electrically noisy industrial environments. |
| Low-Power Standby | 0.08–0.8 μA ISB across voltage/temperature - extends battery life in portable medical or metering devices. |
| Green Packaging | RoHS-compliant, halide-free, lead-free UDFN-8 - meets global environmental compliance requirements without derating. |
Applications
| Industrial Sensor Calibration | Smart Meter Firmware Storage |
|---|---|
Use Scenario: Storing factory-calibrated offset/gain coefficients and temperature compensation tables in pressure or humidity sensors. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed at power-up by MCU via I²C to initialize ADC and signal chain. Use Value: Enables field-replaceable sensor modules with unique calibration data retained across 100-year lifetime and 1M write cycles. | Use Scenario: Holding tariff tables, billing history, and secure firmware update signatures in electricity/water meters. IC Role / Device Role / Timing Role: Secure boot-time configuration store; WP pin hardwired to prevent tampering during active metering. Use Value: Guarantees data integrity under brown-out conditions and meets IEC 62056-21 security requirements for utility-grade meters. |
| IoT Edge Device Identity | Automotive Body Control Module |
Use Scenario: Storing unique device ID, TLS certificate fingerprints, and OTA update state flags in battery-powered asset trackers. IC Role / Device Role / Timing Role: Persistent identity anchor accessed only during boot or secure provisioning; operates at 1.8 V to match MCU IO levels. Use Value: Eliminates need for larger SPI flash; 0.8 μA standby current extends 10-year battery life in LoRaWAN endpoints. | Use Scenario: Saving seat position memory, mirror presets, and lighting configuration in automotive door modules. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced to 3.3 V CAN/LIN microcontroller; survives load-dump transients via internal ESD protection (>4 kV). Use Value: Meets AEC-Q100 Grade 2 (−40°C to +105°C) ambient requirement when derated; qualified for 15-year vehicle service life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C02C-SSHM-T | Same 2-Kbit capacity and I²C interface, but in SOIC-8 package (4.9 × 6.0 mm) - larger footprint, higher thermal mass. | Preferred for prototyping or legacy PCBs with SOIC footprints; lacks UDFN's space savings for dense layouts. | Select when board real estate permits and hand-soldering or rework is required; not drop-in compatible with UDFN layout. |
| M24C02-RMN6TP | 2-Kbit EEPROM from STMicroelectronics; identical 1.7–5.5 V range, 1 MHz FM+, but rated for extended temp (−40°C to +125°C) and offers WLCSP package option. | Better suited for under-hood automotive or high-temp industrial enclosures where ambient exceeds +85°C. | Choose for extended temperature operation; pinout matches AT24C02D but requires validation of WP behavior and AC timing margins. |
Compared with AT24C02C-SSHM-T, AT24C02D-XHM-T saves >70% board area in UDFN-8; versus M24C02-RMN6TP, it offers tighter industrial temp spec and Microchip's proven EEPROM reliability, but lacks extended high-temp qualification.
Availability
AT24C02D-XHM-T is available at Aetrix Electronics and suitable for industrial sensor calibration, smart meter firmware storage, and IoT edge device identity applications requiring stable component supply, RoHS compliance, and long-lifecycle support.
Supply support for AT24C02D-XHM-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog, FPGA, and memory solutions, with global manufacturing and quality certifications including ISO 9001 and IATF 16949.
The AT24C02D belongs to Microchip's serial EEPROM product line, designed specifically for low-voltage, low-power nonvolatile data storage in space-constrained embedded systems across industrial, automotive, and consumer markets.
FAQ
What is the maximum I²C clock frequency supported by AT24C02D-XHM-T?
The AT24C02D-XHM-T supports 100 kHz (Standard Mode), 400 kHz (Fast Mode), and 1 MHz (Fast Mode Plus). Fast Mode Plus operation requires VCC ≥ 2.5 V and is validated per I²C-bus specification UM10204. At 1 MHz, tLOW/tHIGH minimums are 500 ns each, and input rise/fall times must be ≤100 ns. The AT24C02D-XHM-T meets these timing requirements across its full operating voltage and temperature range.
Does AT24C02D-XHM-T require external pull-up resistors on SDA and SCL lines?
Yes, AT24C02D-XHM-T requires external pull-up resistors on both SDA and SCL lines because its SDA pin is open-drain and SCL is a CMOS input. Microchip specifies maximum pull-up resistance values: 10 kΩ for 100 kHz, 4 kΩ for 400 kHz, and 1.3 kΩ for 1 MHz operation. Pull-up to VCC is mandatory; resistor value must be selected based on bus capacitance and target speed to ensure tR/tF compliance per Table 4-3 in the datasheet.
How does the write-protect (WP) pin function on AT24C02D-XHM-T?
The WP pin on AT24C02D-XHM-T is an active-high hardware lock: when driven to VCC, it inhibits all write operations to the entire memory array; when tied to GND, normal writes are enabled. If left floating, the pin is internally pulled down to GND, enabling writes - but Microchip recommends hardwiring WP to a defined state due to capacitive coupling risks. The AT24C02D-XHM-T does not support block-level or software-based write protection.
What is the memory organization of AT24C02D-XHM-T, and how does page writing work?
AT24C02D-XHM-T organizes its 2,048 bits as 256 words of 8 bits each, grouped into 32 pages of 8 bytes. Page write mode allows up to 8 bytes to be written in a single I²C transaction, provided all addresses fall within the same 8-byte boundary (e.g., 0x00–0x07, 0x08–0x0F). Partial page writes are permitted - writing fewer than 8 bytes still consumes the full page write cycle time (≤5 ms). Crossing a page boundary requires a new Start condition.
Is AT24C02D-XHM-T qualified for automotive applications?
AT24C02D-XHM-T is specified for industrial temperature range (−40°C to +85°C) and is not AEC-Q200 qualified. While it may operate in some automotive body electronics contexts, Microchip does not guarantee performance or reliability under automotive stress testing (e.g., temperature cycling, vibration, ESD per ISO 10605). For automotive use, consider AEC-Q200-qualified alternatives like the AT24C02C-SSHM-T (SOIC-8) or ST's M24C02-RMN6TP, which explicitly supports −40°C to +125°C.
AT24C02D-XHM-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 4.5 µs
- Voltage - Supply:
- 1.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24C02D-XHM-T FAQ
1.How can I place an order for AT24C02D-XHM-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C02D-XHM-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C02D-XHM-T reliable?
The price and inventory of AT24C02D-XHM-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C02D-XHM-T is usually 5 days.
3.What payment methods are accepted for AT24C02D-XHM-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C02D-XHM-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C02D-XHM-T?
AT24C02D-XHM-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C02D-XHM-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C02D-XHM-T?
For technical support, including AT24C02D-XHM-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C02D-XHM-T requirements.
6.How does Aetrix verify that AT24C02D-XHM-T is sourced from the original manufacturer or authorized distributors?
All AT24C02D-XHM-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C02D-XHM-T meets industry standards.
7.What is the process for return or replacement of AT24C02D-XHM-T?
All AT24C02D-XHM-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24C02D-XHM-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C02D-XHM-T part is unused and in its original packaging.
Return procedure for AT24C02D-XHM-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C02D-XHM-T Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
