My Inquiry
My Account
Microchip Technology AT24C04AN-10SC-2.5
- Part No.:
- AT24C04AN-10SC-2.5
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT24C04AN-10SC-2.5.pdf
- Description:
- IC EEPROM 4KBIT I2C 400KHZ 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,863
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C04AN-10SC-2.5 from Microchip Technology (formerly Atmel) is a 4K-bit (512 × 8) I²C-compatible serial EEPROM with hardware write protection, low-voltage operation (2.5V to 5.5V), and 100 kHz clock compatibility at 2.5V. It features 16-byte page write capability, Schmitt-trigger inputs for noise immunity, and is housed in an 8-pin JEDEC SOIC package. It serves as nonvolatile configuration storage in embedded controllers, power management units, and sensor calibration modules.
For engineers reviewing the AT24C04AN-10SC-2.5 datasheet, AT24C04AN-10SC-2.5 pinout, AT24C04AN-10SC-2.5 application, or AT24C04AN-10SC-2.5 equivalent, key selection considerations include its 2.5V minimum supply, 16-byte page write limit, WP pin-based hardware protection, and compatibility with standard I²C timing at reduced voltage.
Technical Context
The AT24C04AN-10SC-2.5 implements a two-wire (I²C) serial interface with open-drain SDA and input-clocked SCL, supporting bidirectional data transfer and 9-bit device addressing with A2/A1 hardwired inputs (A0 is NC). Its internal memory is organized as 512 words of 8 bits across 256 pages of 2 bytes each, requiring a 9-bit word address for random access.
It uses acknowledge polling to detect write completion, supports partial page writes within 16-byte boundaries, and enters standby mode after STOP condition receipt or power-up. Write protection is asserted when WP = VCC, locking the upper 2K array - distinct from AT24C02/08 variants' protection schemes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4096 bits (512 × 8), organized as 256 pages × 2 bytes - enables efficient parameter storage with 9-bit addressing |
| Supply Voltage Range | 2.5V to 5.5V - supports direct interfacing with 2.5V logic domains without level shifting |
| Max Clock Frequency | 100 kHz at 2.5V - defines maximum I²C bus speed under low-voltage operation |
| Page Write Size | 16 bytes - limits burst write efficiency; crossing page boundary causes rollover within same page |
| Write Cycle Time | 10 ms max - determines minimum interval between write commands; blocks all inputs during cycle |
| Endurance | 1 million write cycles - specifies guaranteed reprogrammability before wear-out in field-deployed systems |
| Data Retention | 100 years - ensures long-term validity of stored calibration or configuration data at rated temperature |
Pinout & Package
AT24C04AN-10SC-2.5 is supplied in an 8-pin JEDEC SOIC (8S1) package, 0.150" wide, with gull-wing leads and standard 1.27 mm pitch. Pin 1 is marked by a beveled corner or notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | No Connect | Not bonded internally; must be left unconnected per datasheet - differs from AT24C02A where A0 is active |
| A1 | Device Address Input | Hardwired address bit; combines with A2 to select one of four possible addresses on shared I²C bus |
| A2 | Device Address Input | Hardwired address bit; enables up to four AT24C04A devices on same bus without address conflict |
| GND | Ground Reference | Return path for VCC and signal logic; requires low-impedance connection to minimize noise coupling |
| VCC | Power Supply | 2.5V–5.5V supply input; bypass capacitor (0.1 µF) recommended near pin for I²C noise immunity |
| WP | Write Protect Control | Hardware lock: tied to VCC disables all writes to upper 2K array; tied to GND enables full read/write |
| SCL | Serial Clock Input | Positive-edge sampled clock; open-drain compatible; requires external pull-up resistor (typically 4.7 kΩ) |
| SDA | Serial Data I/O | Bidirectional open-drain line; shared across I²C devices; requires same pull-up as SCL |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Write Protection | WP pin asserts protection at VCC, locking upper 2K array - prevents accidental firmware or calibration overwrite |
| Noise-Resilient Inputs | Schmitt-trigger + filtering on SCL/SDA - rejects >100 ns glitches, enabling reliable operation in electrically noisy industrial environments |
| Low-Voltage Compatibility | Guaranteed 100 kHz I²C operation down to 2.5V - eliminates need for voltage translators in mixed-supply systems |
| Page Write Efficiency | 16-byte page buffer - reduces I²C transaction count vs. byte-write; improves write throughput in configuration updates |
| High Reliability | 1M write cycles + 100-year data retention - validated for use in infrequently updated but mission-critical settings (e.g., medical device calibration) |
Applications
| Industrial Sensor Calibration | Embedded Power Management |
|---|---|
Use Scenario: Storing factory-trimmed offset/gain coefficients and temperature compensation tables for analog sensor front-ends. IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed during system boot or sensor initialization via I²C. Use Value: Enables plug-and-play sensor replacement with preloaded calibration; eliminates host MCU storage overhead and field recalibration. |
Use Scenario: Holding user-defined power sequencing delays, fault thresholds, and soft-start parameters in DC-DC controller modules. IC Role / Device Role / Timing Role: Persistent parameter bank read at power-on-reset to configure PMIC behavior before rail stabilization. Use Value: Supports customizable power architecture without firmware modification; retains settings across cold starts and brownouts. |
| Consumer Device Settings Storage | Network Equipment Configuration |
Use Scenario: Saving user preferences (volume, display brightness, language) and usage counters in smart home hubs and audio receivers. IC Role / Device Role / Timing Role: Low-power I²C slave storing infrequently written but frequently read operational state. Use Value: Maintains settings through battery removal or AC loss; leverages 3 µA standby current at 2.5V for extended backup runtime. |
Use Scenario: Storing MAC address, board revision, and port mapping in Ethernet switches and PoE injectors. IC Role / Device Role / Timing Role: Factory-programmed identity and configuration store accessed during PHY initialization sequence. Use Value: Enables unique device identification and topology-aware firmware loading without external programming infrastructure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C04D-SSHM-T | Same 4K-bit capacity and 2.5V–5.5V range, but uses newer AT24C04D die with enhanced ESD (>4kV HBM) and tighter tAA (0.9 µs max at 5V). | Drop-in replacement for new designs; not qualified for legacy automotive temp ranges (-40°C to +85°C only, no extended -40°C to +125°C option). | Select AT24C04D-SSHM-T for higher robustness in consumer IoT; retain AT24C04AN-10SC-2.5 for legacy industrial designs requiring proven qualification. |
| BR24G04NUX-10 | Rohm's 4K-bit I²C EEPROM with identical 2.5V–5.5V range and 100 kHz speed, but offers 2.2V min operation and faster 3.5 ms write cycle. | Supports deeper brownout recovery; however, WP functionality maps differently (active-low enable vs. AT24C04AN's VCC-asserted lock). | Choose BR24G04NUX-10 when system operates below 2.5V or requires sub-10 ms write latency; verify WP logic alignment in firmware. |
Compared with AT24C04D-SSHM-T and BR24G04NUX-10, the AT24C04AN-10SC-2.5 provides mature industrial qualification, deterministic 10 ms write timing, and explicit upper-half array protection - making it preferred for safety-critical calibration storage where behavior predictability outweighs marginal speed gains.
Availability
AT24C04AN-10SC-2.5 is available at Aetrix Electronics and suitable for industrial sensor calibration, embedded power management, and consumer device settings storage requiring stable component supply across multi-year production cycles.
Supply support for AT24C04AN-10SC-2.5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full support for the AT24Cxx family. The company specializes in microcontrollers, analog, and memory solutions for industrial, automotive, and consumer markets.
The AT24C04AN-10SC-2.5 belongs to Microchip's legacy serial EEPROM product line, designed specifically for low-power, space-constrained systems needing reliable nonvolatile storage with minimal I²C footprint and hardware-level write security.
FAQ
What is the exact memory organization of the AT24C04AN-10SC-2.5?
The AT24C04AN-10SC-2.5 contains 4096 bits organized as 512 words of 8 bits each, internally structured as 256 pages × 2 bytes. This requires a 9-bit word address for random access and supports 16-byte page writes. The AT24C04AN-10SC-2.5 does not use A0 - only A2 and A1 are functional for device addressing, allowing up to four devices on one I²C bus.
How does the Write Protect (WP) pin function on the AT24C04AN-10SC-2.5?
On the AT24C04AN-10SC-2.5, the WP pin enables hardware write protection: when pulled high to VCC, it locks the upper 2K-bit (2048-bit) portion of memory against writes while permitting full read access. When grounded, normal read/write operations are enabled across the entire 4K-bit array. This behavior is specific to the AT24C04A series and differs from AT24C02A (upper 1K protected) and AT24C08A (full 8K protected).
Can the AT24C04AN-10SC-2.5 operate reliably at 2.5V with standard I²C timing?
Yes - the AT24C04AN-10SC-2.5 is explicitly rated for 100 kHz I²C operation at VCC = 2.5V, with guaranteed tLOW/tHIGH of 4.7 µs/4.0 µs and noise suppression time of 100 ns. Its Schmitt-trigger inputs and filtered design ensure robust communication in low-voltage systems without requiring external level shifters or timing adjustments.
What package type and dimensions does the AT24C04AN-10SC-2.5 use?
The AT24C04AN-10SC-2.5 uses an 8-pin JEDEC SOIC package (designated 8S1), 0.150" wide, with 1.27 mm lead pitch and gull-wing leads. Overall dimensions are 4.9 mm × 3.9 mm × 1.75 mm (L × W × H), compliant with MS-012 standard. Pin 1 is identified by a beveled corner or notch on the package body.
Is the AT24C04AN-10SC-2.5 suitable for automotive applications?
No - the AT24C04AN-10SC-2.5 is specified for commercial (0°C to +70°C) or industrial (-40°C to +85°C) temperature ranges only. While it meets AEC-Q200 stress test recommendations in some configurations, it lacks formal automotive qualification (e.g., AEC-Q100 Grade 2 or 3). For automotive use, Microchip recommends the AT24C04C variant with extended temperature and qualification support.
AT24C04AN-10SC-2.5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT24C04AN-10SC-2.5 FAQ
1.How can I place an order for AT24C04AN-10SC-2.5 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C04AN-10SC-2.5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C04AN-10SC-2.5 reliable?
The price and inventory of AT24C04AN-10SC-2.5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C04AN-10SC-2.5 is usually 5 days.
3.What payment methods are accepted for AT24C04AN-10SC-2.5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C04AN-10SC-2.5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C04AN-10SC-2.5?
AT24C04AN-10SC-2.5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C04AN-10SC-2.5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C04AN-10SC-2.5?
For technical support, including AT24C04AN-10SC-2.5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C04AN-10SC-2.5 requirements.
6.How does Aetrix verify that AT24C04AN-10SC-2.5 is sourced from the original manufacturer or authorized distributors?
All AT24C04AN-10SC-2.5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C04AN-10SC-2.5 meets industry standards.
7.What is the process for return or replacement of AT24C04AN-10SC-2.5?
All AT24C04AN-10SC-2.5 units undergo pre-shipment inspection (PSI). If there is an issue with AT24C04AN-10SC-2.5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C04AN-10SC-2.5 part is unused and in its original packaging.
Return procedure for AT24C04AN-10SC-2.5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C04AN-10SC-2.5 Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
