Microchip Technology AT24C04BN-SH-B

Overview

AT24C04BN-SH-B from Microchip Technology (formerly Atmel) is a 4-kbit two-wire serial EEPROM organized as 512 words × 8 bits, operating from 1.8 V to 5.5 V, featuring hardware write protection via the WP pin, 16-byte page write capability, and 1 MHz I²C compatibility at 5 V. It is used for nonvolatile parameter storage in embedded controllers, sensor calibration modules, and power management ICs.

For engineers reviewing the AT24C04BN-SH-B datasheet, AT24C04BN-SH-B pinout, AT24C04BN-SH-B application, or AT24C04BN-SH-B equivalent, key selection criteria include its 1.8 V–5.5 V supply range, 4K bit density with A2/A1 address inputs, JEDEC SOIC-8 package (8S1), 1 million write cycles endurance, and industrial temperature rating (–40°C to +85°C).

Technical Context

The AT24C04BN-SH-B implements a standard two-wire (I²C-compatible) interface with Schmitt-triggered, noise-filtered SCL/SDA inputs and open-drain SDA output. It uses hard-wired A2 and A1 pins for device addressing-enabling up to four devices on one bus-with A0 as no-connect.

Internally, it features a 9-bit word address counter, 32 pages of 16 bytes each, self-timed 5 ms max write cycle, and high-reliability EEPROM cell technology delivering 100-year data retention and 1 million write cycles at 25°C.

Key Specifications

Pinout & Package

AT24C04BN-SH-B is supplied in an 8-lead JEDEC SOIC package (package code 8S1), measuring 4.9 mm × 3.9 mm × 1.75 mm (max height), with gull-wing leads and NiPdAu lead finish. Pin 1 is marked by a notch or dot at the top-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT24C04BN-SH-B, AT24C04D-SSHM-T offers improved ESD tolerance and faster access timing, while M24C04-RMN6TP trades hardware WP for broader supplier availability - making AT24C04BN-SH-B optimal where deterministic, pin-level write lock is mandatory in legacy or cost-sensitive industrial designs.

Availability

AT24C04BN-SH-B is available at Aetrix Electronics and suitable for smart energy meters, industrial PLC modules, and automotive body controllers requiring stable component supply, long-term lifecycle support, and industrial-temperature-rated nonvolatile memory.

Supply support for AT24C04BN-SH-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with deep expertise in embedded control and secure data storage.

The AT24C04BN-SH-B belongs to Microchip's AT24Cxx family of I²C-compatible serial EEPROMs, designed specifically for reliable, low-power, pin-efficient nonvolatile storage in resource-constrained embedded systems.

FAQ

What is the memory organization of the AT24C04BN-SH-B?

The AT24C04BN-SH-B contains 4096 bits of EEPROM memory, internally organized as 512 words × 8 bits. It is divided into 32 pages of 16 bytes each, supporting both byte-write and 16-byte page-write operations. This structure enables efficient firmware updates and parameter logging without excessive I²C overhead. The AT24C04BN-SH-B uses a 9-bit word address for random access, with hardware address bits A2 and A1 determining its I²C slave address on the bus.

Does the AT24C04BN-SH-B require external pull-up resistors on SDA and SCL lines?

Yes, the AT24C04BN-SH-B requires external pull-up resistors on both SDA and SCL lines because its SDA pin is open-drain and SCL is a Schmitt-trigger input with no internal pull-up. Typical values range from 2.2 kΩ to 10 kΩ depending on bus capacitance and speed - 4.7 kΩ is commonly used for 400 kHz operation. The AT24C04BN-SH-B will not communicate reliably without these resistors, as the I²C bus relies on passive pull-ups to establish HIGH logic levels.

What is the function of the WP pin on the AT24C04BN-SH-B?

The WP (Write Protect) pin on the AT24C04BN-SH-B is an active-high hardware lock that disables all write operations to the entire memory array when pulled to VCC. When WP is grounded, normal read and write functions operate. This feature prevents accidental or malicious overwrites during power transitions, firmware updates, or system resets - a critical safeguard in safety- or mission-critical applications. The AT24C04BN-SH-B does not support partial-array protection; WP affects the full 4K memory space.

Can the AT24C04BN-SH-B operate at 1.8 V and still achieve 1 MHz I²C speed?

No, the AT24C04BN-SH-B supports 1 MHz I²C clock frequency only at VCC = 5.0 V. At 1.8 V, its maximum supported clock speed is 400 kHz, as specified in the AC characteristics table. Attempting 1 MHz operation at 1.8 V may result in timing violations, failed ACKs, or data corruption. For full-speed 1 MHz operation, VCC must be ≥4.5 V. The AT24C04BN-SH-B's dual-speed specification ensures interoperability across voltage domains while maintaining signal integrity.

Is the AT24C04BN-SH-B pin-compatible with the AT24C08B series?

No, the AT24C04BN-SH-B is not pin-compatible with AT24C08B variants despite sharing the same SOIC-8 package. While both use pins A2, A1, A0, GND, SDA, SCL, WP, and VCC, the AT24C04BN-SH-B treats A0 as NC (no-connect), whereas AT24C08B uses A2 only and leaves A1/A0 as NC. More critically, their device addressing schemes differ: AT24C04BN-SH-B responds to 1010xx0 addresses (2-bit hardware), while AT24C08B uses 1010x00 (1-bit hardware). Swapping them without firmware changes will cause communication failure.