Microchip Technology AT24C04BY6-YH-T

Overview

AT24C04BY6-YH-T from Microchip Technology is a 4-kbit (512 × 8) two-wire serial EEPROM with 1.8 V to 5.5 V operation, 400 kHz I²C interface at 1.8 V, hardware write-protect (WP) pin, and 16-byte page write capability. It delivers high-reliability nonvolatile storage for firmware parameter retention in space-constrained industrial controllers and embedded sensor nodes.

For engineers reviewing the AT24C04BY6-YH-T datasheet, AT24C04BY6-YH-T pinout, AT24C04BY6-YH-T application, or AT24C04BY6-YH-T equivalent, key selection criteria include its MLP 2×3 mm DFN package, 1 million write cycles endurance, 100-year data retention, and compatibility with low-voltage microcontroller I²C buses operating down to 1.8 V.

Technical Context

The AT24C04BY6-YH-T implements a standard two-wire (I²C-compatible) serial interface with Schmitt-triggered, noise-filtered SDA and SCL inputs. Its internal architecture includes a 9-bit word address counter, 32-page memory organization (16 bytes/page), and hardware-based write protection via the WP pin tied to VCC or GND.

It supports byte and page write modes, self-timed internal write cycles (≤5 ms), and acknowledge polling for completion detection. Device addressing uses hardwired A2/A1 pins (A0 is NC), enabling up to four AT24C04B devices on a single bus - distinct from the AT24C08B's A2-only addressing scheme.

Key Specifications

Pinout & Package

AT24C04BY6-YH-T is housed in an 8-lead Ultra-Thin Mini-MAP (MLP 2×3 mm, 0.5 mm pitch) dual no-lead package with exposed thermal pad (non-functional, optional ground tie). Pin 1 is marked by a dot in the top-left corner of the package body.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT24C04D-SSHM-T and BR24G04FJ-3GE2, the AT24C04BY6-YH-T uniquely combines ultra-compact MLP packaging, full A2/A1 address support for multi-drop bus design, and guaranteed 400 kHz operation at 1.8 V - making it optimal for next-generation space- and power-constrained embedded systems.

Availability

AT24C04BY6-YH-T is available at Aetrix Electronics and suitable for industrial sensor calibration, smart meter firmware storage, and IoT edge node configuration requiring stable component supply and long-term lifecycle assurance.

Supply support for AT24C04BY6-YH-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions for industrial, automotive, and consumer markets.

The AT24C04B series is part of Microchip's serial EEPROM product line, designed specifically for low-voltage, high-reliability nonvolatile data storage in resource-constrained embedded systems.

FAQ

What is the maximum I²C clock frequency supported by the AT24C04BY6-YH-T at 1.8 V?

The AT24C04BY6-YH-T supports up to 400 kHz I²C clock frequency when operated at 1.8 V, as specified in Table 4 of the official datasheet. This matches the standard Fast-mode I²C specification and ensures interoperability with low-voltage microcontrollers such as the STM32L0 or MSP430FRxx families. The AT24C04BY6-YH-T achieves this timing using internal noise filtering and Schmitt-trigger inputs to maintain signal integrity despite reduced voltage margins.

Does the AT24C04BY6-YH-T require external pull-up resistors on SDA and SCL lines?

Yes, the AT24C04BY6-YH-T requires external pull-up resistors on both SDA and SCL lines because its I/O pins are open-drain. Typical values range from 2.2 kΩ to 10 kΩ depending on bus capacitance and desired rise time; for the 2.0 × 3.0 mm MLP package's low parasitic capacitance, 4.7 kΩ is commonly used. These resistors must connect to the same VCC rail used by the AT24C04BY6-YH-T to ensure proper logic levels and avoid bus contention.

How is device addressing configured on the AT24C04BY6-YH-T?

The AT24C04BY6-YH-T uses hardware address pins A2 and A1 to set bits 1 and 0 of the 7-bit I²C device address (1010 A2 A1 P0 R/W), while A0 is a no-connect. Since the AT24C04BY6-YH-T package does not expose A0 or A1, these pins are internally tied off - resulting in a fixed base address of 0x50 (binary 1010000) when A2=A1=0. This allows one AT24C04BY6-YH-T per I²C bus unless external A2/A1 wiring is implemented via alternative packages.

What is the function of the WP pin on the AT24C04BY6-YH-T?

The WP (Write Protect) pin on the AT24C04BY6-YH-T provides hardware-level write inhibition: when pulled high to VCC, it locks the entire 4K memory array against write or erase operations, preserving stored data even during unintended I²C traffic. When grounded, full read/write access is enabled. This feature is critical for safeguarding factory-programmed calibration data or security keys in production firmware - and is implemented without consuming MCU GPIO resources.

Is the AT24C04BY6-YH-T compatible with the AT24C08B family in terms of pinout and software interface?

No, the AT24C04BY6-YH-T is not software- or pin-compatible with the AT24C08B family. While both share identical pin functions (VCC, GND, SCL, SDA, WP, A0–A2), the AT24C04BY6-YH-T uses A2 and A1 for device addressing and treats A0 as NC, whereas the AT24C08B uses only A2 and leaves A1/A0 as NC. Additionally, their memory maps differ (9-bit vs. 10-bit addressing), requiring distinct driver initialization and address calculation logic - direct substitution will cause communication failure.