Microchip Technology AT24C04C-XPD-T
- Part No.:
- AT24C04C-XPD-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24C04C-XPD-T.pdf
- Description:
- IC EEPROM 4KBIT I2C 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24C04C-XPD-T from Microchip Technology (formerly Atmel) is a 4-kilobit (512 × 8) automotive-grade I²C serial EEPROM with 16-byte page write capability, 1.7V–5.5V operation (Grade 3), and -40°C to +85°C temperature range. It features hardware write protection via the WP pin, Schmitt-trigger inputs for noise immunity, and 1,000,000 write cycles endurance - deployed in vehicle body control modules for configuration storage.
For engineers reviewing the AT24C04C-XPD-T datasheet, AT24C04C-XPD-T pinout, AT24C04C-XPD-T application, or AT24C04C-XPD-T equivalent, key selection criteria include its TSSOP-8 package, A2/A1 address pin configuration (A0 = NC), 400 kHz I²C clock support at 2.5V, self-timed 5 ms max write cycle, and Grade 3 automotive qualification per AEC-Q100.
Technical Context
The AT24C04C-XPD-T implements a standard two-wire I²C interface with fixed 7-bit device address prefix '1010', where A2 and A1 pins determine the lower two address bits (A0 is no-connect). Its memory is organized into 32 pages of 16 bytes each, requiring a 9-bit word address for random access.
Internal architecture includes serial control logic, high-voltage pump/timing circuitry for EEPROM programming, and data recovery circuitry. Write operations support both byte and 16-byte page modes; partial page writes are permitted, and acknowledge polling enables host synchronization after write completion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4,096 bits (512 words × 8 bits), organized as 32 pages × 16 bytes |
| I²C Clock Frequency | Up to 400 kHz at VCC = 2.5V; supports standard-mode I²C protocol |
| Supply Voltage Range | 1.7V to 5.5V - enables direct interfacing with 1.8V, 2.5V, 3.3V, and 5V microcontrollers |
| Write Endurance | 1,000,000 write cycles - ensures long-term reliability in frequent calibration or logging applications |
| Data Retention | 100 years at +25°C - guarantees nonvolatile storage integrity over full vehicle lifecycle |
| Operating Temperature | -40°C to +85°C (Grade 3, AEC-Q100 qualified) - suitable for cabin and non-engine-bay automotive environments |
| Write Cycle Time | Max 5 ms self-timed internal write - eliminates need for fixed delay; host uses ACK polling to detect completion |
Pinout & Package
AT24C04C-XPD-T is housed in an 8-lead TSSOP (Thin Shrink Small Outline Package), 4.4 mm body width, lead-free/halogen-free NiPdAu finish, tape-and-reel packaging (5,000 units/reel).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A2 | Device Address Input | Hardwired address bit; determines one of four possible I²C addresses on shared bus (A2/A1 used; A0 = NC) |
| A1 | Device Address Input | Hardwired address bit; enables up to four AT24C04C devices on same I²C bus without address conflict |
| A0 | No Connect | Not bonded internally; must be left unconnected or tied to GND/VCC - no functional impact |
| GND | Ground Reference | Return path for all digital and internal charge-pump circuits; requires low-impedance PCB connection |
| VCC | Power Supply | Single supply input (1.7–5.5V); powers logic, interface, and EEPROM array; internal POR activates below min VCC |
| WP | Write Protect Control | Active-high hardware lock: tied to VCC disables all writes; tied to GND enables normal read/write |
| SCL | Serial Clock Input | Open-drain input synchronized to I²C master clock; Schmitt-triggered for robust noise rejection |
| SDA | Serial Data I/O | Open-drain bidirectional line; requires external pull-up; supports multi-master arbitration and ACK/NACK signaling |
Key Features
| Feature | Design Value |
|---|---|
| 16-byte Page Write Mode | Reduces I²C transaction overhead by enabling burst writes across one memory page - cuts bus time vs. eight separate byte writes |
| Schmitt Trigger Inputs | Suppresses high-frequency noise on SCL/SDA lines, preventing false clocking or data corruption in electrically noisy automotive harness environments |
| Hardware Write Protection | WP pin provides fail-safe, pin-level disable of all write operations - critical for preventing accidental firmware or calibration overwrite during field updates |
| AEC-Q100 Grade 3 Qualification | Validated for automotive use at -40°C to +85°C, including HTOL, TC, and ESD testing - meets OEM requirements for interior electronics |
| Low Standby Current | Max 3.0 μA at VCC = 1.7V - minimizes battery drain in always-on vehicle subsystems such as door modules or seat controllers |
Applications
| Body Control Module (BCM) Configuration Storage | Instrument Cluster Calibration Data |
|---|---|
Use Scenario: Storing user-configurable settings (e.g., mirror position, lighting preferences) and factory calibration offsets in BCMs that power cycle frequently. IC Role / Device Role / Timing Role: Nonvolatile parameter retention between ignition cycles; accessed via I²C during boot initialization. Use Value: Enables zero-latency recall of personalized settings without relying on backup batteries or supercapacitors. | Use Scenario: Holding analog sensor trim values (e.g., speedometer offset, fuel gauge linearity) updated during end-of-line calibration. IC Role / Device Role / Timing Role: Write-once-during-manufacturing + occasional field recalibration; accessed during cluster power-up sequence. Use Value: Eliminates manual potentiometer adjustment; supports automated calibration via CAN-based tester tools. |
| Telematics Unit Event Logging | Infotainment System Language Pack Storage |
Use Scenario: Recording diagnostic events (e.g., airbag deployment flag, low-battery warnings) for post-incident analysis in telematics control units. IC Role / Device Role / Timing Role: Infrequent but critical write operations triggered by safety-critical interrupts; reads occur during diagnostics session. Use Value: Provides tamper-resistant, power-fail-safe logging independent of main MCU flash wear leveling behavior. | Use Scenario: Storing localized UI strings and font assets for multi-language infotainment systems where NAND flash wear is a concern. IC Role / Device Role / Timing Role: Read-mostly storage accessed at boot; writes only during OTA language update - typically <100 lifetime writes. Use Value: Offloads small, static data from high-endurance NAND, extending overall system storage lifetime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STMicroelectronics M24C04-RMN6TP | Same 4K density, TSSOP-8, 1.7–5.5V, but rated for industrial (-40°C to +85°C), not AEC-Q100 qualified | Lacks automotive qualification; unsuitable for OEM production in vehicle interior modules requiring AEC compliance | Select when cost sensitivity outweighs formal automotive qualification; verify board-level ESD/noise immunity separately |
| ON Semiconductor CAT24C04HU4I-GT3 | Identical 4K, TSSOP-8, AEC-Q100 Grade 3, 1.7–5.5V, but supports 1 MHz Fast-mode I²C (vs. 400 kHz) | Enables faster firmware update transfers in high-throughput production test; no runtime benefit in typical automotive I²C buses | Choose when production line programming speed is critical; otherwise, AT24C04C-XPD-T offers proven field reliability at lower cost |
Compared with M24C04-RMN6TP and CAT24C04HU4I-GT3, the AT24C04C-XPD-T delivers certified automotive reliability at standard I²C speeds, while avoiding over-specification for applications where 1 MHz bandwidth is unnecessary - balancing qualification assurance, cost, and design simplicity.
Availability
AT24C04C-XPD-T is available at Aetrix Electronics and suitable for automotive body electronics, instrument clusters, and telematics systems requiring stable component supply, AEC-Q100 compliance, and long-term manufacturing continuity.
Supply support for AT24C04C-XPD-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and qualification for the AT24CxxC EEPROM family.
The AT24C04C-XPD-T belongs to Microchip's automotive serial EEPROM product line, designed specifically for reliable, low-power nonvolatile storage in harsh vehicular environments where voltage variation, temperature extremes, and EMI resilience are mandatory.
FAQ
What is the maximum I²C clock frequency supported by the AT24C04C-XPD-T?
The AT24C04C-XPD-T supports up to 400 kHz I²C clock frequency at VCC = 2.5V. While DC specifications extend to 5.5V, AC timing parameters (tLOW, tHIGH, etc.) are characterized for standard-mode operation only - it does not support Fast-mode (1 MHz) or higher. This aligns with typical automotive microcontroller I²C peripheral limits and ensures robust communication under electrical noise.
Is the AT24C04C-XPD-T pin-compatible with other members of the AT24CxxC family?
Yes, the AT24C04C-XPD-T shares identical pinout and function mapping with AT24C01C-XPD-T, AT24C02C-XPD-T, and AT24C08C-XPD-T in the same TSSOP-8 package. However, address pin usage differs: AT24C04C uses A2/A1 (A0 = NC), whereas AT24C08C uses only A2. System designers must verify device addressing and memory map alignment before substitution.
How does the Write Protect (WP) pin function on the AT24C04C-XPD-T?
When the WP pin is driven high (to VCC), the AT24C04C-XPD-T disables all write operations - including byte, page, and sequential writes - protecting the entire memory array. When WP is low (GND), normal read/write functionality resumes. This hardware-level lock operates independently of I²C commands and remains active across power cycles, providing deterministic data integrity.
What is the memory organization of the AT24C04C-XPD-T?
The AT24C04C-XPD-T contains 4,096 bits organized as 512 words × 8 bits, structured into 32 pages of 16 bytes each. It requires a 9-bit word address for random access. Page boundaries are aligned at 16-byte intervals (e.g., addresses 0x00–0x0F form page 0), and page write operations automatically wrap within the current page - critical for correct firmware update sequencing.
Does the AT24C04C-XPD-T require an external pull-up resistor on the SDA and SCL lines?
Yes, the AT24C04C-XPD-T requires external pull-up resistors on both SDA and SCL lines because its I²C interface uses open-drain outputs. Recommended values are 1.3 kΩ for VCC = 2.5V/5.5V and 10 kΩ for VCC = 1.7V, per datasheet AC test conditions. Proper pull-up strength ensures valid logic levels, timing compliance, and noise margin in automotive wiring harness environments.
AT24C04C-XPD-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24C04C-XPD-T FAQ
1.How can I place an order for AT24C04C-XPD-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C04C-XPD-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C04C-XPD-T reliable?
The price and inventory of AT24C04C-XPD-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C04C-XPD-T is usually 5 days.
3.What payment methods are accepted for AT24C04C-XPD-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C04C-XPD-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C04C-XPD-T?
AT24C04C-XPD-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C04C-XPD-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C04C-XPD-T?
For technical support, including AT24C04C-XPD-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C04C-XPD-T requirements.
6.How does Aetrix verify that AT24C04C-XPD-T is sourced from the original manufacturer or authorized distributors?
All AT24C04C-XPD-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C04C-XPD-T meets industry standards.
7.What is the process for return or replacement of AT24C04C-XPD-T?
All AT24C04C-XPD-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24C04C-XPD-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C04C-XPD-T part is unused and in its original packaging.
Return procedure for AT24C04C-XPD-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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