Microchip Technology AT24C04D-PUM
- Part No.:
- AT24C04D-PUM
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
AT24C04D-PUM.pdf
- Description:
- IC EEPROM 4KBIT I2C 1MHZ 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,484
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C04D-PUM from Microchip Technology (formerly Atmel) is a 4-Kbit I²C-compatible serial EEPROM organized as 512 × 8 bits, operating from 1.7V to 3.6V with hardware write protection via the WP pin, 16-byte page write capability, and ultra-low standby current (0.8 μA max). It serves as nonvolatile configuration storage in embedded microcontroller systems requiring robust data retention and noise-immune bus communication.
For engineers reviewing the AT24C04D-PUM datasheet, AT24C04D-PUM pinout, AT24C04D-PUM application, or AT24C04D-PUM equivalent, key selection considerations include its 1.7–3.6 V supply range, I²C Fast Mode Plus (1 MHz at 2.5–3.6 V), Schmitt-triggered inputs for noise suppression, hardware write-protect functionality, and support for cascaded multi-device bus topologies up to four units.
Technical Context
The AT24C04D-PUM implements a true I²C slave interface with bidirectional open-drain SDA and input-only SCL, supporting Standard (100 kHz), Fast (400 kHz), and Fast Mode Plus (1 MHz) speeds depending on VCC level. Its internal address counter enables Current Address Read, Random Read, and Sequential Read modes without external address latching.
It features an integrated high-voltage generation circuit for EEPROM programming, self-timed write cycles completing within 5 ms max, and automatic internal address rollover during sequential reads. The device uses proprietary strong internal pull-downs on A1/A2/WP pins when unconnected-requiring explicit biasing for deterministic addressing and write protection behavior.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4,096 bits (512 × 8), enabling storage of firmware calibration tables or device-specific configuration data in compact space-constrained designs. |
| Supply Voltage Range | 1.7 V to 3.6 V - supports direct interfacing with low-power MCUs and battery-backed systems without level-shifting. |
| I²C Speed Modes | 100 kHz (1.7–3.6 V), 400 kHz (1.7–3.6 V), 1 MHz (2.5–3.6 V) - allows bandwidth scaling based on system voltage and timing margin requirements. |
| Write Cycle Time | ≤5 ms max - defines minimum inter-write interval; supports Acknowledge Polling to avoid fixed delays in time-critical firmware. |
| Endurance & Retention | 1,000,000 write cycles / 100 years data retention - ensures long-term reliability in field-deployed industrial controllers and metering devices. |
| Standby Current | 0.8 μA max at 3.6 V - critical for always-on IoT nodes where quiescent power must remain sub-1 μA. |
| Page Write Size | 16 bytes per page - enables efficient bulk writes (e.g., updating sensor calibration blocks) while preventing unintended cross-page overwrites. |
Pinout & Package
AT24C04D-PUM is supplied in an 8-lead SOIC package (Pb-free, RoHS-compliant) with standard pinout and thermal characteristics suitable for reflow soldering and automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: NC | No Connect | Not bonded internally; may be tied to GND or left floating with no functional impact. |
| 2: A1 | Hardware Address Input | Defines bit 5 of 7-bit I²C slave address; pulled down internally if unconnected - must be explicitly biased for multi-device bus configuration. |
| 3: A2 | Hardware Address Input | Defines bit 6 of 7-bit I²C slave address; same internal pull-down behavior as A1 - required for selecting one of up to four devices on shared bus. |
| 4: GND | Ground Reference | System ground return path; must be low-impedance and co-located with MCU ground for noise immunity. |
| 5: SDA | Serial Data I/O | Open-drain bidirectional line; requires external pull-up resistor ≤10 kΩ and supports wire-OR with other I²C devices. |
| 6: SCL | Serial Clock Input | Master-generated clock; rising edge latches input data, falling edge outputs data - must be pulled high externally when idle. |
| 7: WP | Write Protect Input | Active-high hardware lock: logic high (VCC) disables all writes; logic low (GND) enables full-array programming - immune to software corruption. |
| 8: VCC | Power Supply | 1.7–3.6 V supply input; invalid voltages cause undefined operation - decoupling capacitor (0.1 μF) required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-triggered, filtered inputs | Enables reliable I²C operation in electrically noisy environments (e.g., motor drives, industrial PLCs) without external RC filtering. |
| Hardware write protection (WP pin) | Prevents accidental or malicious firmware overwrite during power-up, brown-out, or reset sequences - no software dependency required. |
| 16-byte page write with partial write support | Allows atomic updates of configuration blocks smaller than full page, reducing risk of data corruption during interrupted writes. |
| Internal address counter with rollover | Eliminates need for external address tracking in sequential read applications like boot-time parameter streaming. |
| Cascadable I²C addressing (up to 4 devices) | Reduces BOM count and PCB routing complexity in multi-sensor modules by sharing single I²C bus across multiple EEPROMs. |
Applications
| Industrial Sensor Calibration | Consumer Appliance Configuration |
|---|---|
|
Use Scenario: Storing temperature compensation coefficients and factory-trimmed ADC offsets in a smart pressure sensor node. IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed at power-up and during field recalibration via I²C. Use Value: Enables plug-and-play sensor replacement with zero manual setup; 100-year retention guarantees calibration integrity over product lifetime. |
Use Scenario: Holding user preferences (e.g., display brightness, language, timer defaults) in a microwave oven control board. IC Role / Device Role / Timing Role: Persistent settings memory updated only on menu changes, read at boot. Use Value: Survives frequent AC cycling and brownouts; 0.8 μA standby current prevents battery drain in backup RTC circuits. |
| Medical Device Parameter Storage | Automotive Body Control Module |
|
Use Scenario: Recording usage logs and safety-critical operational limits in a portable infusion pump. IC Role / Device Role / Timing Role: Tamper-resistant audit trail storage with hardware write-lock enabled during normal operation. Use Value: WP pin hardwired to VCC ensures regulatory compliance with data integrity requirements - no firmware vulnerability surface. |
Use Scenario: Saving seat/mirror position presets and lighting profiles in a vehicle door module. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 3.3 V automotive MCU without level shifters. Use Value: 1.7 V operation supports cold-cranking scenarios; 1M write cycles exceed lifetime actuation count of memory buttons. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MICROCHIP AT24C04C-SSHM-T | Same 4-Kbit capacity, 1.7–5.5 V supply range, but rated for -40°C to +125°C and offered in SOIC-8 with different marking and tape/reel packaging. | Preferred for extended temperature automotive or under-hood applications where AT24C04D-PUM's -40°C to +85°C rating is insufficient. | Select AT24C04C-SSHM-T when operating above 85°C ambient or requiring AEC-Q200 alignment; verify WP pin behavior matches design intent. |
| ON SEMICONDUCTOR CAT24C04HU4I-GT3 | Pin-compatible 4-Kbit I²C EEPROM with identical SOIC-8 footprint, 1.7–5.5 V operation, and 1 MHz Fast Mode Plus support, but specifies 10 μA max standby current (vs. 0.8 μA). | Better suited for cost-sensitive consumer products where ultra-low standby is not mandatory and higher production volumes justify alternate sourcing. | Choose CAT24C04HU4I-GT3 for price-driven BOM optimization in high-volume white goods; confirm noise immunity meets system EMI requirements. |
Compared with AT24C04D-PUM, AT24C04C-SSHM-T extends temperature range and supply headroom at the cost of slightly higher standby current, while CAT24C04HU4I-GT3 offers broader voltage tolerance and lower unit cost but trades off 12.5× higher standby draw - making AT24C04D-PUM optimal for battery-powered or thermally constrained designs demanding sub-1 μA quiescence.
Availability
AT24C04D-PUM is available at Aetrix Electronics and suitable for industrial sensor calibration, medical device parameter storage, and automotive body control modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for AT24C04D-PUM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full technical and manufacturing continuity for the AT24Cxx EEPROM family, delivering high-reliability nonvolatile memory solutions for industrial and automotive markets.
The AT24C04D-PUM belongs to Microchip's serial EEPROM product line, designed specifically for low-voltage, low-power embedded systems needing robust, pin-efficient configuration storage with hardware-level data protection.
FAQ
What is the maximum I²C clock frequency supported by the AT24C04D-PUM?
The AT24C04D-PUM supports 100 kHz Standard Mode across its full 1.7–3.6 V range, 400 kHz Fast Mode also from 1.7–3.6 V, and 1 MHz Fast Mode Plus only at 2.5–3.6 V. Operation above 400 kHz below 2.5 V is not guaranteed per the datasheet. This tiered speed support allows designers to maximize throughput where voltage margins permit, while maintaining compatibility in low-VCC legacy systems.
How does the WP pin function on the AT24C04D-PUM, and what happens if it's left unconnected?
The WP pin on the AT24C04D-PUM is an active-high hardware write protect input: tying it to VCC disables all write operations, while grounding it enables full-array programming. If left unconnected, its internal strong pull-down biases it to logic low - enabling writes by default. However, Microchip recommends explicit connection to avoid noise-induced transitions; floating WP may cause intermittent write failures in noisy environments.
Can the AT24C04D-PUM be used in a multi-device I²C bus, and how many devices can share the bus?
Yes, the AT24C04D-PUM supports cascading up to four devices on a single I²C bus using its A1 and A2 address pins. These pins configure bits 5 and 6 of the 7-bit slave address (with fixed prefix 1010b), yielding four unique addresses: 0x50, 0x51, 0x52, and 0x53. All devices must share the same VCC and ground, and SDA/SCL lines must be properly pulled up - no additional arbitration logic is needed.
What is the purpose of the NC pin on the AT24C04D-PUM SOIC package?
Pin 1 of the AT24C04D-PUM in 8-lead SOIC is labeled NC (No Connect) and is not bonded to the die. It serves no electrical function and may be left floating or connected to GND without affecting operation. This pin exists for mechanical symmetry and package compatibility across the AT24Cxx family - it must never be used as a signal or power path, and no current should be sourced or sunk through it.
Does the AT24C04D-PUM require external components for basic I²C operation?
Yes, the AT24C04D-PUM requires two external pull-up resistors: one on SDA and one on SCL, each ≤10 kΩ, referenced to VCC. These are mandatory because both pins use open-drain/open-collector topology. A 0.1 μF ceramic decoupling capacitor is also required between VCC and GND, placed as close as possible to the device. No external level shifters, filters, or voltage regulators are needed for standard 1.7–3.6 V operation.
AT24C04D-PUM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 450 ns
- Voltage - Supply:
- 1.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
AT24C04D-PUM FAQ
1.How can I place an order for AT24C04D-PUM through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C04D-PUM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C04D-PUM reliable?
The price and inventory of AT24C04D-PUM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C04D-PUM is usually 5 days.
3.What payment methods are accepted for AT24C04D-PUM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C04D-PUM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C04D-PUM?
AT24C04D-PUM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C04D-PUM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C04D-PUM?
For technical support, including AT24C04D-PUM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C04D-PUM requirements.
6.How does Aetrix verify that AT24C04D-PUM is sourced from the original manufacturer or authorized distributors?
All AT24C04D-PUM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C04D-PUM meets industry standards.
7.What is the process for return or replacement of AT24C04D-PUM?
All AT24C04D-PUM units undergo pre-shipment inspection (PSI). If there is an issue with AT24C04D-PUM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C04D-PUM part is unused and in its original packaging.
Return procedure for AT24C04D-PUM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C04D-PUM Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

