Microchip Technology AT24C04D-SSHM-B

Overview

AT24C04D-SSHM-B from Microchip Technology (formerly Atmel) is a 4-Kbit I²C-compatible serial EEPROM organized as 512 × 8 bits, operating from 1.7V to 3.6V, supporting Standard (100kHz), Fast (400kHz), and Fast Mode Plus (1MHz at ≥2.5V) I²C speeds, with hardware write protection via WP pin, and used for nonvolatile parameter storage in embedded control systems.

For engineers reviewing the AT24C04D-SSHM-B datasheet, AT24C04D-SSHM-B pinout, AT24C04D-SSHM-B application, or AT24C04D-SSHM-B equivalent, this page delivers verified electrical specs, SOIC-8 package mapping, I²C timing behavior, page-write constraints, and real-world substitution guidance - all grounded in the official Atmel-8896E datasheet.

Technical Context

The AT24C04D-SSHM-B implements a cascaded I²C slave architecture with hardware address pins A1/A2 enabling up to four devices on one bus, and uses Schmitt-triggered, filtered SDA/SCL inputs for robust noise immunity in industrial environments. Its internal 32-page × 16-byte memory structure enforces page-boundary alignment for multi-byte writes.

Write operations are self-timed (≤5ms max), support byte and 16-byte page modes (including partial pages), and require ACK polling for deterministic completion detection. The WP pin samples state at Stop condition to enable full-array hardware write protection - no software lock required.

Key Specifications

Pinout & Package

AT24C04D-SSHM-B is supplied in an 8-lead SOIC package (SOIC-8, 150 mil width), RoHS-compliant, with standard pinout matching JEDEC MS-012AC. Pin 1 is NC (no connect); pins 2–3 are A1/A2 address inputs; pin 4 is GND; pin 5 is SDA (open-drain bidirectional); pin 6 is SCL (input only); pin 7 is WP (active-high write protect); pin 8 is VCC.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT24C04C-SSHM-B, the AT24C04D-SSHM-B delivers superior low-voltage performance and faster I²C throughput; versus CAT24C04WI-GT3, it guarantees higher endurance and tighter write-cycle timing - making it the preferred choice for mission-critical industrial and medical use cases.

Availability

AT24C04D-SSHM-B is available at Aetrix Electronics and suitable for industrial sensor calibration, medical device configuration, automotive body control modules, and consumer appliance settings requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for AT24C04D-SSHM-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology acquired Atmel in 2016 and maintains full product continuity, technical documentation, and manufacturing control for the AT24Cxx family of serial EEPROMs.

The AT24C04D belongs to Microchip's industrial-grade serial EEPROM product line, designed specifically for reliable nonvolatile data storage in space-constrained, low-power, and wide-temperature embedded systems.

FAQ

What is the maximum I²C clock frequency supported by the AT24C04D-SSHM-B?

The AT24C04D-SSHM-B supports 100kHz (Standard Mode), 400kHz (Fast Mode), and 1MHz (Fast Mode Plus) I²C speeds. The 1MHz mode requires VCC ≥2.5V and is explicitly validated in the Atmel-8896E datasheet. At 1.7V–2.4V, only Standard and Fast Modes are guaranteed. This ensures timing compliance across voltage corners without external clock dividers.

Does the AT24C04D-SSHM-B require external pull-up resistors on SDA and SCL lines?

Yes, the AT24C04D-SSHM-B requires external pull-up resistors on both SDA and SCL lines because its SDA pin is open-drain and SCL is input-only. The datasheet specifies a maximum pull-up resistance of 10kΩ and provides formulas to calculate optimal values based on bus capacitance and desired rise time. Omitting pull-ups will prevent I²C communication entirely.

How does the WP pin function on the AT24C04D-SSHM-B, and when is it sampled?

The WP pin on the AT24C04D-SSHM-B is sampled at the Stop condition of each write command to determine whether to inhibit or allow the subsequent internal write cycle. When WP = VCC, all writes are blocked; when WP = GND or floating, writes proceed normally. The pin state must be stable before and after the Stop condition per tSU.WP and tHD.WP timing specs - changing WP mid-cycle has no effect.

Can the AT24C04D-SSHM-B perform partial page writes, and what happens if the address rolls over?

Yes, the AT24C04D-SSHM-B supports partial page writes of 1–16 bytes within the same 16-byte physical page (address bits A8–A4 constant). If the word address increments past the page boundary, the counter rolls over to the start of the same page - potentially overwriting earlier bytes in that page. The datasheet explicitly warns against relying on rollover behavior due to risk of unintended data corruption.

What is the guaranteed data retention and write endurance for the AT24C04D-SSHM-B?

The AT24C04D-SSHM-B guarantees 1,000,000 write/erase cycles and 100 years of data retention at +25°C, as specified in the Atmel-8896E datasheet. These figures are production-tested and apply across the full industrial temperature range (-40°C to +85°C), making it suitable for long-life embedded deployments where field recalibration is impractical.