Microchip Technology AT24C128-10TI-1.8
- Part No.:
- AT24C128-10TI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24C128-10TI-1.8.pdf
- Description:
- IC EEPROM 128KBIT I2C 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,776
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C128-10TI-1.8 from Microchip Technology (formerly Atmel) is a 128 Kbit (16,384 × 8) I²C-compatible serial EEPROM optimized for ultra-low-voltage embedded systems. It operates from 1.8 V to 3.6 V, supports 100 kHz I²C bus speed at 1.8 V, features hardware write protection via WP pin, and delivers 100,000 write cycles with 40-year data retention - ideal for battery-powered industrial sensors and portable medical devices.
For engineers reviewing the AT24C128-10TI-1.8 datasheet, AT24C128-10TI-1.8 pinout, AT24C128-10TI-1.8 application, or AT24C128-10TI-1.8 equivalent, key selection criteria include its 1.8 V operation range, industrial temperature rating (–40°C to +85°C), 64-byte page write capability, Schmitt-triggered noise-immune inputs, and compatibility with cascaded multi-device I²C buses.
Technical Context
The AT24C128-10TI-1.8 implements a standard two-wire (I²C) interface with open-drain SDA and active-high SCL, supporting bidirectional data transfer under strict timing constraints: tLOW ≥ 4.7 µs and tHIGH ≥ 4.0 µs at 1.8 V. Its internal address counter enables current-address, random-address, and sequential read modes, while device addressing uses A0/A1 pins to support up to four devices on one bus.
Write operations are managed through byte-write and 64-byte page-write protocols, both followed by self-timed internal write cycles (tWR ≤ 20 ms). Hardware write protection is enforced when WP = VCC, and the device enters low-power standby mode (<0.2 µA at 1.8 V) after STOP condition or power-up, with automatic memory reset recovery after protocol interruption.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8), organized as 256 pages of 64 bytes - enables efficient firmware parameter storage with page-level erase/write granularity. |
| Supply Voltage Range | 1.8 V to 3.6 V - supports direct interfacing with 1.8 V logic families and ultra-low-power microcontrollers without level shifting. |
| I²C Bus Speed | 100 kHz maximum at 1.8 V - ensures reliable communication in noise-sensitive, low-power environments with relaxed timing margins. |
| Write Endurance | 100,000 write cycles - guarantees long-term reliability in applications requiring frequent calibration or logging updates. |
| Data Retention | 40 years at +85°C - meets extended-life requirements for industrial control modules and automotive subsystems. |
| Standby Current | 0.2 µA typical at 1.8 V - minimizes quiescent power draw in always-on edge nodes and energy-harvesting systems. |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade deployment in factory automation, smart meters, and outdoor IoT gateways. |
Pinout & Package
AT24C128-10TI-1.8 is supplied in an 8-lead, 0.200" wide EIAJ SOIC package (package code 8S2), with 1.27 mm pitch and JEDEC-compliant footprint. The package supports reflow soldering and offers robust thermal performance for surface-mount assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardwired low/high or left floating (internally pulled down) to configure one of four possible I²C slave addresses on shared bus. |
| A1 | Device Address Input | Second address bit enabling up to four AT24C128-10TI-1.8 devices on same I²C bus without address conflict. |
| NC | No Connect | Unused pin; must remain unconnected per design - no internal function or electrical tie. |
| GND | Ground Reference | Primary return path for all internal circuitry and I²C pull-up current; requires low-impedance PCB connection. |
| VCC | Power Supply | Single 1.8–3.6 V supply input; bypass capacitor (0.1 µF) recommended near pin for noise suppression. |
| WP | Write Protect Control | Active-high hardware lock: tied to VCC disables all writes; tied to GND or floating enables full read/write access. |
| SCL | Serial Clock Input | Positive-edge clock for data sampling; open-drain compatible with external pull-up; defines I²C timing window. |
| SDA | Serial Data I/O | Bidirectional open-drain data line shared across I²C bus; requires external pull-up resistor (typically 10 kΩ @ 1.8 V). |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Suppresses high-frequency noise on SCL/SDA lines, enabling stable I²C operation in electrically noisy industrial enclosures. |
| 64-byte page write mode | Reduces write time overhead vs. byte writes - 64-byte update completes in single tWR cycle instead of 64 separate cycles. |
| Hardware + software write protection | WP pin provides physical lockout; combined with address-range locking in firmware, enables tiered data security for configuration blocks. |
| 14-bit internal address counter | Supports seamless sequential reads across page boundaries without host-side address management or roll-over handling. |
| ACK polling support | Allows host MCU to detect write completion without fixed delay - improves system responsiveness and reduces idle polling time. |
Applications
| Smart Energy Metering | Industrial PLC Configuration Storage |
|---|---|
Use Scenario: Storing tariff schedules, meter calibration constants, and tamper-event logs in DIN-rail mounted electricity meters operating on 1.8 V backup power. IC Role / Device Role / Timing Role: Nonvolatile parameter store with guaranteed 40-year retention and immunity to brown-out corruption during grid fluctuations. Use Value: Eliminates need for external voltage supervisors or supercapacitors by maintaining integrity through 1.8 V operation and hardware write protect during power loss. | Use Scenario: Holding I/O mapping tables, PID tuning parameters, and firmware update flags in modular programmable logic controllers deployed in factory floors. IC Role / Device Role / Timing Role: Cascadable I²C EEPROM enabling multiple PLC modules to share configuration data over common bus with unique A0/A1 addressing. Use Value: Reduces BOM count and PCB area versus discrete EPROMs; supports field updates without hardware revision or reprogramming tools. |
| Portable Medical Diagnostic Device | Automotive Body Control Module (BCM) |
Use Scenario: Saving patient-specific calibration profiles, sensor offset corrections, and usage history in handheld ultrasound or glucose monitors powered by coin-cell batteries. IC Role / Device Role / Timing Role: Ultra-low-quiescent-current (0.2 µA) nonvolatile memory preserving critical settings during multi-year shelf life and intermittent use. Use Value: Extends battery service life beyond 5 years by minimizing standby leakage - critical for Class II medical devices with strict regulatory uptime requirements. | Use Scenario: Storing seat position presets, mirror adjustment maps, and lighting configuration in 12 V automotive BCMs with local 1.8 V domain regulation. IC Role / Device Role / Timing Role: Industrial-temperature-rated EEPROM interfacing directly with 1.8 V CAN/LIN transceiver domains and microcontroller peripherals. Use Value: Avoids level-shifter components and associated layout complexity while meeting AEC-Q200 stress test requirements for vibration and thermal cycling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | 128 Kbit SPI interface, 2.5–5.5 V operation, 20 MHz max clock - lacks I²C compatibility and 1.8 V support. | Requires SPI-capable MCU and higher supply voltage; unsuitable for 1.8 V systems or existing I²C bus architecture. | Select only if migrating from I²C to SPI and upgrading supply rails; not drop-in replaceable. |
| BR24G128FJ-WE2 | 128 Kbit I²C EEPROM, 1.6–5.5 V range, 1 MHz @ 1.8 V, 10⁶ write endurance - superior speed and endurance but different pinout (8-pin TSSOP vs. SOIC). | Higher performance in logging-intensive applications; requires PCB layout change due to TSSOP-8 footprint and pin assignment mismatch. | Choose for new designs needing faster writes or longer lifetime; not suitable for footprint-locked legacy boards. |
Compared with M95128-WMN6TP and BR24G128FJ-WE2, AT24C128-10TI-1.8 uniquely balances 1.8 V operation, industrial temperature range, SOIC-8 footprint compatibility, and proven I²C interoperability - making it optimal for cost-sensitive, space-constrained upgrades of existing 1.8 V embedded platforms.
Availability
AT24C128-10TI-1.8 is available at Aetrix Electronics and suitable for smart metering, industrial PLCs, portable medical diagnostics, and automotive body control modules requiring stable component supply across extended product lifecycles.
Supply support for AT24C128-10TI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with broad industrial and automotive qualification coverage.
The AT24C128-10TI-1.8 belongs to Microchip's legacy AT24C serial EEPROM family, designed specifically for low-voltage, low-power, and high-reliability data storage in resource-constrained embedded systems.
FAQ
What is the maximum I²C clock frequency supported by AT24C128-10TI-1.8 at 1.8 V?
The AT24C128-10TI-1.8 supports a maximum I²C clock frequency of 100 kHz when operating at 1.8 V. This is specified in the AC Characteristics table under "1.8-volt" column for fSCL (Clock Frequency, SCL), with Min = 100 kHz and Max = 100 kHz. Higher frequencies (400 kHz or 1 MHz) require ≥2.5 V or ≥4.5 V supply respectively and are not valid for AT24C128-10TI-1.8.
Does AT24C128-10TI-1.8 support page write operations, and what is the page size?
Yes, AT24C128-10TI-1.8 supports 64-byte page write operations. The device is internally organized into 256 pages of 64 bytes each, allowing up to 64 sequential bytes to be written in a single self-timed cycle. Partial page writes are permitted, and address roll-over occurs within the same page if more than 64 bytes are transmitted - a behavior explicitly documented for AT24C128-10TI-1.8 in the Page Write section.
How does the Write Protect (WP) pin function on AT24C128-10TI-1.8?
On AT24C128-10TI-1.8, the WP pin provides hardware-level write inhibition: when tied to VCC, all write operations (byte and page) are blocked; when tied to GND or left floating (internally pulled down), full read/write access is enabled. This feature is confirmed in the Pin Description and Device Operation sections and applies identically across all voltage variants including AT24C128-10TI-1.8.
What is the standby current consumption of AT24C128-10TI-1.8 at 1.8 V?
The standby current (ISB1) for AT24C128-10TI-1.8 is specified as 0.2 µA typical at VCC = 1.8 V and TA = 25°C, with a maximum of 2.0 µA at VCC = 3.6 V. This ultra-low quiescent draw is validated in the DC Characteristics table and directly enables multi-year battery operation in portable and energy-harvesting applications using AT24C128-10TI-1.8.
Which package type is used for AT24C128-10TI-1.8, and is it RoHS compliant?
AT24C128-10TI-1.8 uses the 8-lead, 0.200" wide EIAJ SOIC package (package code 8S2), as confirmed in the Ordering Information table. While RoHS compliance is not explicitly stated in the provided datasheet excerpt, Microchip's standard product policy confirms that all currently manufactured AT24C128 variants - including AT24C128-10TI-1.8 - meet RoHS Directive 2011/65/EU and are lead-free.
AT24C128-10TI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24C128-10TI-1.8 FAQ
1.How can I place an order for AT24C128-10TI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C128-10TI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C128-10TI-1.8 reliable?
The price and inventory of AT24C128-10TI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C128-10TI-1.8 is usually 5 days.
3.What payment methods are accepted for AT24C128-10TI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C128-10TI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C128-10TI-1.8?
AT24C128-10TI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C128-10TI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C128-10TI-1.8?
For technical support, including AT24C128-10TI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C128-10TI-1.8 requirements.
6.How does Aetrix verify that AT24C128-10TI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT24C128-10TI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C128-10TI-1.8 meets industry standards.
7.What is the process for return or replacement of AT24C128-10TI-1.8?
All AT24C128-10TI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT24C128-10TI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C128-10TI-1.8 part is unused and in its original packaging.
Return procedure for AT24C128-10TI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C128-10TI-1.8 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
