Microchip Technology AT24C128-10TI-2.7
- Part No.:
- AT24C128-10TI-2.7
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24C128-10TI-2.7.pdf
- Description:
- IC EEPROM 128KBIT I2C 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,280
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C128-10TI-2.7 from Microchip Technology (formerly Atmel) is a 128 Kbit (16,384 × 8) two-wire serial EEPROM optimized for low-voltage industrial applications. It operates from 2.7V to 5.5V, supports up to 400 kHz I²C bus speed, features hardware write protection via the WP pin, and delivers 100,000 write cycles with 40-year data retention. It is commonly used in embedded systems for parameter storage, calibration data logging, and configuration backup in programmable logic controllers.
For engineers reviewing the AT24C128-10TI-2.7 datasheet, AT24C128-10TI-2.7 pinout, AT24C128-10TI-2.7 application, or AT24C128-10TI-2.7 equivalent, key selection criteria include industrial temperature range (−40°C to +85°C), 2.7V–5.5V supply compatibility, 64-byte page write capability, Schmitt-triggered noise-immune inputs, and JEDEC/EIAJ SOIC-8 or TSSOP-14 package options.
Technical Context
The AT24C128-10TI-2.7 implements a standard I²C-compatible two-wire interface with open-drain SDA and edge-triggered SCL, supporting bidirectional data transfer and 7-bit device addressing with A0/A1 hardware-selectable bits. Its internal architecture organizes memory as 256 pages of 64 bytes each, enabling efficient partial-page writes without address rollover across pages.
It integrates a self-timed write cycle (max 10 ms), acknowledge polling support, and dual-level data protection-hardware-based via the WP pin and software-configurable through device address masking. The device uses proprietary internal biasing for floating A0/A1 pins, ensuring deterministic default addressing in unconnected configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8), sufficient for storing firmware configuration, sensor calibration tables, or device identity data in space-constrained designs. |
| Supply Voltage Range | 2.7V to 5.5V - enables direct integration into mixed-voltage industrial systems without level-shifting circuitry. |
| I²C Bus Speed | Up to 400 kHz at 2.7V - supports high-throughput parameter updates while maintaining robustness against bus noise. |
| Write Endurance | 100,000 write cycles - ensures reliable operation over product lifetime in field-updatable equipment like HVAC controllers. |
| Data Retention | 40 years at +85°C - guarantees long-term integrity of critical settings without battery backup or refresh mechanisms. |
| Operating Temperature | −40°C to +85°C - qualified for use in industrial automation, motor drives, and outdoor metering applications. |
| Page Write Size | 64-byte page buffer - reduces write transaction count by up to 64× versus byte-write mode, lowering I²C bus occupancy and system latency. |
Pinout & Package
AT24C128-10TI-2.7 is available in multiple industrial-grade packages including 8-pin JEDEC SOIC (8S1), 8-pin EIAJ SOIC (8S2), and 14-pin TSSOP (14T). The TSSOP-14 variant used in this ordering code provides enhanced thermal performance and board-level reliability in high-density layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardware-selectable LSB of 3-bit device address; tied high/low or left floating (internally pulled low) to enable up to four devices on one I²C bus. |
| A1 | Device Address Input | Hardware-selectable MSB of 3-bit device address; same floating behavior as A0 for flexible multi-device topology design. |
| NC | No Connect | Unbonded pin in SOIC/TSSOP variants - must remain unconnected to avoid unintended coupling or leakage paths. |
| GND | Ground Reference | Primary return path for VCC and I/O currents; requires low-impedance connection to system ground plane for noise immunity. |
| VCC | Power Supply | 2.7V–5.5V input; decoupling capacitor (0.1 µF ceramic) required within 5 mm for stable internal voltage regulation during write cycles. |
| WP | Write Protect Control | Active-high hardware lock: tied to VCC disables all writes; tied to GND enables full read/write access; floating defaults to GND via internal pull-down. |
| SCL | Serial Clock Input | Positive-edge sampled clock for synchronous data transfer; requires external pull-up resistor (typically 2.2–10 kΩ) to VCC. |
| SDA | Serial Data I/O | Bidirectional open-drain bus line; shares pull-up with SCL; supports wire-OR with other I²C peripherals without contention. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Enables reliable operation in electrically noisy industrial environments by rejecting sub-threshold noise spikes on SCL/SDA lines. |
| 64-byte page write mode | Reduces firmware update time by up to 98% compared to byte-wise writes, minimizing bus occupation and host MCU intervention. |
| Hardware write protection (WP) | Prevents accidental or malicious overwrites during power-up/down transients or firmware glitches without requiring software coordination. |
| 100,000 write cycles endurance | Supports daily reconfiguration over 27 years - suitable for field-serviceable equipment requiring frequent calibration or parameter adjustment. |
| Industrial temperature range | Validated operation from −40°C to +85°C ensures consistent timing and data integrity in uncontrolled ambient conditions. |
Applications
| Programmable Logic Controller (PLC) Configuration Storage | Smart Energy Meter Firmware Parameters |
|---|---|
Use Scenario: Storing user-defined I/O mapping, scaling factors, and alarm thresholds in modular PLC backplanes subject to frequent field reprogramming. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed via I²C during boot and runtime; retains values across AC power loss. Use Value: Eliminates need for battery-backed SRAM, reducing BOM cost and eliminating end-of-life battery replacement service. | Use Scenario: Holding tariff schedules, metering constants, and cryptographic keys in ANSI C12.22-compliant utility meters deployed outdoors. IC Role / Device Role / Timing Role: Secure, tamper-resistant parameter vault with hardware write lock enabled during normal operation. Use Value: Meets ANSI C12.19 security requirements for write-protection of billing-critical parameters without firmware overhead. |
| Industrial HMI Display Calibration Data | Motor Drive Fault Log Buffer |
Use Scenario: Saving gamma correction tables, touch-screen offset values, and brightness profiles in panel-mounted HMIs exposed to wide thermal cycling. IC Role / Device Role / Timing Role: Persistent display tuning database updated only during factory calibration or service mode. Use Value: Maintains visual consistency across operating life despite LCD aging and temperature drift, verified per IEC 61000-4-2 ESD immunity. | Use Scenario: Recording last 128 fault events (overcurrent, thermal shutdown, encoder loss) in servo drives for root-cause analysis after unplanned stoppages. IC Role / Device Role / Timing Role: Circular-buffer event logger using page-write bursts to minimize interrupt latency during fault capture. Use Value: Enables post-failure diagnostics without external flash or telemetry infrastructure, meeting IEC 61800-5-2 functional safety data retention requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STMicroelectronics M24C128-WMN6TP | Same 128 Kbit density, 2.5V–5.5V supply, but rated for −40°C to +105°C; 5 ms max write cycle vs. 10 ms. | Preferred for extended-temperature automotive body control modules where ambient exceeds +85°C. | Select when operating beyond +85°C or requiring faster write completion; verify WP pin behavior matches system lock logic. |
| Renesas R1EX24128ASAS0I | 128 Kbit, 1.7V–5.5V operation, 1 MHz I²C support at 5V, but only 10,000 write cycles and 10-year retention. | Suitable for consumer-grade IoT gateways with infrequent updates and shorter product lifecycles. | Choose for ultra-low-voltage (1.7V) systems or higher-speed I²C buses; avoid in mission-critical industrial logging. |
Compared with M24C128-WMN6TP and R1EX24128ASAS0I, AT24C128-10TI-2.7 offers balanced industrial robustness-superior endurance and retention over Renesas' part, and tighter temperature compliance than ST's extended-range variant-making it optimal for factory automation where reliability and longevity outweigh marginal speed gains.
Availability
AT24C128-10TI-2.7 is available at Aetrix Electronics and suitable for industrial automation, smart metering, and motor control applications requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for AT24C128-10TI-2.7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with a focus on embedded control and connectivity.
The AT24C128-10TI-2.7 belongs to Microchip's legacy serial EEPROM product line, designed specifically for industrial and automotive applications demanding high reliability, wide temperature operation, and proven I²C interoperability.
FAQ
What is the maximum I²C clock frequency supported by AT24C128-10TI-2.7?
The AT24C128-10TI-2.7 supports up to 400 kHz I²C clock frequency when operated within its 2.7V–5.5V supply range. This is confirmed in the AC Characteristics table under "2.5-volt" and "5.0-volt" columns, where fSCL Max = 400 kHz applies to VCC ≥ 2.7V. Operation above 400 kHz is not guaranteed and may result in communication failures or data corruption.
Does AT24C128-10TI-2.7 require an external pull-up resistor on the SDA and SCL lines?
Yes, AT24C128-10TI-2.7 requires external pull-up resistors on both SDA and SCL lines because its I/O pins are open-drain. Typical values range from 2.2 kΩ to 10 kΩ depending on bus capacitance and speed; the datasheet specifies RL = 1.3 kΩ for 2.5V/5V operation and 10 kΩ for 1.8V mode. Without proper pull-ups, the AT24C128-10TI-2.7 cannot drive the bus high, causing communication failure.
How does the write protect (WP) pin function on AT24C128-10TI-2.7?
On AT24C128-10TI-2.7, the WP pin is active-high: tying it to VCC disables all write operations (including page and byte writes), while connecting it to GND enables full read/write access. If left unconnected, an internal pull-down ensures default write-enable behavior. This hardware lock operates independently of I²C commands and remains effective during power transitions.
What package types are available for AT24C128-10TI-2.7?
AT24C128-10TI-2.7 is offered in three industrial-grade packages: 8-pin JEDEC SOIC (8S1), 8-pin EIAJ SOIC (8S2), and 14-pin TSSOP (14T). The "-TI" suffix explicitly denotes the Industrial temperature grade, and the "-2.7" option confirms 2.7V–5.5V operation. Package selection depends on board density, thermal requirements, and assembly process compatibility.
Can AT24C128-10TI-2.7 be used alongside other AT24Cxx EEPROMs on the same I²C bus?
Yes, AT24C128-10TI-2.7 can share an I²C bus with other AT24Cxx devices (e.g., AT24C64, AT24C256) using hardware address pins A0 and A1. These pins allow up to four AT24C128-10TI-2.7 devices on one bus, and their address scheme is compatible with earlier AT24C32/64 parts for seamless migration. No software changes are needed beyond adjusting the 7-bit slave address.
AT24C128-10TI-2.7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24C128-10TI-2.7 FAQ
1.How can I place an order for AT24C128-10TI-2.7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C128-10TI-2.7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C128-10TI-2.7 reliable?
The price and inventory of AT24C128-10TI-2.7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C128-10TI-2.7 is usually 5 days.
3.What payment methods are accepted for AT24C128-10TI-2.7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C128-10TI-2.7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C128-10TI-2.7?
AT24C128-10TI-2.7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C128-10TI-2.7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C128-10TI-2.7?
For technical support, including AT24C128-10TI-2.7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C128-10TI-2.7 requirements.
6.How does Aetrix verify that AT24C128-10TI-2.7 is sourced from the original manufacturer or authorized distributors?
All AT24C128-10TI-2.7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C128-10TI-2.7 meets industry standards.
7.What is the process for return or replacement of AT24C128-10TI-2.7?
All AT24C128-10TI-2.7 units undergo pre-shipment inspection (PSI). If there is an issue with AT24C128-10TI-2.7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C128-10TI-2.7 part is unused and in its original packaging.
Return procedure for AT24C128-10TI-2.7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C128-10TI-2.7 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
