Microchip Technology AT24C128N-10SI
- Part No.:
- AT24C128N-10SI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT24C128N-10SI.pdf
- Description:
- IC EEPROM 128KBIT I2C 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24C128N-10SI from Microchip Technology (formerly Atmel) is a 128 Kbit (16,384 × 8) two-wire serial EEPROM with I²C-compatible interface, operating from 2.7V to 5.5V, featuring 64-byte page write mode, hardware write protection via WP pin, and industrial temperature range (–40°C to +85°C). It serves as nonvolatile configuration storage in embedded controllers, power management units, and sensor calibration systems.
For engineers reviewing the AT24C128N-10SI datasheet, AT24C128N-10SI pinout, AT24C128N-10SI application, or AT24C128N-10SI equivalent, key selection criteria include its 400 kHz I²C speed at 2.7V, 10 ms max write cycle time, 100,000 write endurance, 40-year data retention, and compatibility with standard 8-pin SOIC (8S1) packaging for industrial-grade PCB integration.
Technical Context
The AT24C128N-10SI implements a standard I²C bus protocol with Schmitt-triggered, noise-filtered SDA/SCL inputs and supports bidirectional data transfer using open-drain signaling. Its internal address counter enables current-address, random-address, and sequential read modes without external address latching.
Device addressing uses A0 and A1 pins to support up to four devices on a shared bus; unconnected pins default to logic low. The WP pin provides hardware-level write protection-tied high to VCC to inhibit all writes, or grounded for normal operation-with internal pull-down ensuring safe default behavior.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8), organized in 256 pages of 64 bytes each - enables efficient firmware parameter storage with page-aligned updates. |
| Supply Voltage Range | 2.7V to 5.5V - supports dual-voltage system interoperability (e.g., 3.3V microcontrollers with 5V peripherals). |
| I²C Clock Frequency | Up to 400 kHz at 2.7V - ensures reliable communication in noise-sensitive industrial environments without requiring high-speed timing margins. |
| Write Cycle Time | Max 10 ms - defines minimum interval between write commands; requires acknowledge polling or timeout handling in host firmware. |
| Endurance & Retention | 100,000 write cycles / 40 years data retention - suitable for infrequent but mission-critical configuration logging (e.g., energy meter calibration constants). |
| Operating Temperature | –40°C to +85°C - qualified for industrial control panels, automotive body electronics, and outdoor IoT gateways. |
| ESD Protection | >4000V HBM - reduces need for external transient suppression in board-level ESD-prone interfaces. |
Pinout & Package
AT24C128N-10SI is packaged in an 8-lead, 0.150" wide JEDEC-standard SOIC (package code 8S1), with gull-wing leads and surface-mount footprint compatible with automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardwired low/high to select one of four possible I²C addresses (0x50–0x53); floating defaults to logic 0. |
| A1 | Device Address Input | Second address bit; used with A0 to enable multi-device bus topology without address conflict. |
| NC | No Connect | Internally unused pin; must remain unconnected - no tie-high/low required or recommended. |
| GND | Ground Reference | System return path for VCC and I/O; requires low-impedance connection to minimize ground bounce during write cycles. |
| VCC | Power Supply | Primary supply input (2.7–5.5V); bypass capacitor (0.1 µF ceramic) mandatory near pin for I²C noise immunity. |
| WP | Write Protect Control | Active-high hardware lock: tied to VCC blocks all writes; grounded enables full read/write access. |
| SCL | Serial Clock Input | Master-generated clock signal; Schmitt-triggered input rejects noise spikes up to 50 ns duration. |
| SDA | Serial Data I/O | Open-drain bidirectional line; requires external pull-up (typically 2.2–10 kΩ) to VCC for proper I²C bus operation. |
Key Features
| Feature | Design Value |
|---|---|
| Page Write Mode | 64-byte burst writes reduce host CPU overhead and bus occupancy versus byte-by-byte programming. |
| Hardware Write Protection | WP pin enables fail-safe configuration lockdown during field operation or firmware update sequences. |
| Noise-Suppressed Inputs | Schmitt-trigger + filtering on SDA/SCL eliminates false clock/data transitions in electrically noisy enclosures. |
| Low Standby Current | 6.0 µA max at 2.7–5.5V - extends battery life in always-on monitoring nodes with infrequent EEPROM access. |
| Cascadable Bus Architecture | Four-device addressing allows consolidated nonvolatile storage across multiple subsystems on single I²C bus. |
Applications
| Industrial PLC Configuration Storage | Smart Energy Meter Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping tables, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation cabinets. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed via I²C during boot and runtime reconfiguration. Use Value: Enables field-upgradable control logic without requiring flash reprogramming or hardware modification. | Use Scenario: Retaining metrology calibration coefficients, tariff schedules, and tamper-event logs in ANSI C12.20-compliant electricity meters. IC Role / Device Role / Timing Role: Secure, long-life data logger interfaced to metrology SoC over isolated I²C bus. Use Value: Guarantees 40-year data integrity and withstands 100,000 write cycles needed for lifetime meter recalibration events. |
| Automotive Body Control Module Settings | Medical Infusion Pump Safety Parameters |
Use Scenario: Saving seat/mirror position presets, lighting profiles, and door lock configurations in vehicle body control units operating across –40°C to +85°C ambient. IC Role / Device Role / Timing Role: Industrial-temperature EEPROM providing persistent user preference storage independent of main MCU power domain. Use Value: Eliminates need for backup capacitors or supercapacitors while meeting AEC-Q200 stress requirements via qualification. | Use Scenario: Holding drug library limits, dose accuracy tolerances, and operator authentication keys in Class II medical infusion pumps requiring FDA 21 CFR Part 11 compliance. IC Role / Device Role / Timing Role: Tamper-evident configuration vault with hardware write lock (WP) activated during safety-critical delivery phases. Use Value: WP pin integration allows deterministic, hardware-enforced write inhibition during active therapy - preventing accidental parameter corruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C128C1-10CI-2.7 | Same memory size, voltage range, and package; differs only in lead finish (matte Sn vs. Pb-free NiPdAu per AT24C128N-10SI) | Identical functional use; matte Sn variant preferred for wave-solder compatibility in legacy assembly lines | Select AT24C128C1-10CI-2.7 if RoHS exemption applies or SnPb solder process is used. |
| M95128-WMN6TP | 128 Kbit SPI interface (not I²C); 5ms typical write cycle; operates 1.8–5.5V; same industrial temp grade | Requires SPI-capable MCU GPIO; unsuitable for existing I²C bus architecture without level-shifting or firmware rewrite | Choose M95128-WMN6TP only when migrating to SPI-based designs or adding parallel I²C/SPI redundancy. |
Compared with AT24C128N-10SI, AT24C128C1-10CI-2.7 offers identical electrical and timing behavior with alternate surface finish, while M95128-WMN6TP replaces I²C with SPI-introducing interface incompatibility but enabling faster 10 MHz clocking and simpler single-master arbitration.
Availability
AT24C128N-10SI is available at Aetrix Electronics and suitable for industrial PLCs, smart energy meters, and automotive body control modules requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for AT24C128N-10SI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with broad industrial and automotive qualification expertise.
The AT24C128 series was designed specifically for robust, low-power nonvolatile data storage in space-constrained embedded systems where I²C bus simplicity and industrial reliability are critical.
FAQ
What is the maximum I²C clock frequency supported by AT24C128N-10SI?
The AT24C128N-10SI supports up to 400 kHz I²C clock frequency when operated within its 2.7V to 5.5V supply range. This is validated per AC characteristics table in the official datasheet (Rev. 0670E), with timing parameters tLOW, tHIGH, and tSU.STA specified for 400 kHz operation at 2.7V. Higher speeds (e.g., 1 MHz) require ≥4.5V supply and are not rated for AT24C128N-10SI's industrial-grade voltage option.
Does AT24C128N-10SI require external pull-up resistors on SDA and SCL lines?
Yes, AT24C128N-10SI requires external pull-up resistors on both SDA and SCL lines because its I/O pins are open-drain. Typical values range from 2.2 kΩ to 10 kΩ depending on bus capacitance and speed; 4.7 kΩ is commonly used for 400 kHz operation with ≤400 pF total bus load. Failure to install pull-ups will prevent I²C communication.
How does the WP pin function on AT24C128N-10SI?
The WP (Write Protect) pin on AT24C128N-10SI is an active-high hardware lock: when tied to VCC, it disables all write operations including byte, page, and erase commands. When grounded or left floating (internally pulled down), full read/write access is enabled. This provides deterministic, glitch-immune protection against unintended writes during power transients or firmware faults.
What package type is used for AT24C128N-10SI?
AT24C128N-10SI uses an 8-lead, 0.150" wide plastic gull-wing small outline package conforming to JEDEC SOIC standards (package code 8S1). Its dimensions are 4.90 mm × 3.91 mm × 1.75 mm, with 1.27 mm lead pitch, and is compatible with standard reflow and wave-solder processes.
Can AT24C128N-10SI be used in automotive applications?
AT24C128N-10SI is qualified for industrial temperature range (–40°C to +85°C) and meets AEC-Q200 stress test requirements when used per manufacturer guidelines, making it suitable for under-hood and cabin automotive applications such as body control modules and HVAC controllers - though formal automotive qualification documentation must be obtained separately from Microchip for specific part lots.
AT24C128N-10SI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT24C128N-10SI FAQ
1.How can I place an order for AT24C128N-10SI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C128N-10SI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C128N-10SI reliable?
The price and inventory of AT24C128N-10SI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C128N-10SI is usually 5 days.
3.What payment methods are accepted for AT24C128N-10SI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C128N-10SI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C128N-10SI?
AT24C128N-10SI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C128N-10SI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C128N-10SI?
For technical support, including AT24C128N-10SI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C128N-10SI requirements.
6.How does Aetrix verify that AT24C128N-10SI is sourced from the original manufacturer or authorized distributors?
All AT24C128N-10SI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C128N-10SI meets industry standards.
7.What is the process for return or replacement of AT24C128N-10SI?
All AT24C128N-10SI units undergo pre-shipment inspection (PSI). If there is an issue with AT24C128N-10SI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C128N-10SI part is unused and in its original packaging.
Return procedure for AT24C128N-10SI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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