Microchip Technology AT24C128N-10SI-1.8
- Part No.:
- AT24C128N-10SI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT24C128N-10SI-1.8.pdf
- Description:
- IC EEPROM 128KBIT I2C 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,537
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C128N-10SI-1.8 from Microchip Technology (formerly Atmel) is a 128 Kbit (16,384 × 8) I²C-compatible serial EEPROM optimized for ultra-low-voltage embedded systems. It operates from 1.8 V to 3.6 V, supports 100 kHz I²C bus speed at 1.8 V, features hardware write protection via the WP pin, and delivers 100,000 write cycles with 40-year data retention - ideal for battery-powered sensor nodes and portable medical devices.
For engineers reviewing the AT24C128N-10SI-1.8 datasheet, AT24C128N-10SI-1.8 pinout, AT24C128N-10SI-1.8 application, or AT24C128N-10SI-1.8 equivalent, key selection criteria include 1.8 V operation margin, 64-byte page write capability, Schmitt-triggered noise-immune inputs, industrial temperature range (−40°C to +85°C), and JEDEC SOIC-8 package compatibility.
Technical Context
The AT24C128N-10SI-1.8 implements a standard two-wire (I²C) interface with open-drain SDA/SCL pins, internal address counter for sequential reads, and cascading support for up to four devices on one bus using A0/A1 device address bits. Its memory is organized as 256 pages of 64 bytes each, enabling efficient partial-page writes without cross-page rollover.
It uses a proprietary internal bias circuit on A0/A1 to default to logic low when unconnected, ensuring deterministic addressing. The WP pin provides dual-mode protection: hardware lock when tied to VCC, and software-controlled lock via dynamic high-level assertion before write commands.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8) nonvolatile EEPROM storage |
| Supply Voltage Range | 1.8 V to 3.6 V - enables direct interfacing with 1.8 V microcontrollers and energy-harvesting subsystems |
| I²C Bus Speed | 100 kHz maximum at 1.8 V - ensures reliable timing margins under low-voltage conditions |
| Write Cycle Time | 20 ms max - defines minimum interval between successive write operations |
| Endurance | 100,000 write cycles - supports frequent configuration updates in field-deployed equipment |
| Data Retention | 40 years at +85°C - guarantees long-term parameter storage in industrial environments |
| Operating Temperature | −40°C to +85°C - qualified for industrial-grade applications without derating |
Pinout & Package
AT24C128N-10SI-1.8 is housed in an 8-pin JEDEC SOIC (SOIC-8, package code 8S1), 0.150" wide, with standard pinout and footprint compatible with industry-standard PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardwired low/high or left floating (internally pulled low) to select one of four possible I²C addresses on shared bus |
| A1 | Device Address Input | Same function as A0; combined with A0, enables up to four AT24C128N-10SI-1.8 devices on single I²C bus |
| NC | No Connect | Internally unused pin; must remain unconnected per datasheet |
| GND | Ground Reference | System ground return path for all internal circuitry and I/O leakage control |
| VCC | Power Supply | 1.8 V to 3.6 V supply input; decoupling capacitor required within 10 mm of pin |
| WP | Write Protect Control | Active-high hardware lock: tied to VCC disables all writes; tied to GND enables full read/write access |
| SCL | Serial Clock Input | Open-drain input synchronized to master clock; controls timing of data sampling on SDA |
| SDA | Serial Data I/O | Open-drain bidirectional line shared across multiple I²C devices; requires external pull-up resistor |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Enables robust noise immunity on SCL/SDA lines in electrically noisy industrial environments |
| 64-byte page write mode | Reduces firmware overhead by allowing burst programming of up to 64 bytes per I²C transaction |
| Self-timed write cycle | Eliminates need for external delay timers; internal timing ensures completion before next command |
| Hardware + software write protection | WP pin supports both static lock (VCC tie) and dynamic lock (assert before write), preventing accidental overwrites |
| 100,000 write endurance | Supports daily reconfiguration over 27 years - suitable for firmware parameter logging and calibration storage |
Applications
| Smart Energy Meters | Industrial PLC Modules |
|---|---|
Use Scenario: Storing tariff schedules, meter calibration constants, and tamper-event logs in utility-grade electricity meters operating on 1.8 V backup power. IC Role / Device Role / Timing Role: Nonvolatile configuration and event-history storage with guaranteed retention during mains failure. Use Value: Enables compliance with IEC 62056 standards via secure, low-power, long-life parameter storage independent of main supply. | Use Scenario: Holding I/O mapping tables, PID tuning parameters, and firmware update staging data in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: Persistent configuration register bank accessible over I²C from ARM Cortex-M host MCU. Use Value: Eliminates need for external FRAM or battery-backed SRAM while maintaining −40°C to +85°C operational integrity. |
| Portable Medical Sensors | Automotive Body Control Units |
Use Scenario: Saving patient-specific calibration offsets, sensor linearization coefficients, and usage counters in handheld ECG or pulse oximeter devices. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 1.8 V ADC/MCU domain without level-shifting. Use Value: Reduces BOM count and power loss versus voltage translators, extending battery life in Class II medical devices. | Use Scenario: Storing seat-position memory, mirror-angle presets, and lighting configuration profiles in automotive door modules. IC Role / Device Role / Timing Role: I²C slave memory for infrequent but mission-critical user preference storage. Use Value: Meets AEC-Q100 stress test requirements for reliability and retains data through 10,000+ ignition cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C128BN-10SI-1.8 | Same 128 Kbit capacity, 1.8 V operation, and SOIC-8 package; differs only in internal revision (B vs. original mask set) | Identical functional behavior and timing; validated for same industrial temperature range | Select when newer wafer lot traceability or updated ESD performance (≥6 kV HBM) is required |
| M95128-DRMN6TP/K | 128 Kbit SPI interface (not I²C); 1.8 V–5.5 V supply; 8-lead SOIC package; 5 ms typical write time | Requires SPI host interface instead of I²C; no A0/A1 addressing; no WP pin - uses software write enable | Choose only if system already uses SPI peripherals and I²C bus is congested or unavailable |
Compared with AT24C128N-10SI-1.8, the AT24C128BN-10SI-1.8 offers identical electrical and mechanical compatibility with minor process enhancements, whereas the M95128-DRMN6TP/K requires interface redesign and lacks hardware write protection - making it a functional alternative only when SPI is preferred and security constraints permit.
Availability
AT24C128N-10SI-1.8 is available at Aetrix Electronics and suitable for smart metering, industrial automation, portable diagnostics, automotive body electronics, and battery-powered IoT edge nodes requiring stable component supply across extended product lifecycles.
Supply support for AT24C128N-10SI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with broad industrial and automotive qualification expertise.
The AT24C128N-10SI-1.8 belongs to Microchip's legacy AT24C serial EEPROM family, designed specifically for low-voltage, space-constrained embedded systems needing reliable, byte-addressable nonvolatile storage with minimal external components.
FAQ
What is the maximum I²C clock frequency supported by AT24C128N-10SI-1.8 at 1.8 V?
The AT24C128N-10SI-1.8 supports a maximum I²C clock frequency of 100 kHz when operated at 1.8 V. This is specified in the AC Characteristics table under "1.8-volt" column for parameter fSCL. Higher frequencies (up to 400 kHz or 1 MHz) require ≥2.5 V or ≥4.5 V supply respectively - not applicable to the -1.8 suffix variant. The 100 kHz limit ensures setup/hold timing margins are met under worst-case low-voltage conditions.
Does AT24C128N-10SI-1.8 support page write operations, and what is the page size?
Yes, AT24C128N-10SI-1.8 supports page write operations with a fixed page size of 64 bytes. This allows up to 64 sequential bytes to be written in a single I²C transaction after the initial address byte, improving write efficiency versus byte-by-byte programming. The internal address counter auto-increments within the page boundary; crossing the 64-byte boundary wraps to the start of the same page unless a new address is issued.
What is the purpose of the NC pin on AT24C128N-10SI-1.8, and how should it be handled on the PCB?
The NC (No Connect) pin on AT24C128N-10SI-1.8 is internally unconnected and serves no electrical function. Per the datasheet Pin Description and Package Drawings, it must remain unconnected on the PCB - neither tied to GND, VCC, nor routed. Leaving it floating is acceptable; however, routing or soldering to this pin may cause mechanical stress or unintended coupling and is strictly prohibited.
How does the Write Protect (WP) pin function on AT24C128N-10SI-1.8, and what happens when it is left unconnected?
When WP is tied to VCC, all write operations to AT24C128N-10SI-1.8 are inhibited; when tied to GND, full read/write access is enabled. If left unconnected, WP is internally pulled down to GND via a proprietary bias circuit, resulting in normal write capability. This default behavior simplifies designs where write protection is not required, eliminating the need for an external pull-down resistor.
Is AT24C128N-10SI-1.8 qualified for industrial temperature operation, and what is its specified range?
Yes, AT24C128N-10SI-1.8 is explicitly qualified for industrial temperature operation, with a specified range of −40°C to +85°C. This is confirmed by the "-SI" suffix in the part number (per Ordering Information table) and reinforced by Absolute Maximum Ratings and DC/AC Characteristics test conditions covering TA = −40°C to +85°C at VCC = 1.8 V to 3.6 V.
AT24C128N-10SI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT24C128N-10SI-1.8 FAQ
1.How can I place an order for AT24C128N-10SI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C128N-10SI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C128N-10SI-1.8 reliable?
The price and inventory of AT24C128N-10SI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C128N-10SI-1.8 is usually 5 days.
3.What payment methods are accepted for AT24C128N-10SI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C128N-10SI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C128N-10SI-1.8?
AT24C128N-10SI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C128N-10SI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C128N-10SI-1.8?
For technical support, including AT24C128N-10SI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C128N-10SI-1.8 requirements.
6.How does Aetrix verify that AT24C128N-10SI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT24C128N-10SI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C128N-10SI-1.8 meets industry standards.
7.What is the process for return or replacement of AT24C128N-10SI-1.8?
All AT24C128N-10SI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT24C128N-10SI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C128N-10SI-1.8 part is unused and in its original packaging.
Return procedure for AT24C128N-10SI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C128N-10SI-1.8 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
