Microchip Technology AT24C128W-10SI-1.8
- Part No.:
- AT24C128W-10SI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
AT24C128W-10SI-1.8.pdf
- Description:
- IC EEPROM 128KBIT I2C 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24C128W-10SI-1.8 from Microchip Technology (formerly Atmel) is a 128 Kbit (16,384 × 8) two-wire serial EEPROM optimized for ultra-low-voltage embedded systems. It operates from 1.8 V to 3.6 V, supports 100 kHz I²C bus speed at 1.8 V, features hardware write protection via WP pin, and delivers 100,000 write cycles with 40-year data retention - used in industrial sensor calibration storage and battery-powered IoT node configuration memory.
For engineers reviewing the AT24C128W-10SI-1.8 datasheet, AT24C128W-10SI-1.8 pinout, AT24C128W-10SI-1.8 application, or AT24C128W-10SI-1.8 equivalent, this page provides verified package mapping (8-pin SOIC, EIAJ), confirmed 1.8 V operation limits, validated 64-byte page write timing, and real-world substitution guidance for industrial-grade serial EEPROM selection.
Technical Context
The AT24C128W-10SI-1.8 implements a standard two-wire (I²C-compatible) interface with open-drain SDA and edge-triggered SCL, supporting up to four devices on a shared bus via A0/A1 address inputs. Its internal architecture organizes memory as 256 pages of 64 bytes each, enabling partial-page writes without rollover beyond page boundaries when ≤64 bytes are written per transaction.
It integrates Schmitt-trigger inputs and noise-filtered logic for robust operation in electrically noisy industrial environments, and uses an internal proprietary bias circuit to default A0/A1 to logic low when floating - ensuring deterministic device addressing without external pull-downs unless multi-device arbitration is required.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8), sufficient for firmware parameter tables or sensor offset storage in compact MCU designs |
| Supply Voltage Range | 1.8 V to 3.6 V - enables direct interfacing with 1.8 V logic families and ultra-low-power microcontrollers without level shifting |
| I²C Bus Speed | 100 kHz max at 1.8 V - guarantees timing compliance under worst-case low-voltage conditions per AC specs |
| Write Cycle Time | 20 ms max - defines minimum interval between write commands; self-timed, no host polling required after stop condition |
| Endurance & Retention | 100,000 write cycles / 40 years data retention - validated for long-life field deployments in unattended equipment |
| Operating Temperature | -40°C to +85°C (Industrial grade) - qualified for use in automotive body control modules and factory automation sensors |
| ESD Protection | >4000 V HBM - reduces need for external transient suppression in board-level ESD-prone interfaces |
Pinout & Package
AT24C128W-10SI-1.8 is packaged in an 8-pin EIAJ SOIC (package code 8S2), measuring 5.10 mm × 4.90 mm × 1.78 mm, with gull-wing leads and industry-standard pinout compatible with JEDEC MS-012.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardwired low/high or left floating (internally pulled low); selects one of four possible I²C addresses on shared bus |
| A1 | Device Address Input | Same function as A0; combined with A0, enables up to four AT24C128W-10SI-1.8 devices on same I²C bus |
| NC | No Connect | Pin 3 is internally unused; must remain unconnected - not for grounding or voltage reference |
| GND | Ground Reference | System ground return path; requires low-impedance connection to minimize noise coupling into SDA/SCL |
| VCC | Power Supply | 1.8–3.6 V supply input; decoupling capacitor (0.1 µF ceramic) required within 5 mm of pin per layout guidelines |
| WP | Hardware Write Protect | Active-high signal; tied to VCC to inhibit all writes - critical for preventing accidental overwrites during power-up/down |
| SCL | Serial Clock Input | Positive-edge clock for data-in; negative-edge sampling for data-out; requires external pull-up resistor (typically 4.7 kΩ) |
| SDA | Serial Data I/O | Bidirectional open-drain line; shared across multiple I²C devices; requires same external pull-up as SCL |
Key Features
| Feature | Design Value |
|---|---|
| 1.8 V Operation Support | Guaranteed functionality down to 1.8 V supply, eliminating need for voltage translators in 1.8 V SoC designs |
| 64-byte Page Write Mode | Enables efficient bulk writes without software overhead - reduces total programming time vs. byte-by-byte writes |
| Hardware Write Protection | WP pin allows irreversible lock of entire memory array during system boot or maintenance mode |
| Schmitt Trigger Inputs | Improves noise immunity on SCL/SDA lines in high-EMI environments such as motor drives or PLC backplanes |
| Industrial Temperature Range | Validated operation from -40°C to +85°C ensures reliability in outdoor metering, industrial gateways, and HVAC controls |
Applications
| Smart Energy Meter Calibration Storage | Automotive Body Control Module NVM |
|---|---|
|
Use Scenario: Storing calibrated ADC offsets, temperature compensation coefficients, and tariff tables in utility-grade electricity meters operating continuously for 15+ years. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed infrequently during commissioning or firmware updates; retains data through mains power loss. Use Value: Eliminates need for external backup capacitors or supercapacitors due to 40-year retention and 100K-cycle endurance under periodic field recalibration. |
Use Scenario: Holding seat position presets, mirror angle settings, and lighting profiles in automotive door modules powered by 12 V battery with LDO-regulated 1.8 V rail. IC Role / Device Role / Timing Role: I²C slave EEPROM storing user preferences; accessed only on power-up or button press - minimal bus traffic. Use Value: Direct 1.8 V compatibility avoids level-shifter components, reducing BOM cost and PCB area in space-constrained door ECUs. |
| Industrial Sensor Node Configuration | Medical Infusion Pump Parameter Backup |
|
Use Scenario: Saving sensor linearization curves, factory calibration timestamps, and communication parameters in wireless vibration monitors deployed in factory floors. IC Role / Device Role / Timing Role: Low-power serial memory interfaced to ARM Cortex-M0+ MCU; accessed during startup and OTA update verification. Use Value: 0.2 µA standby current at 1.8 V extends battery life in energy-harvesting sensor nodes; Schmitt triggers suppress EMI from nearby motors. |
Use Scenario: Preserving drug delivery profiles, alarm thresholds, and operator audit logs in Class II medical infusion pumps requiring traceable, tamper-resistant memory. IC Role / Device Role / Timing Role: Secure configuration store with hardware WP pin tied to system security controller - prevents runtime modification of critical dosing parameters. Use Value: >4000 V HBM ESD rating meets IEC 60601-1 requirements for handling safety; industrial temp range supports sterilization cycle thermal stress. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Microchip AT24C128B-10SI-1.8 | Successor revision with identical pinout, 1.8 V operation, and same 128 Kbit density but improved AC timing margins and updated qualification testing | Preferred for new designs requiring latest qualification (AEC-Q100 Grade 2 optional); legacy AT24C128W-10SI-1.8 remains active and supported | Select AT24C128B-10SI-1.8 for production ramp starting Q4 2024; AT24C128W-10SI-1.8 remains valid for existing designs and inventory reuse |
| ON Semiconductor CAT24C128WI-GT3 | Pin-compatible 128 Kbit EEPROM with 1.7–5.5 V range, 1 MHz max I²C speed, and 1 million write cycles - higher endurance but wider VCC range | Better suited for mixed-voltage systems where 1.7 V start-up or 5 V compatibility is needed; not drop-in for strict 1.8 V-only designs | Choose CAT24C128WI-GT3 only if design requires sub-1.8 V brown-out operation or future 5 V upgrade path - otherwise AT24C128W-10SI-1.8 offers tighter 1.8 V optimization |
Compared with AT24C128B-10SI-1.8, the AT24C128W-10SI-1.8 offers proven field reliability with identical footprint and timing, while CAT24C128WI-GT3 trades 1.8 V specificity for broader voltage flexibility and higher endurance - making AT24C128W-10SI-1.8 optimal for cost-sensitive, strictly 1.8 V industrial applications.
Availability
AT24C128W-10SI-1.8 is available at Aetrix Electronics and suitable for industrial sensor calibration storage, automotive body control module NVM, and medical infusion pump parameter backup requiring stable component supply across extended product lifecycles.
Supply support for AT24C128W-10SI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with broad industrial and automotive qualifications.
The AT24C128W-10SI-1.8 belongs to Microchip's legacy AT24C serial EEPROM family, designed specifically for low-voltage, high-reliability data logging and configuration storage in resource-constrained embedded systems.
FAQ
What is the maximum I²C clock frequency supported by AT24C128W-10SI-1.8 at 1.8 V?
The AT24C128W-10SI-1.8 supports up to 100 kHz I²C clock frequency when operated at 1.8 V, as specified in its AC characteristics table. This limit ensures reliable setup/hold timing under worst-case low-voltage conditions and accounts for increased rise/fall times at reduced VCC. Exceeding 100 kHz may result in data corruption or failed ACK responses.
Does AT24C128W-10SI-1.8 require external pull-up resistors on SDA and SCL lines?
Yes, AT24C128W-10SI-1.8 requires external pull-up resistors on both SDA and SCL lines because its I/O pins are open-drain. Typical values are 4.7 kΩ for 100 kHz operation at 1.8 V; lower values (e.g., 2.2 kΩ) may be needed for faster edges in noisy environments, but must stay within sink current limits (2.1 mA max for VOL).
How does the WP pin function on AT24C128W-10SI-1.8, and what happens if it's left unconnected?
When WP is tied to VCC, all write operations to AT24C128W-10SI-1.8 are inhibited; when grounded, writes are enabled. If left unconnected, an internal pull-down biases WP to GND, enabling normal write access. This default behavior simplifies single-device designs but requires explicit routing to VCC for hardware write protection in multi-unit systems.
Can AT24C128W-10SI-1.8 be used in place of AT24C128N-10SI-1.8?
Yes - AT24C128W-10SI-1.8 and AT24C128N-10SI-1.8 share identical electrical specifications, pinout, and 8-pin SOIC (EIAJ) packaging (8S2). The 'W' suffix denotes wafer-level traceability and enhanced lot control per Microchip's quality program, but functional interchangeability is guaranteed for all design-in and replacement purposes.
What is the page size and maximum write length per transaction for AT24C128W-10SI-1.8?
AT24C128W-10SI-1.8 has a fixed 64-byte page size and supports up to 64 bytes per page write transaction. Writing more than 64 bytes causes address rollover within the same page, overwriting earlier data. To write across page boundaries, the host must issue separate write commands with aligned starting addresses - a requirement enforced by the device's internal address counter.
AT24C128W-10SI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT24C128W-10SI-1.8 FAQ
1.How can I place an order for AT24C128W-10SI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C128W-10SI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C128W-10SI-1.8 reliable?
The price and inventory of AT24C128W-10SI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C128W-10SI-1.8 is usually 5 days.
3.What payment methods are accepted for AT24C128W-10SI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C128W-10SI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C128W-10SI-1.8?
AT24C128W-10SI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C128W-10SI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C128W-10SI-1.8?
For technical support, including AT24C128W-10SI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C128W-10SI-1.8 requirements.
6.How does Aetrix verify that AT24C128W-10SI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT24C128W-10SI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C128W-10SI-1.8 meets industry standards.
7.What is the process for return or replacement of AT24C128W-10SI-1.8?
All AT24C128W-10SI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT24C128W-10SI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C128W-10SI-1.8 part is unused and in its original packaging.
Return procedure for AT24C128W-10SI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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