Microchip Technology AT24C32CN-SH-B
- Part No.:
- AT24C32CN-SH-B
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT24C32CN-SH-B.pdf
- Description:
- IC EEPROM 32KBIT I2C 1MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,070
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C32CN-SH-B from Microchip Technology (formerly Atmel) is a 32K-bit I²C-compatible serial EEPROM organized as 4096 × 8 bits, operating from 1.8 V to 5.5 V, featuring hardware write protection via the WP pin, 32-byte page write capability, and 1 MHz max clock speed at 5.0 V. It is widely used in industrial sensor calibration storage, embedded system configuration retention, and power-meter firmware parameter backup.
For engineers reviewing the AT24C32CN-SH-B datasheet, AT24C32CN-SH-B pinout, AT24C32CN-SH-B application, or AT24C32CN-SH-B equivalent, key selection considerations include its 1.8–5.5 V supply range, 8-lead Ultra Thin Mini-MAP (MLP2x3) package with NiPdAu lead finish, 1 million write endurance, 100-year data retention, and compatibility with standard 2-wire bus protocols across up to eight cascaded devices.
Technical Context
The AT24C32CN-SH-B implements a synchronous 2-wire (I²C) interface with Schmitt-triggered, noise-filtered SDA and SCL inputs, supporting standard-mode (400 kHz at 1.8 V) and fast-mode (1 MHz at 5.0 V) operation. Its internal address counter enables current-address, random-address, and sequential read modes.
It uses three hardware address pins (A0–A2) to support up to eight devices on a shared bus, and features a dedicated Write Protect (WP) pin that disables all writes when pulled high to VCC. The device enters low-power standby mode after STOP condition detection and internal write completion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 32,768 bits (4096 × 8), enabling storage of firmware settings, calibration coefficients, or user preferences in space-constrained designs |
| Supply Voltage Range | 1.8 V to 5.5 V - supports direct interfacing with both low-voltage microcontrollers (e.g., ARM Cortex-M0+) and legacy 5 V systems without level shifting |
| Interface Protocol | 2-wire I²C-compatible serial bus - reduces PCB routing complexity and pin count versus SPI or parallel EEPROMs |
| Write Cycle Time | ≤5 ms - enables rapid nonvolatile updates during system initialization or field reconfiguration |
| Endurance & Retention | 1,000,000 write cycles / 100 years data retention - suitable for applications requiring frequent parameter logging or long-life field deployment |
| Operating Temperature | −40°C to +85°C - qualified for industrial-grade operation in metering, automation, and automotive body electronics |
| Package Type | 8-lead Ultra Thin Mini-MAP (MLP2x3), 2.0 mm × 3.0 mm, 0.5 mm pitch - ultra-compact footprint ideal for wearables and IoT edge nodes |
Pinout & Package
AT24C32CN-SH-B is supplied in an 8-lead Ultra Thin Mini-MAP (MLP2x3) package (JEDEC MO-229 compliant), measuring 2.0 mm × 3.0 mm with 0.5 mm pitch and NiPdAu lead finish. The thermal pad is optional and not electrically connected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardwired logic level sets LSB of 7-bit I²C slave address; enables multi-device bus addressing (up to 8 units) |
| A1 | Device Address Input | Second bit of hardware-configurable device address; floating pins are internally pulled down if board coupling <3 pF |
| A2 | Device Address Input | MSB of hardware address; allows unique identification on shared I²C bus without software configuration |
| GND | Ground Reference | Return path for VCC and signal logic; must be low-impedance to ensure noise immunity for I²C timing compliance |
| VCC | Power Supply | Single-supply input (1.8–5.5 V); powers internal HV pump, EEPROM array, and serial interface logic |
| WP | Write Protect Control | Active-high hardware lock: tied to VCC disables all write operations, preventing accidental overwrites during power transients |
| SCL | Serial Clock Input | Positive-edge sampled clock for data synchronization; open-drain compatible with bus pull-up resistors |
| SDA | Serial Data I/O | Bidirectional open-drain line shared across multiple I²C devices; requires external pull-up resistor (1.3 kΩ @ 2.5/5 V, 10 kΩ @ 1.8 V) |
Key Features
| Feature | Design Value |
|---|---|
| Page Write Mode | 32-byte burst writes reduce total programming time by >90% vs. byte-by-byte writes for block updates |
| Noise-Suppressed Inputs | Schmitt-trigger + digital filtering on SDA/SCL ensures reliable operation in electrically noisy industrial environments |
| Hardware Write Protection | WP pin provides fail-safe, zero-software-overhead memory locking - critical for safety-critical configuration storage |
| Low Standby Current | 1.0 µA at 1.8 V enables multi-year battery life in energy-harvesting or coin-cell-powered sensors |
| Cascadable Architecture | Three address pins allow up to eight AT24C32CN-SH-B devices on one I²C bus - simplifies BOM consolidation in multi-sensor modules |
Applications
| Smart Energy Metering | Industrial PLC Configuration |
|---|---|
Use Scenario: Storing tariff schedules, pulse-count history, and metrology calibration constants in DIN-rail mounted electricity meters. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed via I²C during boot and periodic firmware updates; retains data across 10+ year service life. Use Value: Enables field-upgradable metering algorithms without requiring external FRAM or battery-backed SRAM. | Use Scenario: Saving I/O mapping tables, PID tuning parameters, and alarm thresholds in modular programmable logic controllers. IC Role / Device Role / Timing Role: Configuration EEPROM interfaced to ARM-based controller MCU; written during commissioning and read at power-on reset. Use Value: Eliminates manual dip-switch setup and supports remote parameter reprogramming via HMI or cloud interface. |
| Medical Sensor Calibration | Automotive Body Control Module |
Use Scenario: Holding factory-calibrated offset/gain coefficients for temperature, pressure, and humidity sensors in portable diagnostic devices. IC Role / Device Role / Timing Role: Read-only during normal operation; written once during end-of-line test using I²C host; accessed during sensor initialization. Use Value: Ensures traceable, NIST-aligned accuracy without requiring recalibration in the field. | Use Scenario: Storing seat position presets, mirror angle memories, and lighting profiles in vehicle door modules. IC Role / Device Role / Timing Role: Low-power EEPROM accessed via LIN-to-I²C bridge MCU; retains user preferences across ignition cycles. Use Value: Delivers personalized comfort features while meeting automotive AEC-Q200 reliability requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C32D-SSHM-T | Same 32K-bit capacity, identical MLP2x3 package, but specified for extended −40°C to +125°C operation and RoHS-compliant matte tin finish | Required for under-hood automotive or high-temperature industrial enclosures where 85°C ambient is exceeded | Select AT24C32D-SSHM-T only when extended temperature qualification or matte tin plating is mandated by design spec. |
| M24C32-WMN6TP | 32K-bit I²C EEPROM in 8-lead TSSOP (8A2), 1.8–5.5 V, 400 kHz max, but lacks 1 MHz fast-mode support and has higher standby current (5 µA @ 1.8 V) | Suitable for cost-sensitive consumer electronics where PCB area is less constrained and speed is secondary | Choose M24C32-WMN6TP only when TSSOP packaging is preferred and 1 MHz timing is unnecessary. |
Compared with AT24C32D-SSHM-T, AT24C32CN-SH-B offers lower cost and standard industrial temperature grade, while M24C32-WMN6TP trades speed and power efficiency for broader distributor availability in TSSOP - making AT24C32CN-SH-B optimal for compact, high-speed, cost-balanced industrial designs.
Availability
AT24C32CN-SH-B is available at Aetrix Electronics and suitable for smart metering, industrial PLC configuration, and medical sensor calibration requiring stable component supply and long-term obsolescence management.
Supply support for AT24C32CN-SH-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with leadership in secure, low-power, and industrial-grade ICs.
The AT24C32 series belongs to Microchip's serial EEPROM product line, designed specifically for robust, low-voltage, I²C-based nonvolatile data storage in space- and power-constrained embedded systems.
FAQ
What is the maximum I²C clock frequency supported by the AT24C32CN-SH-B?
The AT24C32CN-SH-B supports up to 1 MHz at VCC = 5.0 V and 400 kHz at VCC = 1.8 V. These values are guaranteed across the full industrial temperature range (−40°C to +85°C) and reflect actual AC timing limits-not theoretical bus capability. Exceeding these frequencies may cause ACK failures or data corruption, especially under capacitive bus loading conditions.
Does the AT24C32CN-SH-B require external pull-up resistors on SDA and SCL lines?
Yes, the AT24C32CN-SH-B requires external pull-up resistors on both SDA and SCL lines because it uses open-drain outputs. Recommended values are 1.3 kΩ for 2.5 V/5.0 V operation and 10 kΩ for 1.8 V operation, per the datasheet's AC measurement conditions. Omitting pull-ups will prevent proper I²C communication.
How does the Write Protect (WP) pin function on the AT24C32CN-SH-B?
When the WP pin is driven high to VCC, all write operations-including byte write, page write, and write cycle initiation-are disabled. When WP is grounded or left floating (with board coupling <3 pF), writes are enabled. This hardware-level protection operates independently of I²C commands and remains active during power transitions.
Can multiple AT24C32CN-SH-B devices share the same I²C bus?
Yes, up to eight AT24C32CN-SH-B devices can operate on a single I²C bus using the A0, A1, and A2 address pins to configure unique 7-bit slave addresses. Each pin set to high or low determines one bit of the address; floating pins default to logic low via internal biasing, enabling flexible hardware addressing without additional components.
What is the endurance rating and data retention specification for the AT24C32CN-SH-B?
The AT24C32CN-SH-B is rated for 1,000,000 write cycles per memory location and guarantees 100 years of data retention at +25°C. These specifications are characterized and validated per JEDEC standards, and apply across the full 1.8–5.5 V supply range and −40°C to +85°C operating temperature.
AT24C32CN-SH-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT24C32CN-SH-B FAQ
1.How can I place an order for AT24C32CN-SH-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C32CN-SH-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C32CN-SH-B reliable?
The price and inventory of AT24C32CN-SH-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C32CN-SH-B is usually 5 days.
3.What payment methods are accepted for AT24C32CN-SH-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C32CN-SH-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C32CN-SH-B?
AT24C32CN-SH-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C32CN-SH-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C32CN-SH-B?
For technical support, including AT24C32CN-SH-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C32CN-SH-B requirements.
6.How does Aetrix verify that AT24C32CN-SH-B is sourced from the original manufacturer or authorized distributors?
All AT24C32CN-SH-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C32CN-SH-B meets industry standards.
7.What is the process for return or replacement of AT24C32CN-SH-B?
All AT24C32CN-SH-B units undergo pre-shipment inspection (PSI). If there is an issue with AT24C32CN-SH-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C32CN-SH-B part is unused and in its original packaging.
Return procedure for AT24C32CN-SH-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C32CN-SH-B Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
