Microchip Technology AT24C32D-XHM-B
- Part No.:
- AT24C32D-XHM-B
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24C32D-XHM-B.pdf
- Description:
- IC EEPROM 32KBIT I2C 1MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24C32D-XHM-B from Microchip Technology is a 32-Kbit I²C-compatible serial EEPROM organized as 4,096 × 8 bits, operating from 1.7V to 5.5V across -40°C to +85°C industrial temperature range, featuring 1 MHz Fast Mode Plus support (2.5V–5.5V), hardware write-protection via WP pin, and 32-byte page write capability. It serves as nonvolatile configuration storage in microcontroller-based systems requiring robust data retention and low-power operation.
For engineers reviewing the AT24C32D-XHM-B datasheet, AT24C32D-XHM-B pinout, AT24C32D-XHM-B application, or AT24C32D-XHM-B equivalent, key selection considerations include I²C bus voltage compatibility (1.7V–5.5V), write endurance (1,000,000 cycles), data retention (100 years), and package-specific pin mapping for SOIC-8 and TSSOP-8 footprints.
Technical Context
The AT24C32D-XHM-B implements a standard I²C slave interface with bidirectional SDA and unidirectional SCL lines, supporting Standard (100 kHz), Fast (400 kHz), and Fast Mode Plus (1 MHz) clock rates depending on VCC level. Its internal memory is segmented into 128 pages of 32 bytes each, enabling partial-page writes and sequential reads without address wraparound.
It integrates Schmitt-trigger inputs and noise-filtered I/O for reliable operation in electrically noisy environments, and features an internal power-on reset (POR) circuit with VPOR = 1.5 V and tPUP = 100 µs to prevent spurious writes during power-up. The WP pin provides full-array hardware write protection when tied to VCC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 32 Kbit (4,096 × 8), sufficient for firmware calibration tables or device configuration profiles |
| Supply voltage | 1.7V to 5.5V - supports direct interfacing with 1.8V, 3.3V, and 5V microcontrollers without level shifters |
| Interface speed | Up to 1 MHz (FM+) at 2.5V–5.5V - enables faster boot-time parameter loading than legacy 100 kHz EEPROMs |
| Write endurance | 1,000,000 cycles - suitable for logging applications with frequent updates (e.g., energy metering counters) |
| Data retention | 100 years at 55°C - ensures long-term reliability in sealed industrial enclosures |
| Active current | ≤3.0 mA max at 5.0V/400 kHz - minimizes power impact during active read/write in battery-backed systems |
| Standby current | ≤6.0 μA at 5.0V - enables multi-year operation on coin-cell backup supplies |
Pinout & Package
The AT24C32D-XHM-B is supplied in an 8-lead TSSOP package (XHM suffix per Microchip's packaging nomenclature), with lead-free, halide-free, RoHS-compliant construction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Hardware device address input | Configures LSB of 7-bit I²C slave address; tied low or high to enable up to eight devices on same bus |
| A1 | Hardware device address input | Configures middle bit of 7-bit I²C slave address; must be hard-wired for deterministic addressing |
| A2 | Hardware device address input | Configures MSB of 7-bit I²C slave address; floating defaults to logic 0 via internal strong pull-down |
| GND | Ground reference | System return path for VCC and I/O; requires low-impedance connection to minimize noise coupling |
| SDA | Serial data bidirectional I/O | Open-drain line requiring external pull-up (≤10 kΩ); shared across multiple I²C slaves on same bus |
| SCL | Serial clock input | Master-generated clock; rising edge latches input data, falling edge outputs data; pull-up required if not actively driven |
| WP | Hardware write-protect control | Logic high (VCC) disables all writes to entire memory array; floating defaults to GND (write-enabled) |
| VCC | Power supply input | Accepts 1.7V–5.5V; must ramp monotonically at ≤0.1 V/μs to ensure proper POR behavior |
Key Features
| Feature | Design Value |
|---|---|
| Fast Mode Plus support | Enables 1 MHz I²C operation at 2.5V–5.5V, reducing configuration load time by 4× vs. standard mode |
| 32-byte page write | Allows burst programming of up to 32 bytes per write cycle, minimizing bus occupancy and host CPU overhead |
| Internal POR circuit | Guarantees device remains unresponsive until VCC ≥ 1.5 V and tPUP ≥ 100 µs, preventing corruption during brown-out |
| Schmitt-trigger inputs | Rejects fast transients <50 ns and improves noise immunity on SCL/SDA lines in motor-drive or switching PSU environments |
| Green packaging | RoHS-compliant, halide-free TSSOP-8 package meets IPC/JEDEC J-STD-020 moisture sensitivity level 1 (MSL-1) |
Applications
| Industrial Sensor Node | Medical Diagnostic Device |
|---|---|
Use Scenario: Storing calibrated sensor offsets, linearization coefficients, and usage history in a wireless temperature/humidity node deployed in HVAC ducts. IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed during boot and periodic recalibration; no real-time timing function. Use Value: 100-year data retention ensures calibration integrity over equipment lifetime; 1.7V operation allows direct use with low-voltage MCU sleep modes. | Use Scenario: Holding patient-specific calibration data, firmware update flags, and audit logs in a portable ECG monitor with coin-cell backup. IC Role / Device Role / Timing Role: Persistent parameter store synchronized with MCU wake-up events; no clock generation or timing role. Use Value: 6 μA standby current extends coin-cell life beyond 5 years; write-protection prevents accidental overwrite of critical calibration values. |
| Smart Energy Meter | Automotive Body Control Module |
Use Scenario: Recording tariff schedules, tamper events, and accumulated kWh in a Class 0.5 electricity meter operating at 85°C ambient. IC Role / Device Role / Timing Role: Secure, field-updatable nonvolatile memory for regulatory-compliant metering data; no timing or signal conditioning role. Use Value: Industrial temperature rating (-40°C to +85°C) and 1M-cycle endurance support daily firmware patching and event logging under harsh conditions. | Use Scenario: Storing seat position presets, mirror angles, and lighting profiles in a LIN-connected BCM with 12V system supply. IC Role / Device Role / Timing Role: Configuration memory mapped via I²C to MCU during power-on initialization; no real-time control or timing function. Use Value: Hardware WP pin prevents unintended writes during vehicle jump-start transients; 5.5V tolerance eliminates need for local LDO regulation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C32AN-SSHM-T | Same 32-Kbit capacity, identical I²C timing and pinout, but in SOIC-8 (SSHM) instead of TSSOP-8 (XHM); slightly higher thermal resistance | Preferred where PCB layout uses SOIC footprint or requires greater mechanical robustness | Select AT24C32AN-SSHM-T only if SOIC-8 mounting is required; otherwise AT24C32D-XHM-B offers smaller footprint and equivalent electrical performance |
| M24C32-WMN6TP | 32-Kbit I²C EEPROM from STMicroelectronics; supports 1 MHz FM+ only above 2.5V, but offers enhanced ESD protection (4 kV HBM vs. 3 kV) | Used in consumer electronics with higher ESD risk; differs in device address mapping (A0/A1/A2 pins assigned differently) | Choose M24C32-WMN6TP only when ESD robustness is prioritized over pinout consistency; software changes needed due to differing address bit interpretation |
Compared with AT24C32AN-SSHM-T, the AT24C32D-XHM-B saves board space with its 3×3 mm TSSOP-8 footprint while maintaining identical functionality; versus M24C32-WMN6TP, it offers stricter I²C timing compliance and simpler address configuration but lower HBM ESD rating.
Availability
AT24C32D-XHM-B is available at Aetrix Electronics and suitable for industrial sensor nodes, medical diagnostic devices, smart energy meters, and automotive body control modules requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for AT24C32D-XHM-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global provider of microcontrollers, analog components, and memory solutions, with ISO 9001-certified manufacturing and design operations.
The AT24C32D belongs to Microchip's serial EEPROM product line, engineered for reliable nonvolatile data storage in resource-constrained embedded systems where low voltage, low power, and industrial temperature operation are mandatory.
FAQ
What is the maximum I²C clock frequency supported by the AT24C32D-XHM-B?
The AT24C32D-XHM-B supports 100 kHz (Standard mode), 400 kHz (Fast mode), and 1 MHz (Fast Mode Plus) I²C clock frequencies. The 1 MHz rate is guaranteed only when VCC is between 2.5V and 5.5V; below 2.5V, maximum clock rate drops to 400 kHz. This behavior is defined in the AC Characteristics table of the DS20006047A datasheet and verified across production lots.
Does the AT24C32D-XHM-B require external pull-up resistors on SDA and SCL lines?
Yes, the AT24C32D-XHM-B requires external pull-up resistors on both SDA and SCL lines. SDA is open-drain and must be pulled up with ≤10 kΩ; SCL may be either actively driven or pulled up similarly. Recommended values are 4 kΩ for 400 kHz operation and 1.3 kΩ for 1 MHz, based on bus capacitance ≤100 pF as specified in the datasheet's AC characteristics section.
How does the Write-Protect (WP) pin function on the AT24C32D-XHM-B?
When the WP pin of the AT24C32D-XHM-B is driven high (VCC), all write operations to the entire memory array are inhibited. When WP is low (GND) or floating, writes are enabled. Internally, WP is pulled down, but Microchip recommends hard-wiring it to avoid noise-induced false protection - a design requirement explicitly stated in Section 2.5 of DS20006047A.
What is the memory organization of the AT24C32D-XHM-B?
The AT24C32D-XHM-B organizes its 32,768 bits as 4,096 words of 8 bits each, grouped into 128 pages of 32 bytes. This structure enables efficient page-write operations and supports both random and sequential read modes. The page boundary alignment is fixed and documented in Section 6 and Table 6-1 of the official Microchip datasheet DS20006047A.
Is the AT24C32D-XHM-B compatible with 1.8V I²C buses?
Yes, the AT24C32D-XHM-B is fully compatible with 1.8V I²C buses: it operates from 1.7V to 5.5V, supports 100 kHz and 400 kHz modes across that full voltage range, and meets I²C specification thresholds for VIH (≥0.7×VCC) and VIL (≤0.3×VCC). Its 1.7V minimum VCC ensures interoperability with 1.8V microcontrollers without level shifting.
AT24C32D-XHM-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24C32D-XHM-B FAQ
1.How can I place an order for AT24C32D-XHM-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C32D-XHM-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C32D-XHM-B reliable?
The price and inventory of AT24C32D-XHM-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C32D-XHM-B is usually 5 days.
3.What payment methods are accepted for AT24C32D-XHM-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C32D-XHM-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C32D-XHM-B?
AT24C32D-XHM-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C32D-XHM-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C32D-XHM-B?
For technical support, including AT24C32D-XHM-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C32D-XHM-B requirements.
6.How does Aetrix verify that AT24C32D-XHM-B is sourced from the original manufacturer or authorized distributors?
All AT24C32D-XHM-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C32D-XHM-B meets industry standards.
7.What is the process for return or replacement of AT24C32D-XHM-B?
All AT24C32D-XHM-B units undergo pre-shipment inspection (PSI). If there is an issue with AT24C32D-XHM-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C32D-XHM-B part is unused and in its original packaging.
Return procedure for AT24C32D-XHM-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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