Microchip Technology AT24C64-10TI-1.8
- Part No.:
- AT24C64-10TI-1.8
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24C64-10TI-1.8.pdf
- Description:
- IC EEPROM 64KBIT I2C 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,628
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT24C64-10TI-1.8 from Microchip Technology (formerly Atmel) is a 64 Kbit (8192 × 8) I²C-compatible serial EEPROM optimized for low-voltage embedded systems. It operates from 1.8V to 5.5V, supports 100 kHz clock rate at 1.8V, features hardware write protection via WP pin, and delivers 1 million write cycles with 100-year data retention. It is used in industrial sensor calibration storage and firmware parameter backup.
For engineers reviewing the AT24C64-10TI-1.8 datasheet, AT24C64-10TI-1.8 pinout, AT24C64-10TI-1.8 application, or AT24C64-10TI-1.8 equivalent, key selection criteria include 1.8V minimum supply compatibility, TSSOP-8 package footprint, 32-byte page write capability, Schmitt-trigger noise immunity on SDA/SCL, and quadrant-level hardware write protection.
Technical Context
The AT24C64-10TI-1.8 implements a standard two-wire I²C interface with open-drain SDA and input-clocked SCL, supporting bidirectional data transfer under strict timing constraints (tLOW = 4.7 µs, tHIGH = 4.0 µs at 1.8V). Its internal address decoder uses A0–A2 pins to support up to eight devices on one bus.
Memory is organized as 256 pages of 32 bytes each, enabling partial-page writes without erasing adjacent data. The device enters self-timed write cycle (max 10 ms) after STOP, during which all inputs are disabled and acknowledge polling is required to confirm completion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8192 × 8), sufficient for storing configuration tables or calibration coefficients in resource-constrained microcontrollers. |
| Supply Voltage Range | 1.8V to 5.5V - enables direct interfacing with 1.8V logic families and battery-powered systems without level shifting. |
| I²C Clock Rate | 100 kHz at 1.8V - ensures reliable communication in low-power, noise-sensitive environments like portable instrumentation. |
| Page Write Capacity | 32-byte page writes - reduces transaction overhead versus byte writes, improving firmware update efficiency in field-programmable devices. |
| Write Endurance | 1 million write cycles - supports frequent logging or runtime parameter updates over product lifetime. |
| Data Retention | 100 years at +25°C - guarantees long-term integrity of stored calibration data or security keys without refresh. |
| Standby Current | 0.1 µA at 1.8V - minimizes quiescent power draw in always-on IoT edge nodes and energy-harvesting applications. |
| Operating Temperature | -40°C to +85°C - qualified for industrial-grade operation in automotive body control modules and factory automation sensors. |
Pinout & Package
AT24C64-10TI-1.8 is housed in an 8-pin Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153 compliant, with 0.65 mm lead pitch and 4.4 mm body width - suitable for high-density PCB layouts requiring compact nonvolatile memory.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A2 | Device Address Inputs | Hardwired or floating to configure one of eight unique I²C addresses; internally pulled low if unconnected - enables multi-device bus sharing without external pull-ups. |
| SDA | Serial Data I/O | Bidirectional open-drain line - requires external pull-up; supports wire-OR with other I²C peripherals and tolerates bus contention. |
| SCL | Serial Clock Input | Master-generated clock signal - positive-edge sampled for input, negative-edge for output; Schmitt-triggered for noise immunity. |
| WP | Hardware Write Protect | Active-high pin that disables writes to upper 16K bits when tied to VCC - prevents accidental corruption of critical firmware parameters. |
| GND | Ground Reference | Primary return path for all internal circuitry and I/O - must be low-impedance to maintain noise margin during write cycles. |
| VCC | Power Supply | Single 1.8–5.5V supply - powers EEPROM core and I/O buffers; no separate VIO required. |
Key Features
| Feature | Design Value |
|---|---|
| Low-Voltage Operation | Functional down to 1.8V supply - eliminates need for voltage translators when interfacing with ultra-low-power MCUs like ARM Cortex-M0+ or RISC-V SoCs. |
| Schmitt Trigger Inputs | On SDA and SCL pins - suppresses switching noise from motor drivers or RF circuits, preventing spurious start/stop conditions in harsh EMI environments. |
| Quadrant Write Protection | WP pin disables writes only to upper 16K bits - allows safe runtime updates to user-configurable sectors while preserving factory-calibrated constants. |
| Internal Page Buffer | 32-byte write buffer - enables burst programming of calibration data across multiple sensor channels without repeated I²C address setup. |
| Automatic Address Roll-Over | During sequential reads - simplifies firmware implementation by eliminating manual address incrementing for block transfers. |
| Power-On Reset Circuit | Integrated low-VCC detector - prevents partial writes during brown-out conditions, ensuring data consistency after power recovery. |
Applications
| Industrial Sensor Calibration | Medical Device Configuration |
|---|---|
Use Scenario: Storing temperature-compensated offset/gain coefficients for analog front-end sensors in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile parameter storage accessed during boot and recalibration routines via I²C at 100 kHz. Use Value: Enables field-replaceable sensor modules with persistent calibration data independent of host MCU firmware version. | Use Scenario: Holding user-selectable therapy parameters and safety limits in portable infusion pumps. IC Role / Device Role / Timing Role: Secure, write-protected memory for FDA-regulated settings, accessed during startup and mode changes. Use Value: WP pin prevents unauthorized modification of dose limits, satisfying IEC 62304 software safety requirements. |
| Automotive Body Control | Smart Meter Firmware Backup |
Use Scenario: Retaining window position memory and mirror angle presets across ignition cycles in vehicle door modules. IC Role / Device Role / Timing Role: Low-power EEPROM interfaced to 1.8V CAN transceiver MCU, operating at -40°C to +85°C. Use Value: 0.1 µA standby current extends battery life during vehicle sleep mode; 100-year retention ensures data survival over full vehicle lifecycle. | Use Scenario: Backing up metering algorithm variables and tariff schedules during AC mains interruption in AMI smart meters. IC Role / Device Role / Timing Role: Fast-write-capable nonvolatile storage synchronized with supercapacitor hold-up power. Use Value: 10 ms max write cycle allows complete parameter save before backup power depletion, preventing data loss during grid failure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95640-DRMN6TP/K | SPI interface, 5V-only supply (4.5–5.5V), 20 MHz max clock, no WP pin - requires different MCU peripheral and lacks hardware write protection. | Best suited for high-speed SPI-based systems where I²C bus loading is a concern; not drop-in compatible due to protocol and voltage mismatch. | Select only if migrating from I²C to SPI architecture and 5V supply is guaranteed. |
| BR24G64FJ-WE2 | I²C-compatible, 1.7–5.5V supply, 400 kHz max clock at 1.7V, same 64Kbit density and TSSOP-8 package - but rated for -40°C to +105°C and offers 4-million write endurance. | Preferred for extended-temperature automotive cabin modules or industrial drives requiring higher reliability margin. | Drop-in replacement for AT24C64-10TI-1.8 in new designs where enhanced endurance and wider temp range justify cost premium. |
Compared with M95640-DRMN6TP/K, AT24C64-10TI-1.8 provides native I²C compatibility and 1.8V operation essential for modern ultra-low-power systems; compared with BR24G64FJ-WE2, it offers lower cost and proven qualification history in industrial control, though with reduced endurance and narrower temperature rating.
Availability
AT24C64-10TI-1.8 is available at Aetrix Electronics and suitable for industrial sensor calibration, medical device configuration, and automotive body control applications requiring stable component supply and long-term obsolescence management.
Supply support for AT24C64-10TI-1.8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with a focus on embedded control and connectivity.
The AT24C64-10TI-1.8 belongs to Microchip's legacy serial EEPROM product line, designed specifically for reliable, low-power nonvolatile data storage in space-constrained industrial and automotive systems.
FAQ
What is the maximum I²C clock frequency supported by AT24C64-10TI-1.8 at 1.8V?
The AT24C64-10TI-1.8 supports a maximum I²C clock frequency of 100 kHz when operating at 1.8V. This is specified in the AC Characteristics table under "1.8-volt" column for fSCL. Higher frequencies (up to 400 kHz) are only guaranteed at 5.0V supply - using faster clocks at 1.8V may result in timing violations and communication failures. Always verify timing margins with actual bus capacitance and pull-up strength in your design.
Does AT24C64-10TI-1.8 require external pull-up resistors on SDA and SCL lines?
Yes, AT24C64-10TI-1.8 requires external pull-up resistors on both SDA and SCL lines because its I/O pins are open-drain. The datasheet specifies typical values of 2.2 kΩ to 10 kΩ depending on bus speed and capacitance. For 100 kHz operation at 1.8V, a 4.7 kΩ pull-up is commonly used to ensure proper rise time (tR ≤ 1.0 µs) while minimizing power consumption - critical for battery-powered applications using AT24C64-10TI-1.8.
How does the WP pin function on AT24C64-10TI-1.8, and what memory region does it protect?
The WP (Write Protect) pin on AT24C64-10TI-1.8 is active-high: when tied to VCC, it inhibits write operations to the upper quadrant (16K bits, addresses 0x2000–0x3FFF) of the 64Kbit memory array. When grounded or left floating (internally pulled down), full memory access is enabled. This allows safe storage of immutable calibration data or firmware signatures in the protected region while permitting runtime updates to user-configurable parameters elsewhere - a key feature implemented in AT24C64-10TI-1.8 for functional safety compliance.
What is the write cycle time for AT24C64-10TI-1.8, and how should firmware handle it?
The maximum write cycle time for AT24C64-10TI-1.8 is 10 ms, as specified in the AC Characteristics table under tWR. During this period, the device ignores all I²C commands. Firmware must either wait the full 10 ms after each write command or use acknowledge polling - sending repeated START + device address until the EEPROM responds with ACK. Polling is preferred for efficiency, especially in time-critical applications, and is fully supported by AT24C64-10TI-1.8's internal state machine.
Is AT24C64-10TI-1.8 pin-compatible with other packages in the AT24C64 family, such as SOIC or PDIP variants?
Yes, AT24C64-10TI-1.8 is functionally and electrically pin-compatible with other AT24C64 variants including AT24C64N-10SI-1.8 (SOIC) and AT24C64-10PI-1.8 (PDIP), sharing identical pin functions (A0–A2, SDA, SCL, WP, GND, VCC) and electrical specifications. However, the TSSOP-8 package has different mechanical dimensions and soldering requirements - PCB layout and reflow profile must be adjusted accordingly. No changes to firmware or schematic logic are needed when substituting AT24C64-10TI-1.8 for these variants.
AT24C64-10TI-1.8 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24C64-10TI-1.8 FAQ
1.How can I place an order for AT24C64-10TI-1.8 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C64-10TI-1.8 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C64-10TI-1.8 reliable?
The price and inventory of AT24C64-10TI-1.8 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C64-10TI-1.8 is usually 5 days.
3.What payment methods are accepted for AT24C64-10TI-1.8?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C64-10TI-1.8 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C64-10TI-1.8?
AT24C64-10TI-1.8 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C64-10TI-1.8 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C64-10TI-1.8?
For technical support, including AT24C64-10TI-1.8 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C64-10TI-1.8 requirements.
6.How does Aetrix verify that AT24C64-10TI-1.8 is sourced from the original manufacturer or authorized distributors?
All AT24C64-10TI-1.8 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C64-10TI-1.8 meets industry standards.
7.What is the process for return or replacement of AT24C64-10TI-1.8?
All AT24C64-10TI-1.8 units undergo pre-shipment inspection (PSI). If there is an issue with AT24C64-10TI-1.8, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C64-10TI-1.8 part is unused and in its original packaging.
Return procedure for AT24C64-10TI-1.8:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT24C64-10TI-1.8 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
