Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Memory > Memory

Microchip Technology AT24C64CN-SH-B

Name: AT24C64CN-SH-B
Brand: Microchip Technology
SKU: AT24C64CN-SH-B
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: AT24C64CN-SH-B

Manufacturer:: Microchip Technology

Category:: Memory

Package:: 8-SOIC (0.154", 3.90mm Width)

Datasheet:: AT24C64CN-SH-B.pdf

Description:: IC EEPROM 64KBIT I2C 1MHZ 8SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,076

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

AT24C64CN-SH-B from Microchip Technology (formerly Atmel) is a 64 Kbit I²C-compatible serial EEPROM organized as 8192 × 8 bits, operating from 1.8 V to 5.5 V, featuring 32-byte page write mode, hardware write protection via WP pin, and 1 MHz max clock speed at 5.0 V. It is used for nonvolatile parameter storage in embedded controllers, power management units, and sensor calibration modules.

For engineers reviewing the AT24C64CN-SH-B datasheet, AT24C64CN-SH-B pinout, AT24C64CN-SH-B application, or AT24C64CN-SH-B equivalent, key selection considerations include its 1.8–5.5 V supply range, 32-byte page write capability, Schmitt-triggered SCL/SDA inputs for noise immunity, 1 million write endurance, and industrial temperature rating (−40°C to +85°C).

Technical Context

The AT24C64CN-SH-B implements a standard two-wire (I²C) interface with open-drain SDA and active-high SCL, supporting standard-mode (400 kHz at 1.8 V) and fast-mode (1 MHz at 5.0 V) operation. Its internal address counter enables sequential reads across pages, while cascading up to eight devices on one bus is enabled by three hardware-configurable device address pins (A0–A2).

Write operations are internally timed (max 5 ms), with hardware write protection activated when WP is tied to VCC. The device uses Schmitt-trigger inputs and digital noise filtering on SCL/SDA to ensure robust communication in electrically noisy environments typical of industrial control and automotive body electronics.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory Size	64 Kbit (8192 × 8), enabling storage of firmware configuration tables or calibration coefficients for mid-complexity embedded systems.
Supply Voltage	1.8 V to 5.5 V - supports direct interfacing with both low-power microcontrollers (e.g., ARM Cortex-M0+) and legacy 5 V logic without level shifting.
Interface Speed	Up to 1 MHz at 5.0 V - allows rapid parameter updates during system initialization or field upgrades.
Page Write Size	32 bytes - minimizes write latency per transaction and reduces host CPU overhead versus byte-write-only EEPROMs.
Endurance	1,000,000 write cycles - suitable for applications requiring frequent logging or runtime parameter adjustment (e.g., energy meter tariff settings).
Data Retention	100 years at 25°C - ensures long-term reliability in unattended infrastructure equipment such as smart grid nodes or building automation controllers.
Operating Temp	−40°C to +85°C - qualified for industrial-grade deployment in motor drives, PLC I/O modules, and HVAC control panels.

Pinout & Package

AT24C64CN-SH-B is packaged in an 8-lead JEDEC SOIC (8S1), 3.9 mm × 4.9 mm body, with NiPdAu lead finish. Pin 1 is marked by a beveled corner or dot.

Pin/Terminal	Circuit Role	Design Meaning
A0	Device Address Input	Hardware-selectable bit for multi-device I²C bus addressing; tied high/low or left floating (internally pulled down) to configure one of eight possible device addresses.
A1	Device Address Input	Second address bit; enables simultaneous use of multiple AT24C64CN-SH-B devices on same I²C bus without software arbitration.
A2	Device Address Input	Third address bit; completes 3-bit address space (0x50–0x57) for scalable system-level memory expansion.
GND	Ground Reference	Return path for VCC and all I/O signals; must be low-impedance to maintain noise margin on SCL/SDA lines.
VCC	Power Supply	Single-supply input (1.8–5.5 V); powers internal EEPROM array, control logic, and HV pump for write operations.
WP	Write Protect Control	Active-high hardware lock: when driven to VCC, disables all write commands - prevents accidental overwrites during power-up or firmware glitches.
SCL	Serial Clock Input	Positive-edge clock for data-in; negative-edge sampling for data-out; Schmitt-triggered for reliable timing in presence of signal ringing or EMI.
SDA	Serial Data I/O	Bidirectional open-drain line shared across I²C bus; requires external pull-up resistor; supports multi-master arbitration and clock stretching.

Key Features

Feature	Design Value
Low-voltage operation	1.8 V minimum supply enables integration into battery-powered IoT sensors and portable medical devices without voltage translation.
32-byte page write	Reduces total write time by >95% vs. byte-wise writes - critical for real-time systems where EEPROM latency must stay below 10 ms per update.
Schmitt-trigger inputs	Eliminates false clock/data transitions caused by slow-rising signals or board-level noise - improves reliability in motor-driven or switching-power environments.
Hardware write protect	WP pin provides fail-safe, zero-software-overhead memory locking - essential for safety-critical applications like industrial safety relays or EV battery BMS parameter storage.
100-year data retention	Guarantees integrity of stored calibration data or security keys over full product lifecycle - eliminates need for periodic refresh or backup mechanisms.

Applications

Industrial Sensor Calibration	Smart Energy Metering
Use Scenario: Storing factory-trimmed offset/gain coefficients for analog front-end circuits in pressure, temperature, or current sensors deployed in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register holding calibration constants accessed at power-on reset before ADC conversion begins. Use Value: Enables single-point calibration at manufacturing, eliminating field recalibration labor and ensuring ±0.1% measurement accuracy over 10+ years of operation.	Use Scenario: Recording tariff schedules, demand-response event logs, and tamper-detection timestamps in DIN-rail mounted electricity meters compliant with IEC 62056. IC Role / Device Role / Timing Role: Secure, write-protected parameter store updated only during authorized firmware upgrades or utility command sequences. Use Value: Meets IEC 62056-21 data integrity requirements with 1M-cycle endurance and hardware WP - prevents unauthorized rate changes or log erasure.
Automotive Body Control	Medical Device Configuration
Use Scenario: Saving user preferences (mirror position, seat memory, lighting profiles) and fault history in vehicle body control modules (BCM) operating across −40°C to +85°C ambient. IC Role / Device Role / Timing Role: Persistent storage node on LIN/I²C hybrid bus, accessed asynchronously by MCU during wake-up or diagnostic sessions. Use Value: Survives 10,000+ ignition cycles with guaranteed data retention - meets ISO 16750-4 automotive vibration and thermal shock requirements.	Use Scenario: Holding FDA-required device-specific parameters (e.g., transducer sensitivity, alarm thresholds, calibration dates) in portable ultrasound or infusion pumps. IC Role / Device Role / Timing Role: Audit-trail EEPROM storing immutable configuration records with timestamped write events for regulatory traceability. Use Value: Supports 21 CFR Part 11 compliance via hardware WP and deterministic 5 ms write cycle - enables electronic signature validation without external secure element.

Industrial Sensor Calibration

Smart Energy Metering

Use Scenario: Storing factory-trimmed offset/gain coefficients for analog front-end circuits in pressure, temperature, or current sensors deployed in harsh factory environments.

IC Role / Device Role / Timing Role: Nonvolatile configuration register holding calibration constants accessed at power-on reset before ADC conversion begins.

Use Value: Enables single-point calibration at manufacturing, eliminating field recalibration labor and ensuring ±0.1% measurement accuracy over 10+ years of operation.

Use Scenario: Recording tariff schedules, demand-response event logs, and tamper-detection timestamps in DIN-rail mounted electricity meters compliant with IEC 62056.

IC Role / Device Role / Timing Role: Secure, write-protected parameter store updated only during authorized firmware upgrades or utility command sequences.

Use Value: Meets IEC 62056-21 data integrity requirements with 1M-cycle endurance and hardware WP - prevents unauthorized rate changes or log erasure.

Automotive Body Control

Medical Device Configuration

Use Scenario: Saving user preferences (mirror position, seat memory, lighting profiles) and fault history in vehicle body control modules (BCM) operating across −40°C to +85°C ambient.

IC Role / Device Role / Timing Role: Persistent storage node on LIN/I²C hybrid bus, accessed asynchronously by MCU during wake-up or diagnostic sessions.

Use Value: Survives 10,000+ ignition cycles with guaranteed data retention - meets ISO 16750-4 automotive vibration and thermal shock requirements.

Use Scenario: Holding FDA-required device-specific parameters (e.g., transducer sensitivity, alarm thresholds, calibration dates) in portable ultrasound or infusion pumps.

IC Role / Device Role / Timing Role: Audit-trail EEPROM storing immutable configuration records with timestamped write events for regulatory traceability.

Use Value: Supports 21 CFR Part 11 compliance via hardware WP and deterministic 5 ms write cycle - enables electronic signature validation without external secure element.

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Microchip AT24C64D-SSHM-T	Same 64 Kbit capacity and SOIC-8 package, but uses newer AT24C64D die with enhanced ESD rating (4 kV HBM) and tighter tAA (0.55 µs max at 5 V).	Preferred for new designs targeting AEC-Q200 stress testing or high-noise medical ESD environments.	Select AT24C64D-SSHM-T if upgrading for improved robustness; AT24C64CN-SH-B remains valid for cost-sensitive legacy replacements.
ON Semiconductor CAT24C64WI-GT3	Pin-compatible 64 Kbit EEPROM with identical SOIC-8 footprint and 1.7–5.5 V range, but rated for extended temp (−40°C to +125°C) and offers 1.5 ms typical write cycle.	Suitable for under-hood automotive or high-temp industrial enclosures where ambient exceeds +85°C.	Choose CAT24C64WI-GT3 only when extended temperature operation is mandatory; AT24C64CN-SH-B is optimized for standard industrial grade.

Compared with AT24C64D-SSHM-T and CAT24C64WI-GT3, the AT24C64CN-SH-B delivers proven industrial reliability at lower unit cost, with sufficient speed and endurance for most controller-based applications - making it ideal for volume production where qualification stability outweighs marginal spec improvements.

Availability

AT24C64CN-SH-B is available at Aetrix Electronics and suitable for industrial sensor calibration, smart energy metering, and automotive body control applications requiring stable component supply and long-term obsolescence support.

Supply support for AT24C64CN-SH-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with broad industrial and automotive qualification coverage.

The AT24C64CN-SH-B belongs to Microchip's AT24Cxx family of I²C serial EEPROMs, designed specifically for reliable, low-power, and pin-efficient nonvolatile storage in resource-constrained embedded systems.

FAQ

What is the maximum I²C clock frequency supported by the AT24C64CN-SH-B?

The AT24C64CN-SH-B supports up to 1 MHz I²C clock frequency when operated at VCC = 5.0 V. At 1.8 V, the maximum clock frequency is 400 kHz. These values are specified in the AC Characteristics table of the datasheet and reflect guaranteed timing margins under worst-case voltage and temperature conditions. The AT24C64CN-SH-B maintains full compatibility with standard-mode and fast-mode I²C protocols without requiring external clock dividers or protocol adaptation.

Does the AT24C64CN-SH-B require external pull-up resistors on SDA and SCL lines?

Yes, the AT24C64CN-SH-B requires external pull-up resistors on both SDA and SCL lines because its I²C interface uses open-drain outputs. Typical values range from 2.2 kΩ (for 100 kHz) to 1 kΩ (for 1 MHz) depending on bus capacitance and VCC level. The AT24C64CN-SH-B does not integrate internal pull-ups, so omission of external resistors will result in nonfunctional I²C communication. Pull-up voltage must match the VCC applied to the AT24C64CN-SH-B.

How does the write protect (WP) pin function on the AT24C64CN-SH-B?

The WP pin on the AT24C64CN-SH-B is an active-high hardware lock: when driven to VCC, it disables all write operations (byte, page, and erase) to the entire memory array. When WP is grounded or left floating (internally pulled down), normal write functionality is enabled. This feature operates independently of software commands and provides deterministic, glitch-immune protection - critical for safeguarding calibration data or security keys in the AT24C64CN-SH-B during power transitions or firmware faults.

Can multiple AT24C64CN-SH-B devices share the same I²C bus?

Yes, up to eight AT24C64CN-SH-B devices can share a single I²C bus using hardware address configuration via the A0, A1, and A2 pins. Each combination of high/low states on these three pins selects a unique 3-bit device address (0x50–0x57), allowing individual addressing without software arbitration. The AT24C64CN-SH-B's address decoder responds only to its configured address, enabling scalable memory expansion in systems like multi-sensor nodes or modular PLC backplanes.

What is the typical write cycle time for the AT24C64CN-SH-B during page write operations?

The AT24C64CN-SH-B has a maximum write cycle time of 5 ms for both byte and page writes, as specified in the datasheet's AC Characteristics table. This value is guaranteed across the full operating temperature and voltage range. During page write (up to 32 bytes), the entire block commits atomically after the final STOP condition - meaning no partial writes occur, and host firmware must wait ≥5 ms before initiating the next I²C transaction to the AT24C64CN-SH-B.

AT24C64CN-SH-B Specifications

Product attributes: Attribute value

Manufacturer:: Microchip Technology

Series:: -

Package/Case:: 8-SOIC (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Obsolete

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: EEPROM

Technology:: EEPROM

Memory Size:: 64Kbit

Memory Organization:: 8K x 8

Memory Interface:: I2C

Clock Frequency:: 1 MHz

Write Cycle Time - Word, Page:: 5ms

Access Time:: 550 ns

Voltage - Supply:: 1.8V ~ 5.5V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-SOIC

AT24C64CN-SH-B FAQ

1.How can I place an order for AT24C64CN-SH-B through Aetrix?

Please submit a Request for Quotation (RFQ) for AT24C64CN-SH-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AT24C64CN-SH-B reliable?

The price and inventory of AT24C64CN-SH-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C64CN-SH-B is usually 5 days.

3.What payment methods are accepted for AT24C64CN-SH-B?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C64CN-SH-B transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AT24C64CN-SH-B?

AT24C64CN-SH-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AT24C64CN-SH-B order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AT24C64CN-SH-B?

For technical support, including AT24C64CN-SH-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C64CN-SH-B requirements.

6.How does Aetrix verify that AT24C64CN-SH-B is sourced from the original manufacturer or authorized distributors?

All AT24C64CN-SH-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C64CN-SH-B meets industry standards.

7.What is the process for return or replacement of AT24C64CN-SH-B?

All AT24C64CN-SH-B units undergo pre-shipment inspection (PSI). If there is an issue with AT24C64CN-SH-B, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AT24C64CN-SH-B part is unused and in its original packaging.

Return procedure for AT24C64CN-SH-B:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…