Microchip Technology AT24C64C-TH-T
- Part No.:
- AT24C64C-TH-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT24C64C-TH-T.pdf
- Description:
- IC EEPROM 64KBIT I2C 1MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT24C64C-TH-T from Microchip Technology (formerly Atmel) is a 64 Kbit I²C-compatible serial EEPROM organized as 8192 × 8 bits, operating from 1.8 V to 5.5 V, featuring hardware write protection via the WP pin, 32-byte page write capability, and 1 MHz max clock frequency at 5.0 V. It is widely used in industrial sensor calibration storage, embedded system configuration retention, and power-meter firmware parameter backup.
For engineers reviewing the AT24C64C-TH-T datasheet, AT24C64C-TH-T pinout, AT24C64C-TH-T application, or AT24C64C-TH-T equivalent, key selection considerations include its TSSOP-8 package with NiPdAu lead finish, 100-year data retention, 1 million write endurance, 400 kHz operation at 1.8 V, and cascading support for up to eight devices on a shared I²C bus.
Technical Context
The AT24C64C-TH-T implements a standard two-wire I²C interface with Schmitt-triggered, noise-filtered SDA and SCL inputs, supporting both byte and 32-byte page write modes. Its internal address counter enables sequential read operations without re-sending the address.
It uses three hardwired device address pins (A0–A2) to support up to eight devices on one bus, and features an open-drain bidirectional SDA line compatible with wire-OR bus topologies. The WP pin provides hardware-level memory lock by inhibiting writes when pulled high to VCC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8192 × 8), enabling storage of firmware configuration tables or sensor calibration coefficients for mid-complexity embedded systems. |
| Supply Voltage Range | 1.8 V to 5.5 V - supports direct interfacing with 1.8 V logic microcontrollers and legacy 5 V systems without level shifting. |
| I²C Clock Frequency | Up to 1 MHz at 5.0 V; 400 kHz at 1.8 V - ensures fast parameter updates in real-time control loops while maintaining robustness at low voltage. |
| Write Endurance | 1,000,000 cycles - suitable for applications requiring frequent logging or dynamic parameter adjustment, such as energy meter tariff updates. |
| Data Retention | 100 years at +25°C - guarantees long-term reliability for unattended infrastructure equipment like smart grid endpoints or building automation nodes. |
| Page Write Size | 32 bytes per page - reduces I²C transaction overhead during bulk configuration writes, improving host MCU efficiency and bus utilization. |
| Operating Temperature | −40°C to +85°C - qualified for industrial environments including factory floor controllers, HVAC systems, and outdoor utility meters. |
Pinout & Package
AT24C64C-TH-T is packaged in an 8-lead Thin Shrink Small Outline Package (TSSOP) with 4.4 mm body width, 0.65 mm pitch, and NiPdAu lead finish - optimized for automated PCB assembly and space-constrained industrial modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address Input | Hardwired low/high to configure one of eight possible I²C slave addresses; floating defaults to logic low via internal bias. |
| A1 | Device Address Input | Second address bit for multi-device bus addressing; same internal pull-down behavior as A0. |
| A2 | Device Address Input | Third address bit enabling up to eight AT24C64C-TH-T devices on a single I²C bus without software arbitration. |
| GND | Ground Reference | Return path for all internal circuitry and I/O signals; must be connected to system ground plane for noise immunity. |
| VCC | Power Supply | Supplies core logic and EEPROM array; decoupling capacitor (0.1 µF) required within 10 mm for stable 1 MHz operation. |
| WP | Write Protect Control | Hardware lock: tied to VCC disables all writes; tied to GND enables full read/write access; floating defaults to write-enabled. |
| SCL | Serial Clock Input | Positive-edge sampled clock for data synchronization; requires external pull-up resistor (typically 2.2–10 kΩ). |
| SDA | Serial Data I/O | Bidirectional open-drain line for address/data transfer; shares pull-up with other I²C devices on the same bus. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-triggered, filtered inputs | Enables reliable I²C communication in electrically noisy industrial environments (e.g., motor drives, PLCs) without external RC filtering. |
| Self-timed write cycle (≤5 ms) | Eliminates need for host MCU to poll status or manage timing delays - simplifies firmware and improves deterministic response. |
| 32-byte page write with partial-page support | Allows efficient updates of non-aligned data blocks (e.g., 17-byte sensor offset table), reducing I²C transaction count vs. byte-wise writes. |
| 1.8 V to 5.5 V wide supply range | Permits direct integration into mixed-voltage systems (e.g., 3.3 V MCU + 5 V analog front-end) without dedicated level shifters. |
| Lead-free and halogen-free construction | Meets RoHS Directive 2011/65/EU and JEDEC J-STD-020 moisture sensitivity level 1 - suitable for lead-free reflow assembly. |
Applications
| Industrial Sensor Calibration Storage | Embedded System Configuration Retention |
|---|---|
|
Use Scenario: Storing temperature, pressure, and humidity sensor calibration coefficients in factory-calibrated environmental monitoring units. IC Role / Device Role / Timing Role: Nonvolatile parameter storage accessed during power-up initialization and field recalibration via I²C. Use Value: Enables traceable, field-updatable calibration without firmware changes; leverages 100-year retention and 1M-cycle endurance for lifetime recalibration. |
Use Scenario: Holding network settings (IP, subnet, gateway), UI preferences, and operational thresholds in smart thermostats and HVAC controllers. IC Role / Device Role / Timing Role: Persistent configuration store updated infrequently but read at every boot and during user setup. Use Value: Ensures consistent behavior across power cycles; WP pin prevents accidental overwrites during firmware updates or brown-out events. |
| Smart Energy Meter Firmware Parameters | Industrial PLC I/O Module Configuration |
|
Use Scenario: Storing tariff schedules, demand-response profiles, and metering constants in ANSI C12.22-compliant electricity meters. IC Role / Device Role / Timing Role: Secure, write-protected memory for regulatory-critical parameters accessed only during authenticated firmware updates. Use Value: Hardware WP pin enforces compliance by preventing runtime corruption; 1.8 V operation supports ultra-low-power meter sleep modes. |
Use Scenario: Saving channel-specific scaling factors, alarm thresholds, and input filter settings in modular programmable logic controller I/O bases. IC Role / Device Role / Timing Role: Field-configurable memory mapped to each I/O slot, read at module insertion and updated via backplane I²C. Use Value: Enables plug-and-play I/O expansion without host firmware modification; cascading support allows one bus to serve multiple slots. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STMicroelectronics M24C64-WMN6TP | Same 64 Kbit capacity, TSSOP-8 package, and 1.7–5.5 V range; supports 1 MHz I²C but lacks built-in Schmitt triggers on inputs. | Requires external RC filtering in noisy environments; identical WP functionality and page write size. | Select when cost sensitivity outweighs noise immunity requirements and existing layout accommodates external filtering. |
| ON Semiconductor CAT24C64YI-GT3 | 64 Kbit, TSSOP-8, 1.7–5.5 V; includes auto erase before write and enhanced ESD rating (4 kV HBM), but maximum clock is 400 kHz at all voltages. | Better suited for high-ESD environments (e.g., handheld test equipment); slower write throughput due to fixed 400 kHz limit. | Prefer for portable or field-service tools where ESD robustness is critical and bandwidth demands are modest. |
Compared with M24C64-WMN6TP and CAT24C64YI-GT3, AT24C64C-TH-T delivers superior noise immunity via integrated Schmitt triggers and higher speed at 5 V (1 MHz), making it optimal for industrial control buses with variable voltage and electrical noise.
Availability
AT24C64C-TH-T is available at Aetrix Electronics and suitable for industrial sensor calibration storage, embedded system configuration retention, and smart energy meter firmware parameters requiring stable component supply across extended product lifecycles.
Supply support for AT24C64C-TH-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and continues to manufacture, qualify, and support the AT24Cxx family of serial EEPROMs with full backward compatibility and industrial-grade reliability.
The AT24C64C product line was designed for low-power, space-constrained embedded systems requiring robust nonvolatile storage - especially in industrial automation, energy metering, and sensor node applications demanding long data retention and high write endurance.
FAQ
What is the package type and lead finish of AT24C64C-TH-T?
AT24C64C-TH-T uses an 8-lead Thin Shrink Small Outline Package (TSSOP) with NiPdAu (Nickel-Palladium-Gold) lead finish. This finish ensures excellent solderability, corrosion resistance, and compatibility with lead-free reflow processes, meeting IPC-J-STD-020 moisture sensitivity level 1 requirements.
Does AT24C64C-TH-T support I²C clock stretching?
No, AT24C64C-TH-T does not support I²C clock stretching. It relies on self-timed internal write cycles (≤5 ms), during which it ignores incoming clock edges. Host systems must implement acknowledge polling or fixed-delay waits after write commands to ensure completion before issuing subsequent transactions.
Can AT24C64C-TH-T operate reliably at 1.8 V with 1 MHz I²C speed?
No - AT24C64C-TH-T supports 1 MHz I²C only at VCC ≥ 2.5 V. At 1.8 V, the maximum guaranteed clock frequency is 400 kHz. Attempting 1 MHz operation at 1.8 V may result in timing violations, failed ACKs, or data corruption due to insufficient drive strength and propagation delay margins.
How many AT24C64C-TH-T devices can share the same I²C bus?
Up to eight AT24C64C-TH-T devices can share a single I²C bus using the A0, A1, and A2 address pins. Each pin can be hardwired to VCC or GND to generate a unique 3-bit device address, yielding eight distinct 7-bit slave addresses (0x50–0x57) for multi-drop configurations.
What is the meaning of the "-TH-T" suffix in AT24C64C-TH-T?
The "-TH-T" suffix denotes a TSSOP-8 package (TH) supplied in tape-and-reel format (T), with NiPdAu lead finish. Per Atmel's ordering guide, "TH" specifically identifies the 4.4 mm body TSSOP variant, and "T" indicates 5,000 units per reel - standard for automated SMT placement.
AT24C64C-TH-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 550 ns
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT24C64C-TH-T FAQ
1.How can I place an order for AT24C64C-TH-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT24C64C-TH-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT24C64C-TH-T reliable?
The price and inventory of AT24C64C-TH-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT24C64C-TH-T is usually 5 days.
3.What payment methods are accepted for AT24C64C-TH-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT24C64C-TH-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT24C64C-TH-T?
AT24C64C-TH-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT24C64C-TH-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT24C64C-TH-T?
For technical support, including AT24C64C-TH-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT24C64C-TH-T requirements.
6.How does Aetrix verify that AT24C64C-TH-T is sourced from the original manufacturer or authorized distributors?
All AT24C64C-TH-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT24C64C-TH-T meets industry standards.
7.What is the process for return or replacement of AT24C64C-TH-T?
All AT24C64C-TH-T units undergo pre-shipment inspection (PSI). If there is an issue with AT24C64C-TH-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT24C64C-TH-T part is unused and in its original packaging.
Return procedure for AT24C64C-TH-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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